drm/amdgpu: Use instance table for sdma 4.4.2
For ASICs with sdma IP v4.4.2, add mapping for logical to physical instances. v2: Register accesses on bare metal should be based on physical instance. Use GET_INST() to get physical instance. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -43,9 +43,10 @@ static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev,
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unsigned int engine_id,
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unsigned int queue_id)
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{
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uint32_t sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA0, engine_id,
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regSDMA_RLC0_RB_CNTL) -
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regSDMA_RLC0_RB_CNTL;
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uint32_t sdma_engine_reg_base =
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SOC15_REG_OFFSET(SDMA0, GET_INST(SDMA0, engine_id),
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regSDMA_RLC0_RB_CNTL) -
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regSDMA_RLC0_RB_CNTL;
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uint32_t retval = sdma_engine_reg_base +
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queue_id * (regSDMA_RLC1_RB_CNTL - regSDMA_RLC0_RB_CNTL);
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@ -75,7 +75,10 @@ static void nbio_v7_9_sdma_doorbell_range(struct amdgpu_device *adev, int instan
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bool use_doorbell, int doorbell_index, int doorbell_size)
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{
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u32 doorbell_range = 0, doorbell_ctrl = 0;
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int aid_id = adev->sdma.instance[instance].aid_id;
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int aid_id, dev_inst;
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dev_inst = GET_INST(SDMA0, instance);
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aid_id = adev->sdma.instance[instance].aid_id;
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if (use_doorbell == false)
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return;
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@ -93,7 +96,7 @@ static void nbio_v7_9_sdma_doorbell_range(struct amdgpu_device *adev, int instan
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REG_SET_FIELD(doorbell_ctrl, S2A_DOORBELL_ENTRY_1_CTRL,
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S2A_DOORBELL_PORT1_RANGE_SIZE, doorbell_size);
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switch (instance % adev->sdma.num_inst_per_aid) {
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switch (dev_inst % adev->sdma.num_inst_per_aid) {
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case 0:
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WREG32(SOC15_REG_OFFSET(NBIO, 0, regDOORBELL0_CTRL_ENTRY_1) +
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4 * aid_id, doorbell_range);
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@ -57,7 +57,9 @@ static void sdma_v4_4_2_set_irq_funcs(struct amdgpu_device *adev);
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static u32 sdma_v4_4_2_get_reg_offset(struct amdgpu_device *adev,
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u32 instance, u32 offset)
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{
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return (adev->reg_offset[SDMA0_HWIP][instance][0] + offset);
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u32 dev_inst = GET_INST(SDMA0, instance);
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return (adev->reg_offset[SDMA0_HWIP][dev_inst][0] + offset);
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}
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static unsigned sdma_v4_4_2_seq_to_irq_id(int seq_num)
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@ -1475,16 +1477,31 @@ static int sdma_v4_4_2_process_trap_irq(struct amdgpu_device *adev,
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struct amdgpu_irq_src *source,
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struct amdgpu_iv_entry *entry)
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{
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uint32_t instance;
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uint32_t instance, i;
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DRM_DEBUG("IH: SDMA trap\n");
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instance = sdma_v4_4_2_irq_id_to_seq(entry->client_id);
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instance += node_id_to_phys_map[entry->node_id] *
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adev->sdma.num_inst_per_aid;
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/* Client id gives the SDMA instance in AID. To know the exact SDMA
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* instance, interrupt entry gives the node id which corresponds to the AID instance.
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* Match node id with the AID id associated with the SDMA instance. */
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for (i = instance; i < adev->sdma.num_instances;
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i += adev->sdma.num_inst_per_aid) {
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if (adev->sdma.instance[i].aid_id ==
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node_id_to_phys_map[entry->node_id])
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break;
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}
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if (i >= adev->sdma.num_instances) {
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dev_WARN_ONCE(
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adev->dev, 1,
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"Couldn't find the right sdma instance in trap handler");
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return 0;
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}
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switch (entry->ring_id) {
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case 0:
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amdgpu_fence_process(&adev->sdma.instance[instance].ring);
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amdgpu_fence_process(&adev->sdma.instance[i].ring);
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break;
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default:
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break;
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@ -1717,12 +1734,12 @@ static void sdma_v4_4_2_get_clockgating_state(void *handle, u64 *flags)
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*flags = 0;
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/* AMD_CG_SUPPORT_SDMA_MGCG */
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data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, regSDMA_CLK_CTRL));
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data = RREG32(SOC15_REG_OFFSET(SDMA0, GET_INST(SDMA0, 0), regSDMA_CLK_CTRL));
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if (!(data & SDMA_CLK_CTRL__SOFT_OVERRIDE7_MASK))
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*flags |= AMD_CG_SUPPORT_SDMA_MGCG;
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/* AMD_CG_SUPPORT_SDMA_LS */
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data = RREG32(SOC15_REG_OFFSET(SDMA0, 0, regSDMA_POWER_CNTL));
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data = RREG32(SOC15_REG_OFFSET(SDMA0, GET_INST(SDMA0, 0), regSDMA_POWER_CNTL));
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if (data & SDMA_POWER_CNTL__MEM_POWER_OVERRIDE_MASK)
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*flags |= AMD_CG_SUPPORT_SDMA_LS;
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}
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@ -1809,7 +1826,7 @@ static const struct amdgpu_ring_funcs sdma_v4_4_2_page_ring_funcs = {
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static void sdma_v4_4_2_set_ring_funcs(struct amdgpu_device *adev)
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{
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int i;
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int i, dev_inst;
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for (i = 0; i < adev->sdma.num_instances; i++) {
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adev->sdma.instance[i].ring.funcs = &sdma_v4_4_2_ring_funcs;
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@ -1820,7 +1837,10 @@ static void sdma_v4_4_2_set_ring_funcs(struct amdgpu_device *adev)
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adev->sdma.instance[i].page.me = i;
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}
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adev->sdma.instance[i].aid_id = i / adev->sdma.num_inst_per_aid;
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dev_inst = GET_INST(SDMA0, i);
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/* AID to which SDMA belongs depends on physical instance */
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adev->sdma.instance[i].aid_id =
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dev_inst / adev->sdma.num_inst_per_aid;
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}
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}
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