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KVM: nVMX: VMX instructions: add checks for #GP/#SS exceptions
According to Intel SDM several checks must be applied for memory operands of VMX instructions. Long mode: #GP(0) or #SS(0) depending on the segment must be thrown if the memory address is in a non-canonical form. Protected mode, checks in chronological order: - The segment type must be checked with access type (read or write) taken into account. For write access: #GP(0) must be generated if the destination operand is located in a read-only data segment or any code segment. For read access: #GP(0) must be generated if if the source operand is located in an execute-only code segment. - Usability of the segment must be checked. #GP(0) or #SS(0) depending on the segment must be thrown if the segment is unusable. - Limit check. #GP(0) or #SS(0) depending on the segment must be thrown if the memory operand effective address is outside the segment limit. Signed-off-by: Eugene Korenevsky <ekorenevsky@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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0da029ed7e
commit
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1 changed files with 61 additions and 16 deletions
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@ -6408,8 +6408,12 @@ static enum hrtimer_restart vmx_preemption_timer_fn(struct hrtimer *timer)
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*/
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static int get_vmx_mem_address(struct kvm_vcpu *vcpu,
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unsigned long exit_qualification,
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u32 vmx_instruction_info, gva_t *ret)
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u32 vmx_instruction_info, bool wr, gva_t *ret)
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{
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gva_t off;
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bool exn;
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struct kvm_segment s;
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/*
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* According to Vol. 3B, "Information for VM Exits Due to Instruction
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* Execution", on an exit, vmx_instruction_info holds most of the
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@ -6434,22 +6438,63 @@ static int get_vmx_mem_address(struct kvm_vcpu *vcpu,
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/* Addr = segment_base + offset */
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/* offset = base + [index * scale] + displacement */
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*ret = vmx_get_segment_base(vcpu, seg_reg);
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off = exit_qualification; /* holds the displacement */
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if (base_is_valid)
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*ret += kvm_register_read(vcpu, base_reg);
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off += kvm_register_read(vcpu, base_reg);
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if (index_is_valid)
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*ret += kvm_register_read(vcpu, index_reg)<<scaling;
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*ret += exit_qualification; /* holds the displacement */
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off += kvm_register_read(vcpu, index_reg)<<scaling;
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vmx_get_segment(vcpu, &s, seg_reg);
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*ret = s.base + off;
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if (addr_size == 1) /* 32 bit */
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*ret &= 0xffffffff;
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/*
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* TODO: throw #GP (and return 1) in various cases that the VM*
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* instructions require it - e.g., offset beyond segment limit,
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* unusable or unreadable/unwritable segment, non-canonical 64-bit
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* address, and so on. Currently these are not checked.
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*/
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/* Checks for #GP/#SS exceptions. */
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exn = false;
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if (is_protmode(vcpu)) {
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/* Protected mode: apply checks for segment validity in the
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* following order:
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* - segment type check (#GP(0) may be thrown)
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* - usability check (#GP(0)/#SS(0))
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* - limit check (#GP(0)/#SS(0))
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*/
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if (wr)
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/* #GP(0) if the destination operand is located in a
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* read-only data segment or any code segment.
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*/
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exn = ((s.type & 0xa) == 0 || (s.type & 8));
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else
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/* #GP(0) if the source operand is located in an
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* execute-only code segment
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*/
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exn = ((s.type & 0xa) == 8);
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}
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if (exn) {
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kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
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return 1;
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}
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if (is_long_mode(vcpu)) {
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/* Long mode: #GP(0)/#SS(0) if the memory address is in a
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* non-canonical form. This is an only check for long mode.
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*/
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exn = is_noncanonical_address(*ret);
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} else if (is_protmode(vcpu)) {
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/* Protected mode: #GP(0)/#SS(0) if the segment is unusable.
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*/
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exn = (s.unusable != 0);
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/* Protected mode: #GP(0)/#SS(0) if the memory
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* operand is outside the segment limit.
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*/
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exn = exn || (off + sizeof(u64) > s.limit);
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}
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if (exn) {
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kvm_queue_exception_e(vcpu,
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seg_reg == VCPU_SREG_SS ?
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SS_VECTOR : GP_VECTOR,
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0);
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return 1;
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}
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return 0;
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}
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@ -6471,7 +6516,7 @@ static int nested_vmx_check_vmptr(struct kvm_vcpu *vcpu, int exit_reason,
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int maxphyaddr = cpuid_maxphyaddr(vcpu);
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if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
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vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
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vmcs_read32(VMX_INSTRUCTION_INFO), false, &gva))
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return 1;
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if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
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@ -6999,7 +7044,7 @@ static int handle_vmread(struct kvm_vcpu *vcpu)
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field_value);
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} else {
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if (get_vmx_mem_address(vcpu, exit_qualification,
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vmx_instruction_info, &gva))
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vmx_instruction_info, true, &gva))
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return 1;
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/* _system ok, as nested_vmx_check_permission verified cpl=0 */
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kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, gva,
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@ -7036,7 +7081,7 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu)
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(((vmx_instruction_info) >> 3) & 0xf));
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else {
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if (get_vmx_mem_address(vcpu, exit_qualification,
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vmx_instruction_info, &gva))
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vmx_instruction_info, false, &gva))
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return 1;
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if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva,
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&field_value, (is_64_bit_mode(vcpu) ? 8 : 4), &e)) {
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@ -7128,7 +7173,7 @@ static int handle_vmptrst(struct kvm_vcpu *vcpu)
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return 1;
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if (get_vmx_mem_address(vcpu, exit_qualification,
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vmx_instruction_info, &vmcs_gva))
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vmx_instruction_info, true, &vmcs_gva))
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return 1;
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/* ok to use *_system, as nested_vmx_check_permission verified cpl=0 */
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if (kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, vmcs_gva,
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@ -7184,7 +7229,7 @@ static int handle_invept(struct kvm_vcpu *vcpu)
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* operand is read even if it isn't needed (e.g., for type==global)
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*/
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if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
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vmx_instruction_info, &gva))
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vmx_instruction_info, false, &gva))
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return 1;
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if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &operand,
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sizeof(operand), &e)) {
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