From f1a07231611c9c6f6a9a49c5a0f230b4f594d5b4 Mon Sep 17 00:00:00 2001 From: Addy Ke Date: Tue, 19 Aug 2014 18:21:08 +0800 Subject: [PATCH 01/16] ARM: dts: Add sdio0 and sdio1 to the rk3288 This patch requires that land in order to compile. Reviewed-by: Doug Anderson Signed-off-by: Addy Ke Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 102 ++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 9eda0973795f..5f866e0837a8 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -88,6 +88,26 @@ sdmmc: dwmmc@ff0c0000 { status = "disabled"; }; + sdio0: dwmmc@ff0d0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0d0000 0x4000>; + status = "disabled"; + }; + + sdio1: dwmmc@ff0e0000 { + compatible = "rockchip,rk3288-dw-mshc"; + clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>; + clock-names = "biu", "ciu"; + fifo-depth = <0x100>; + interrupts = ; + reg = <0xff0e0000 0x4000>; + status = "disabled"; + }; + emmc: dwmmc@ff0f0000 { compatible = "rockchip,rk3288-dw-mshc"; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; @@ -562,6 +582,88 @@ sdmmc_bus4: sdmmc-bus4 { }; }; + sdio0 { + sdio0_bus1: sdio0-bus1 { + rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_bus4: sdio0-bus4 { + rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_up>, + <4 21 RK_FUNC_1 &pcfg_pull_up>, + <4 22 RK_FUNC_1 &pcfg_pull_up>, + <4 23 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_cmd: sdio0-cmd { + rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_clk: sdio0-clk { + rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none>; + }; + + sdio0_cd: sdio0-cd { + rockchip,pins = <4 26 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_wp: sdio0-wp { + rockchip,pins = <4 27 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_pwr: sdio0-pwr { + rockchip,pins = <4 28 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_bkpwr: sdio0-bkpwr { + rockchip,pins = <4 29 RK_FUNC_1 &pcfg_pull_up>; + }; + + sdio0_int: sdio0-int { + rockchip,pins = <4 30 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + + sdio1 { + sdio1_bus1: sdio1-bus1 { + rockchip,pins = <3 24 4 &pcfg_pull_up>; + }; + + sdio1_bus4: sdio1-bus4 { + rockchip,pins = <3 24 4 &pcfg_pull_up>, + <3 25 4 &pcfg_pull_up>, + <3 26 4 &pcfg_pull_up>, + <3 27 4 &pcfg_pull_up>; + }; + + sdio1_cd: sdio1-cd { + rockchip,pins = <3 28 4 &pcfg_pull_up>; + }; + + sdio1_wp: sdio1-wp { + rockchip,pins = <3 29 4 &pcfg_pull_up>; + }; + + sdio1_bkpwr: sdio1-bkpwr { + rockchip,pins = <3 30 4 &pcfg_pull_up>; + }; + + sdio1_int: sdio1-int { + rockchip,pins = <3 31 4 &pcfg_pull_up>; + }; + + sdio1_cmd: sdio1-cmd { + rockchip,pins = <4 6 4 &pcfg_pull_up>; + }; + + sdio1_clk: sdio1-clk { + rockchip,pins = <4 7 4 &pcfg_pull_none>; + }; + + sdio1_pwr: sdio1-pwr { + rockchip,pins = <4 9 4 &pcfg_pull_up>; + }; + }; + emmc { emmc_clk: emmc-clk { rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none>; From 12dd3653aebe81ea205e226079afb4f119954ec0 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 8 Aug 2014 11:55:58 +0800 Subject: [PATCH 02/16] ARM: dts: add rk3288 dwc2 controller support rk3288 has two kind of usb controller, this add the dwc2 controller for otg and host1. Controller can works with usb PHY default setting and Vbus on. Signed-off-by: Kever Yang Reviewed-by: Doug Anderson Tested-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 5f866e0837a8..2ac3488c47b4 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -256,6 +256,26 @@ usb_host0_ehci: usb@ff500000 { /* NOTE: ohci@ff520000 doesn't actually work on hardware */ + usb_host1: usb@ff540000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff540000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_USBHOST1>; + clock-names = "otg"; + status = "disabled"; + }; + + usb_otg: usb@ff580000 { + compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0xff580000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_OTG0>; + clock-names = "otg"; + status = "disabled"; + }; + usb_hsic: usb@ff5c0000 { compatible = "generic-ehci"; reg = <0xff5c0000 0x100>; From ddf8303f8d818cc002f523c7130aff2c0b1f9a2e Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Fri, 8 Aug 2014 11:55:59 +0800 Subject: [PATCH 03/16] ARM: dts: Enable USB host1(dwc) on rk3288-evb USB host1 port is the host A port nearby the otg port. Signed-off-by: Kever Yang Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 98b69d017de9..cb83cea52fa1 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -177,3 +177,7 @@ host_vbus_drv: host-vbus-drv { &usb_host0_ehci { status = "okay"; }; + +&usb_host1 { + status = "okay"; +}; From 1f53170b80aeb3991b4a250a581422abf93bddb2 Mon Sep 17 00:00:00 2001 From: huang lin Date: Fri, 5 Sep 2014 09:53:11 -0700 Subject: [PATCH 04/16] ARM: dts: Add SPI nodes to rk3288 This adds basic SPI nodes to the base rk3288 device tree file. A few notes: * It's assumed that most users of the SPI ports are using chip select 0. Thus the default pinctrl for the ports enables chip select 0 (but not chip select 1 on ports that have it). If a board wants to use chip select 1 or wants a GPIO chip select the board should override the pinctrl (just like boards can override UART pinctrl if they have hardware flow control). * Since SPI DMA support appears broken and the SPI works fine without DMA we don't include the DMA references. That can come in a later change. Signed-off-by: huang lin Signed-off-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 92 +++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2ac3488c47b4..82fc2fa9b583 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -34,6 +34,9 @@ aliases { serial2 = &uart2; serial3 = &uart3; serial4 = &uart4; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; }; cpus { @@ -128,6 +131,45 @@ saradc: saradc@ff100000 { status = "disabled"; }; + spi0: spi@ff110000 { + compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; + reg = <0xff110000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@ff120000 { + compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; + reg = <0xff120000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@ff130000 { + compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>; + reg = <0xff130000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + i2c1: i2c@ff140000 { compatible = "rockchip,rk3288-i2c"; reg = <0xff140000 0x1000>; @@ -720,6 +762,56 @@ emmc_bus8: emmc-bus8 { }; }; + spi0 { + spi0_clk: spi0-clk { + rockchip,pins = <5 12 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_cs0: spi0-cs0 { + rockchip,pins = <5 13 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_tx: spi0-tx { + rockchip,pins = <5 14 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_rx: spi0-rx { + rockchip,pins = <5 15 RK_FUNC_1 &pcfg_pull_up>; + }; + spi0_cs1: spi0-cs1 { + rockchip,pins = <5 16 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + spi1 { + spi1_clk: spi1-clk { + rockchip,pins = <7 12 RK_FUNC_2 &pcfg_pull_up>; + }; + spi1_cs0: spi1-cs0 { + rockchip,pins = <7 13 RK_FUNC_2 &pcfg_pull_up>; + }; + spi1_rx: spi1-rx { + rockchip,pins = <7 14 RK_FUNC_2 &pcfg_pull_up>; + }; + spi1_tx: spi1-tx { + rockchip,pins = <7 15 RK_FUNC_2 &pcfg_pull_up>; + }; + }; + + spi2 { + spi2_cs1: spi2-cs1 { + rockchip,pins = <8 3 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_clk: spi2-clk { + rockchip,pins = <8 6 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_cs0: spi2-cs0 { + rockchip,pins = <8 7 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_rx: spi2-rx { + rockchip,pins = <8 8 RK_FUNC_1 &pcfg_pull_up>; + }; + spi2_tx: spi2-tx { + rockchip,pins = <8 9 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = <4 16 RK_FUNC_1 &pcfg_pull_up>, From d7f9a3887b91df6404bb4aae101efecc4a4909f7 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Wed, 3 Sep 2014 16:05:23 -0700 Subject: [PATCH 05/16] ARM: dts: Add mshc aliases for rk3288 It's convenient (and less confusing to people reading logs) if the eMMC port on rk3288 is consistenly marked with mmc0 and the sdmmc port on rk3288 is consistently marked with mmc1. Add the appropriate aliases. Signed-off-by: Doug Anderson Reviewed-by: Sonny Rao Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 82fc2fa9b583..37a8ac8b2a91 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -29,6 +29,10 @@ aliases { i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; + mshc0 = &emmc; + mshc1 = &sdmmc; + mshc2 = &sdio0; + mshc3 = &sdio1; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; From 60c20784f243199599a425f73b8060da3a0f5ead Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Tue, 26 Aug 2014 10:28:43 -0700 Subject: [PATCH 06/16] ARM: dts: Add rk808 PMIC to rk3288-evb-rk808 This adds initial support. For now, regulators are always on and we don't specify the input supply for all of the regulators. Signed-off-by: huang lin Signed-off-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb-rk808.dts | 131 +++++++++++++++++++++++++ 1 file changed, 131 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts index 9a88b6c66396..36db177f6a5a 100644 --- a/arch/arm/boot/dts/rk3288-evb-rk808.dts +++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts @@ -16,3 +16,134 @@ / { compatible = "rockchip,rk3288-evb-rk808", "rockchip,rk3288"; }; + +&i2c0 { + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc8-supply = <&vcc_18>; + vcc9-supply = <&vcc_io>; + vcc10-supply = <&vcc_io>; + vcc12-supply = <&vcc_io>; + vddio-supply = <&vccio_pmu>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1300000>; + regulator-name = "vdd_arm"; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + }; + + vccio_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_pmu"; + }; + + vcc_tp: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_tp"; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + }; + + vcc18_lcd: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + }; + + vcca_codec: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_codec"; + }; + + vcc_wl: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_wl"; + }; + + vcc_lcd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_lcd"; + }; + }; + }; +}; From 0f4fc382428f71453d195925a3c63efc48452417 Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Wed, 10 Sep 2014 21:30:15 -0700 Subject: [PATCH 07/16] ARM: dts: Switch i2c0 to 400kHz on rk3288-evb-rk808 We should be able to talk to the PMIC at 400kHz. No need to talk at the slow 100kHz. As measured by ftrace (with a bunch of extra patches, since cpufreq for rk808 hasn't landed yet): before this change: cpu0_set_target() => ~500us after this change: cpu0_set_target() => ~300us Signed-off-by: Doug Anderson Reviewed-by Addy Ke Tested-by Addy Ke Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb-rk808.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts index 36db177f6a5a..ff522f8e3df4 100644 --- a/arch/arm/boot/dts/rk3288-evb-rk808.dts +++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts @@ -18,6 +18,7 @@ / { }; &i2c0 { + clock-frequency = <400000>; status = "okay"; rk808: pmic@1b { From ce6965ebcc0a5fa4bcaeba14956ae57c4e7f339c Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 9 Sep 2014 15:27:27 +0200 Subject: [PATCH 08/16] ARM: dts: rockchip: remove rockchip,bus-index from rk3xxx i2c0 This is a remnant from the first i2c driver iteration that seems to have been forgotten and thus made its way into the dtsi. Remove it. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index cce4a07d6e04..c021df3b01c3 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -135,7 +135,6 @@ i2c0: i2c@2002d000 { #size-cells = <0>; rockchip,grf = <&grf>; - rockchip,bus-index = <0>; clock-names = "i2c"; clocks = <&cru PCLK_I2C0>; From fd14e6f9b461c73c8706a2c7d3fb12fe07e59942 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 9 Sep 2014 15:37:27 +0200 Subject: [PATCH 09/16] ARM: dts: rockchip: add dwc2 controllers for rk3066 and rk3188 Add the two dwc2 controllers providing an otg and a designated host port. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c021df3b01c3..c873624af6aa 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -91,6 +91,24 @@ uart1: serial@10126000 { status = "disabled"; }; + usb_otg: usb@10180000 { + compatible = "rockchip,rk3066-usb", "snps,dwc2"; + reg = <0x10180000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_OTG0>; + clock-names = "otg"; + status = "disabled"; + }; + + usb_host: usb@101c0000 { + compatible = "snps,dwc2"; + reg = <0x101c0000 0x40000>; + interrupts = ; + clocks = <&cru HCLK_OTG1>; + clock-names = "otg"; + status = "disabled"; + }; + mmc0: dwmmc@10214000 { compatible = "rockchip,rk2928-dw-mshc"; reg = <0x10214000 0x1000>; From f1c8547f56f1da9db51fe3281479c823e949a9fd Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 9 Sep 2014 15:40:52 +0200 Subject: [PATCH 10/16] ARM: dts: rockchip: enable usb ports on Radxa Rock This enables both the otg and host port and adds the vbus regulators on the Radxa Rock board. As we don't have phy support yet, the vbus regulators are added in always-on mode. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188-radxarock.dts | 43 ++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index ff35acfa8ae7..1be0c34d4187 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -65,6 +65,19 @@ ir_recv: gpio-ir-receiver { pinctrl-0 = <&ir_recv_pin>; }; + vcc_otg: usb-otg-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "otg-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + vcc_sd0: sdmmc-regulator { compatible = "regulator-fixed"; regulator-name = "sdmmc-supply"; @@ -74,6 +87,19 @@ vcc_sd0: sdmmc-regulator { startup-delay-us = <100000>; vin-supply = <&vcc_io>; }; + + vcc_host: usb-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_drv>; + regulator-name = "host-pwr"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; }; &i2c1 { @@ -218,6 +244,15 @@ ir_recv_pin: ir-recv-pin { rockchip,pins = ; }; }; + + usb { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = <2 31 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &uart0 { @@ -236,6 +271,14 @@ &uart3 { status = "okay"; }; +&usb_host { + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + &wdt { status = "okay"; }; From 39c2bd782a2c50c51bced96ad3f2c97d4997d949 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 10 Sep 2014 16:28:02 +0200 Subject: [PATCH 11/16] ARM: dts: rockchip: add Cortex-A9 SPI controller nodes This adds basic spi nodes and pinctrl settings to the rk3066 and rk3188 devicetree files. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 46 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/rk3188.dtsi | 48 ++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 24 +++++++++++++++++ 3 files changed, 118 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 879a818fba51..8021eed21e39 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -238,6 +238,42 @@ pwm3_out: pwm3-out { }; }; + spi0 { + spi0_clk: spi0-clk { + rockchip,pins = ; + }; + spi0_cs0: spi0-cs0 { + rockchip,pins = ; + }; + spi0_tx: spi0-tx { + rockchip,pins = ; + }; + spi0_rx: spi0-rx { + rockchip,pins = ; + }; + spi0_cs1: spi0-cs1 { + rockchip,pins = ; + }; + }; + + spi1 { + spi1_clk: spi1-clk { + rockchip,pins = ; + }; + spi1_cs0: spi1-cs0 { + rockchip,pins = ; + }; + spi1_rx: spi1-rx { + rockchip,pins = ; + }; + spi1_tx: spi1-tx { + rockchip,pins = ; + }; + spi1_cs1: spi1-cs1 { + rockchip,pins = ; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = , @@ -406,6 +442,16 @@ &pwm3 { pinctrl-0 = <&pwm3_out>; }; +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index ee801a9c6b74..573ef6129fb4 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -206,6 +206,42 @@ pwm3_out: pwm3-out { }; }; + spi0 { + spi0_clk: spi0-clk { + rockchip,pins = ; + }; + spi0_cs0: spi0-cs0 { + rockchip,pins = ; + }; + spi0_tx: spi0-tx { + rockchip,pins = ; + }; + spi0_rx: spi0-rx { + rockchip,pins = ; + }; + spi0_cs1: spi0-cs1 { + rockchip,pins = ; + }; + }; + + spi1 { + spi1_clk: spi1-clk { + rockchip,pins = ; + }; + spi1_cs0: spi1-cs0 { + rockchip,pins = ; + }; + spi1_rx: spi1-rx { + rockchip,pins = ; + }; + spi1_tx: spi1-tx { + rockchip,pins = ; + }; + spi1_cs1: spi1-cs1 { + rockchip,pins = ; + }; + }; + uart0 { uart0_xfer: uart0-xfer { rockchip,pins = , @@ -381,6 +417,18 @@ &pwm3 { pinctrl-0 = <&pwm3_out>; }; +&spi0 { + compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; +}; + +&spi1 { + compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c873624af6aa..7bcd69855052 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -26,6 +26,8 @@ aliases { i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; + spi0 = &spi0; + spi1 = &spi1; }; xin24m: oscillator { @@ -291,4 +293,26 @@ saradc: saradc@2006c000 { clock-names = "saradc", "apb_pclk"; status = "disabled"; }; + + spi0: spi@20070000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + reg = <0x20070000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@20074000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + reg = <0x20074000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; From 4ff4ae1258a9d091e3ab4e467ca101cd6f0ccdd0 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 10 Sep 2014 17:04:36 +0200 Subject: [PATCH 12/16] ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188 Add the controller node, pinctrl settings for the customizable pins and sort the controllers like on rk3288 as emmc, sdmmc, sdio for handling convenience. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 21 +++++++++++++++++++++ arch/arm/boot/dts/rk3188.dtsi | 21 +++++++++++++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 14 ++++++++++++++ 3 files changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 8021eed21e39..ad9c2db59670 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -179,6 +179,27 @@ pcfg_pull_none: pcfg_pull_none { bias-disable; }; + emmc { + emmc_clk: emmc-clk { + rockchip,pins = ; + }; + + emmc_cmd: emmc-cmd { + rockchip,pins = ; + }; + + emmc_rst: emmc-rst { + rockchip,pins = ; + }; + + /* + * The data pins are shared between nandc and emmc and + * not accessible through pinctrl. Also they should've + * been already set correctly by firmware, as + * flash/emmc is the boot-device. + */ + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = , diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 573ef6129fb4..9a1ff0b7ea1e 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -147,6 +147,27 @@ pcfg_pull_none: pcfg_pull_none { bias-disable; }; + emmc { + emmc_clk: emmc-clk { + rockchip,pins = ; + }; + + emmc_cmd: emmc-cmd { + rockchip,pins = ; + }; + + emmc_rst: emmc-rst { + rockchip,pins = ; + }; + + /* + * The data pins are shared between nandc and emmc and + * not accessible through pinctrl. Also they should've + * been already set correctly by firmware, as + * flash/emmc is the boot-device. + */ + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = , diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 7bcd69855052..c383f5ccb27c 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -26,6 +26,9 @@ aliases { i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; + mshc0 = &emmc; + mshc1 = &mmc0; + mshc2 = &mmc1; spi0 = &spi0; spi1 = &spi1; }; @@ -137,6 +140,17 @@ mmc1: dwmmc@10218000 { status = "disabled"; }; + emmc: dwmmc@1021c000 { + compatible = "rockchip,rk2928-dw-mshc"; + reg = <0x1021c000 0x1000>; + interrupts = ; + + clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; + clock-names = "biu", "ciu"; + + status = "disabled"; + }; + pmu: pmu@20004000 { compatible = "rockchip,rk3066-pmu", "syscon"; reg = <0x20004000 0x100>; From 71557d70b3c1c391ade6622a1369a3f2b695a1d8 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 10 Sep 2014 17:10:35 +0200 Subject: [PATCH 13/16] ARM: dts: rockchip: clean up rk3xxx mmc nodes Commit 356649ab6d64 ("ARM: dts: rockchip: unuse the slot-node and deprecate the supports-highspeed for dw-mmc") removed the slots but not the #xx-cells properties describing the subnodes. Do this now. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c383f5ccb27c..9945bb9b6c14 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -118,8 +118,6 @@ mmc0: dwmmc@10214000 { compatible = "rockchip,rk2928-dw-mshc"; reg = <0x10214000 0x1000>; interrupts = ; - #address-cells = <1>; - #size-cells = <0>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; clock-names = "biu", "ciu"; @@ -131,8 +129,6 @@ mmc1: dwmmc@10218000 { compatible = "rockchip,rk2928-dw-mshc"; reg = <0x10218000 0x1000>; interrupts = ; - #address-cells = <1>; - #size-cells = <0>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>; clock-names = "biu", "ciu"; From 66fa6cf29fc67ecbc42efd632c2310688530e441 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 16 Sep 2014 18:53:10 +0200 Subject: [PATCH 14/16] ARM: dts: rockchip: fix swapped Radxa Rock pinctrl references The host and otg regulator pinctrl settings got swapped, making the host reference the otg pinctrl and the other way round. The actual pins are correct (gpio0-3 for host and gpio2-31 for otg). Reported-by: Naoki FUKAUMI Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188-radxarock.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index 1be0c34d4187..c08744d7c5ae 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -70,7 +70,7 @@ vcc_otg: usb-otg-regulator { enable-active-high; gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; + pinctrl-0 = <&otg_vbus_drv>; regulator-name = "otg-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -93,7 +93,7 @@ vcc_host: usb-host-regulator { enable-active-high; gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; + pinctrl-0 = <&host_vbus_drv>; regulator-name = "host-pwr"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; From bee1cef6011c308352c4d428922449953ffb257b Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 16 Sep 2014 18:59:36 +0200 Subject: [PATCH 15/16] ARM: dts: rockchip: fix rk3188 emmc pull references Fix a copy'n'paste error making the rk3188 emmc pinctrl nodes reference the pcfg_pull_default setting that is not available on rk3188. Reported-by: Naoki FUKAUMI Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 9a1ff0b7ea1e..82732f5249b2 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -149,15 +149,15 @@ pcfg_pull_none: pcfg_pull_none { emmc { emmc_clk: emmc-clk { - rockchip,pins = ; + rockchip,pins = ; }; emmc_cmd: emmc-cmd { - rockchip,pins = ; + rockchip,pins = ; }; emmc_rst: emmc-rst { - rockchip,pins = ; + rockchip,pins = ; }; /* From 6051ddd4f94894cce8fde3aa29f90ae6c567fc46 Mon Sep 17 00:00:00 2001 From: Romain Perier Date: Fri, 19 Sep 2014 12:36:27 +0000 Subject: [PATCH 16/16] ARM: dts: rockchip: Remove "regulator-always-on" in vcc_rmii for Radxa Rock On Rockchip RK3188 SoCs the platform driver emac_rockchip is used. This variant driver enables this regulator when the device driver is loaded. The phy no longer needs to be always on. Signed-off-by: Romain Perier Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188-radxarock.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts index c08744d7c5ae..61d364e55e4b 100644 --- a/arch/arm/boot/dts/rk3188-radxarock.dts +++ b/arch/arm/boot/dts/rk3188-radxarock.dts @@ -186,7 +186,6 @@ vcc_rmii: REG9 { regulator-name = "VCC_RMII"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-always-on; }; vccio_wl: REG10 {