x86: unify CPU feature string names
Move the CPU feature string names to a separate file (common to 32 and 64 bits); additionally, make <asm/cpufeature.h> includable by host code in preparation for including the CPU feature strings in the boot code. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
H. Peter Anvin
Ingo Molnar
parent
84fb144b92
commit
fa1408e4df
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@ -3,6 +3,7 @@
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#
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obj-y := intel_cacheinfo.o addon_cpuid_features.o
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obj-y += feature_names.o
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obj-$(CONFIG_X86_32) += common.o proc.o bugs.o
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obj-$(CONFIG_X86_32) += amd.o
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@ -0,0 +1,83 @@
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/*
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* Strings for the various x86 capability flags.
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*
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* This file must not contain any executable code.
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*/
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#include "asm/cpufeature.h"
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/*
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* These flag bits must match the definitions in <asm/cpufeature.h>.
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* NULL means this bit is undefined or reserved; either way it doesn't
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* have meaning as far as Linux is concerned. Note that it's important
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* to realize there is a difference between this table and CPUID -- if
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* applications want to get the raw CPUID data, they should access
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* /dev/cpu/<cpu_nr>/cpuid instead.
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*/
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const char * const x86_cap_flags[NCAPINTS*32] = {
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/* Intel-defined */
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"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
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"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
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/* AMD-defined */
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
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NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
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"3dnowext", "3dnow",
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/* Transmeta-defined */
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"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Other (Linux-defined) */
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"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
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NULL, NULL, NULL, NULL,
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"constant_tsc", "up", NULL, "arch_perfmon",
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"pebs", "bts", NULL, NULL,
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"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Intel-defined (#2) */
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"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
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"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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NULL, NULL, "dca", "sse4_1", "sse4_2", NULL, NULL, "popcnt",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* VIA/Cyrix/Centaur-defined */
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NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
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"ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* AMD-defined (#2) */
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"lahf_lm", "cmp_legacy", "svm", "extapic",
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"cr8_legacy", "abm", "sse4a", "misalignsse",
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"3dnowprefetch", "osvw", "ibs", "sse5",
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"skinit", "wdt", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Auxiliary (Linux-defined) */
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"ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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const char *const x86_power_flags[32] = {
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"ts", /* temperature sensor */
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"fid", /* frequency id control */
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"vid", /* voltage id control */
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"ttp", /* thermal trip */
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"tm",
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"stc",
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"100mhzsteps",
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"hwpstate",
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"", /* tsc invariant mapped to constant_tsc */
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/* nothing */
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};
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@ -10,80 +10,6 @@
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*/
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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/*
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* These flag bits must match the definitions in <asm/cpufeature.h>.
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* NULL means this bit is undefined or reserved; either way it doesn't
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* have meaning as far as Linux is concerned. Note that it's important
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* to realize there is a difference between this table and CPUID -- if
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* applications want to get the raw CPUID data, they should access
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* /dev/cpu/<cpu_nr>/cpuid instead.
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*/
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static const char * const x86_cap_flags[] = {
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/* Intel-defined */
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"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
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"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
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/* AMD-defined */
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
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NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
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"3dnowext", "3dnow",
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/* Transmeta-defined */
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"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Other (Linux-defined) */
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"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
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NULL, NULL, NULL, NULL,
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"constant_tsc", "up", NULL, "arch_perfmon",
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"pebs", "bts", NULL, "sync_rdtsc",
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"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Intel-defined (#2) */
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"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
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"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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NULL, NULL, "dca", "sse4_1", "sse4_2", NULL, NULL, "popcnt",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* VIA/Cyrix/Centaur-defined */
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NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
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"ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* AMD-defined (#2) */
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"lahf_lm", "cmp_legacy", "svm", "extapic",
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"cr8_legacy", "abm", "sse4a", "misalignsse",
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"3dnowprefetch", "osvw", "ibs", "sse5",
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"skinit", "wdt", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Auxiliary (Linux-defined) */
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"ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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static const char * const x86_power_flags[] = {
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"ts", /* temperature sensor */
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"fid", /* frequency id control */
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"vid", /* voltage id control */
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"ttp", /* thermal trip */
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"tm",
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"stc",
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"100mhzsteps",
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"hwpstate",
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"", /* constant_tsc - moved to flags */
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/* nothing */
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};
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struct cpuinfo_x86 *c = v;
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int i, n = 0;
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int fpu_exception;
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@ -1068,82 +1068,6 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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struct cpuinfo_x86 *c = v;
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int cpu = 0, i;
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/*
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* These flag bits must match the definitions in <asm/cpufeature.h>.
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* NULL means this bit is undefined or reserved; either way it doesn't
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* have meaning as far as Linux is concerned. Note that it's important
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* to realize there is a difference between this table and CPUID -- if
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* applications want to get the raw CPUID data, they should access
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* /dev/cpu/<cpu_nr>/cpuid instead.
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*/
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static const char *const x86_cap_flags[] = {
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/* Intel-defined */
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"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
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"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
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"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
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"fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", "pbe",
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/* AMD-defined */
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
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NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
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"3dnowext", "3dnow",
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/* Transmeta-defined */
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"recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Other (Linux-defined) */
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"cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
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NULL, NULL, NULL, NULL,
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"constant_tsc", "up", NULL, "arch_perfmon",
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"pebs", "bts", NULL, "sync_rdtsc",
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"rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Intel-defined (#2) */
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"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
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"tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
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NULL, NULL, "dca", "sse4_1", "sse4_2", NULL, NULL, "popcnt",
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* VIA/Cyrix/Centaur-defined */
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NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
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"ace2", "ace2_en", "phe", "phe_en", "pmm", "pmm_en", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* AMD-defined (#2) */
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"lahf_lm", "cmp_legacy", "svm", "extapic",
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"cr8_legacy", "abm", "sse4a", "misalignsse",
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"3dnowprefetch", "osvw", "ibs", "sse5",
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"skinit", "wdt", NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/* Auxiliary (Linux-defined) */
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"ida", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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};
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static const char *const x86_power_flags[] = {
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"ts", /* temperature sensor */
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"fid", /* frequency id control */
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"vid", /* voltage id control */
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"ttp", /* thermal trip */
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"tm",
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"stc",
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"100mhzsteps",
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"hwpstate",
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"", /* tsc invariant mapped to constant_tsc */
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/* nothing */
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};
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#ifdef CONFIG_SMP
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cpu = c->cpu_index;
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#endif
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@ -4,9 +4,6 @@
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#ifndef _ASM_X86_CPUFEATURE_H
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#define _ASM_X86_CPUFEATURE_H
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#ifndef __ASSEMBLY__
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#include <linux/bitops.h>
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#endif
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#include <asm/required-features.h>
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#define NCAPINTS 8 /* N 32-bit words worth of info */
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@ -115,6 +112,13 @@
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*/
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#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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#include <linux/bitops.h>
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extern const char * const x86_cap_flags[NCAPINTS*32];
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extern const char * const x86_power_flags[32];
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#define cpu_has(c, bit) \
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(__builtin_constant_p(bit) && \
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( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \
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@ -204,4 +208,6 @@
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#endif /* CONFIG_X86_64 */
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#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
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#endif /* _ASM_X86_CPUFEATURE_H */
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