- New Device Support
- Add support for Lakefield PCH to Intel LPSS PCI
- Remove Device Support
- Remove support for ROHM BD70528 Power Management IC
- New Functionality
- Add support for SMBus and I2C mode to Dialog DA9062/61 PMIC
- Enable I2C4 on Microsoft Surface Go & Go 2
- Fix-ups
- Device Tree changes (inc. YAML conversion); maxim,max77686,
rohm,bd9571mwv, syscon, brcm,twd, google,cros-ec
- Use __maybe_unused instead of #ifery; atmel-flexcom
- Allow the Regmap API to handle endianess internally; ntxec
- Utilise I2C's .resume_noirq call-back; atmel-flexcom
- Remove unused code; ti_am335x_tscadc
- Use CPU-id instead of ACPI _HRV to ID variants; intel_soc_pmic_core
- Allow device to power-off right from .probe(); tps65910
- Trivial (whitespace, typos, etc); da9063
- Bug Fixes
- Fix ordering issues during probe; intel-lpss-acpi
- Fix correct clock speed; intel-lpss-pci
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Merge tag 'mfd-next-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Device Support:
- Add support for Lakefield PCH to Intel LPSS PCI
Remove Device Support:
- Remove support for ROHM BD70528 Power Management IC
New Functionality:
- Add support for SMBus and I2C mode to Dialog DA9062/61 PMIC
- Enable I2C4 on Microsoft Surface Go & Go 2
Fix-ups:
- Device Tree changes (inc. YAML conversion); maxim,max77686,
rohm,bd9571mwv, syscon, brcm,twd, google,cros-ec
- Use __maybe_unused instead of #ifery; atmel-flexcom
- Allow the Regmap API to handle endianess internally; ntxec
- Utilise I2C's .resume_noirq call-back; atmel-flexcom
- Remove unused code; ti_am335x_tscadc
- Use CPU-id instead of ACPI _HRV to ID variants; intel_soc_pmic_core
- Allow device to power-off right from .probe(); tps65910
- Trivial (whitespace, typos, etc); da9063
Bug Fixes:
- Fix ordering issues during probe; intel-lpss-acpi
- Fix correct clock speed; intel-lpss-pci"
* tag 'mfd-next-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (25 commits)
mfd: google,cros-ec: Fix property name for MediaTek rpmsg
dt-bindings: mfd: Fix typo "DA9093" -> "DA9063"
mfd: ntxec: Change return type of ntxec_reg8 from __be16 to u16
mfd: tps65910: Set PWR_OFF bit during driver probe
mfd: intel_soc_pmic: Use CPU-id check instead of _HRV check to differentiate variants
mfd: intel-lpss: Fix I2C4 not being available on the Microsoft Surface Go & Go 2
dt-bindings: mfd: Add Broadcom's Timer-Watchdog block
dt-bindings: mfd: Add Freecom system controller
mfd: Kconfig: Change INTEL_SOC_PMIC_CHTDC_TI to bool
dt-bindings: mfd: syscon: Add samsung,exynos850-sysreg
mfd: da9062: Support SMBus and I2C mode
mfd: intel-lpss-pci: Fix clock speed for 38a8 UART
mfd: intel-lpss: Fix too early PM enablement in the ACPI ->probe()
mfd: ti_am335x_tscadc: Drop the CNTRLREG_TSC_8WIRE macro
mfd: stmpe: Support disabling sub-functions
mfd: atmel-flexcom: Use .resume_noirq
mfd: atmel-flexcom: Remove #ifdef CONFIG_PM_SLEEP
dt-bindings: mfd: bd9571mwv: Convert to json-schema
mfd: intel-lpss: Add Intel Lakefield PCH PCI IDs
dt-bindings: mfd: maxim,max77686: Convert to dtschema
...
This commit is contained in:
Linus Torvalds
commit
fa722ecb93
|
|
@ -1,69 +0,0 @@
|
|||
* ROHM BD9571MWV/BD9574MWF Power Management Integrated Circuit (PMIC) bindings
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "rohm,bd9571mwv" or "rohm,bd9574mwf".
|
||||
- reg : I2C slave address.
|
||||
- interrupts : The interrupt line the device is connected to.
|
||||
- interrupt-controller : Marks the device node as an interrupt controller.
|
||||
- #interrupt-cells : The number of cells to describe an IRQ, should be 2.
|
||||
The first cell is the IRQ number.
|
||||
The second cell is the flags, encoded as trigger
|
||||
masks from ../interrupt-controller/interrupts.txt.
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||||
- gpio-controller : Marks the device node as a GPIO Controller.
|
||||
- #gpio-cells : Should be two. The first cell is the pin number and
|
||||
the second cell is used to specify flags.
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||||
See ../gpio/gpio.txt for more information.
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- regulators: : List of child nodes that specify the regulator
|
||||
initialization data. Child nodes must be named
|
||||
after their hardware counterparts:
|
||||
- vd09
|
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- vd18
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- vd25
|
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- vd33
|
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- dvfs
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Each child node is defined using the standard
|
||||
binding for regulators.
|
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|
||||
Optional properties:
|
||||
- rohm,ddr-backup-power : Value to use for DDR-Backup Power (default 0).
|
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This is a bitmask that specifies which DDR power
|
||||
rails need to be kept powered when backup mode is
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entered, for system suspend:
|
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- bit 0: DDR0
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- bit 1: DDR1
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- bit 2: DDR0C
|
||||
- bit 3: DDR1C
|
||||
These bits match the KEEPON_DDR* bits in the
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||||
documentation for the "BKUP Mode Cnt" register.
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- rohm,rstbmode-level: The RSTB signal is configured for level mode, to
|
||||
accommodate a toggle power switch (the RSTBMODE pin is
|
||||
strapped low).
|
||||
- rohm,rstbmode-pulse: The RSTB signal is configured for pulse mode, to
|
||||
accommodate a momentary power switch (the RSTBMODE pin
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||||
is strapped high).
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||||
The two properties above are mutually exclusive.
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|
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Example:
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pmic: pmic@30 {
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compatible = "rohm,bd9571mwv";
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reg = <0x30>;
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interrupt-parent = <&gpio2>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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rohm,ddr-backup-power = <0xf>;
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rohm,rstbmode-pulse;
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|
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regulators {
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dvfs: dvfs {
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regulator-name = "dvfs";
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regulator-min-microvolt = <750000>;
|
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regulator-max-microvolt = <1030000>;
|
||||
regulator-boot-on;
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regulator-always-on;
|
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};
|
||||
};
|
||||
};
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|
|
@ -0,0 +1,61 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mfd/brcm,twd.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
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title: Broadcom's Timer-Watchdog (aka TWD)
|
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|
||||
maintainers:
|
||||
- Rafał Miłecki <rafal@milecki.pl>
|
||||
|
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description: |
|
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Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
|
||||
BCM63xx, BCM7038). There are few variants available (they differ slightly in
|
||||
registers layout). This block consists of: timers, watchdog and optionally a
|
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software reset handler.
|
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|
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properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- brcm,bcm4908-twd
|
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- brcm,bcm7038-twd
|
||||
- const: simple-mfd
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
patternProperties:
|
||||
'^watchdog@[a-f0-9]+$':
|
||||
$ref: /schemas/watchdog/brcm,bcm7038-wdt.yaml
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
timer-mfd@ff800400 {
|
||||
compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
|
||||
reg = <0xff800400 0x4c>;
|
||||
ranges = <0x00000000 0xff800400 0x4c>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
watchdog@28 {
|
||||
compatible = "brcm,bcm7038-wdt";
|
||||
reg = <0x28 0x8>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
* Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
|
||||
|
||||
DA9093 consists of a large and varied group of sub-devices (I2C Only):
|
||||
DA9063 consists of a large and varied group of sub-devices (I2C Only):
|
||||
|
||||
Device Supply Names Description
|
||||
------ ------------ -----------
|
||||
|
|
|
|||
|
|
@ -59,7 +59,7 @@ properties:
|
|||
whether this nvram is present or not.
|
||||
type: boolean
|
||||
|
||||
mtk,rpmsg-name:
|
||||
mediatek,rpmsg-name:
|
||||
description:
|
||||
Must be defined if the cros-ec is a rpmsg device for a Mediatek
|
||||
ARM Cortex M4 Co-processor. Contains the name pf the rpmsg
|
||||
|
|
|
|||
|
|
@ -1,26 +0,0 @@
|
|||
Maxim MAX77686 multi-function device
|
||||
|
||||
MAX77686 is a Multifunction device with PMIC, RTC and Charger on chip. It is
|
||||
interfaced to host controller using i2c interface. PMIC and Charger submodules
|
||||
are addressed using same i2c slave address whereas RTC submodule uses
|
||||
different i2c slave address,presently for which we are statically creating i2c
|
||||
client while probing.This document describes the binding for mfd device and
|
||||
PMIC submodule.
|
||||
|
||||
Bindings for the built-in 32k clock generator block and
|
||||
regulators are defined in ../clk/maxim,max77686.txt and
|
||||
../regulator/max77686.txt respectively.
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "maxim,max77686";
|
||||
- reg : Specifies the i2c slave address of PMIC block.
|
||||
- interrupts : This i2c device has an IRQ line connected to the main SoC.
|
||||
|
||||
Example:
|
||||
|
||||
max77686: pmic@9 {
|
||||
compatible = "maxim,max77686";
|
||||
interrupt-parent = <&wakeup_eint>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <0x09>;
|
||||
};
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mfd/maxim,max77686.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim MAX77686 Power Management IC
|
||||
|
||||
maintainers:
|
||||
- Chanwoo Choi <cw00.choi@samsung.com>
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
||||
|
||||
description: |
|
||||
This is a part of device tree bindings for Maxim MAX77686 Power Management
|
||||
Integrated Circuit (PMIC).
|
||||
|
||||
The Maxim MAX77686 is a Power Management IC which includes voltage and
|
||||
current regulators, RTC and clock outputs.
|
||||
|
||||
The MAX77686 provides three 32.768khz clock outputs that can be controlled
|
||||
(gated/ungated) over I2C. The clock IDs are defined as preprocessor macros
|
||||
in dt-bindings/clock/maxim,max77686.h.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: maxim,max77686
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
voltage-regulators:
|
||||
$ref: ../regulator/maxim,max77686.yaml
|
||||
description:
|
||||
List of child nodes that specify the regulators.
|
||||
|
||||
wakeup-source: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#clock-cells'
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
max77686: pmic@9 {
|
||||
compatible = "maxim,max77686";
|
||||
reg = <0x09>;
|
||||
|
||||
interrupt-parent = <&gpx0>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-0 = <&max77686_irq>;
|
||||
pinctrl-names = "default";
|
||||
wakeup-source;
|
||||
#clock-cells = <1>;
|
||||
|
||||
voltage-regulators {
|
||||
LDO1 {
|
||||
regulator-name = "VALIVE_1.0V_AP";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
LDO2 {
|
||||
regulator-name = "VM1M2_1.2V_AP";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
// ...
|
||||
|
||||
LDO22 {
|
||||
regulator-name = "VMEM_VDD_2.8V";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
// ...
|
||||
|
||||
BUCK1 {
|
||||
regulator-name = "VDD_MIF";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
BUCK2 {
|
||||
regulator-name = "VDD_ARM";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
// ...
|
||||
|
||||
BUCK9 {
|
||||
regulator-name = "CAM_ISP_CORE_1.2V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,102 +0,0 @@
|
|||
* ROHM BD70528 Power Management Integrated Circuit bindings
|
||||
|
||||
BD70528MWV is an ultra-low quiescent current general purpose, single-chip,
|
||||
power management IC for battery-powered portable devices. The IC
|
||||
integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2
|
||||
LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz
|
||||
clock gate, high-accuracy VREF for use with an external ADC, flexible
|
||||
dual-input power path, 10 bit SAR ADC for battery temperature monitor and
|
||||
1S battery charger with scalable charge currents.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "rohm,bd70528"
|
||||
- reg : I2C slave address.
|
||||
- interrupts : The interrupt line the device is connected to.
|
||||
- interrupt-controller : To indicate BD70528 acts as an interrupt controller.
|
||||
- #interrupt-cells : Should be 2. Usage is compliant to the 2 cells
|
||||
variant of ../interrupt-controller/interrupts.txt
|
||||
- gpio-controller : To indicate BD70528 acts as a GPIO controller.
|
||||
- #gpio-cells : Should be 2. The first cell is the pin number and
|
||||
the second cell is used to specify flags. See
|
||||
../gpio/gpio.txt for more information.
|
||||
- #clock-cells : Should be 0.
|
||||
- regulators: : List of child nodes that specify the regulators.
|
||||
Please see ../regulator/rohm,bd70528-regulator.txt
|
||||
|
||||
Optional properties:
|
||||
- clock-output-names : Should contain name for output clock.
|
||||
|
||||
Example:
|
||||
/* External oscillator */
|
||||
osc: oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "osc";
|
||||
};
|
||||
|
||||
pmic: pmic@4b {
|
||||
compatible = "rohm,bd70528";
|
||||
reg = <0x4b>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
||||
clocks = <&osc 0>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "bd70528-32k-out";
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
regulators {
|
||||
buck1: BUCK1 {
|
||||
regulator-name = "buck1";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
regulator-ramp-delay = <125>;
|
||||
};
|
||||
buck2: BUCK2 {
|
||||
regulator-name = "buck2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-ramp-delay = <125>;
|
||||
};
|
||||
buck3: BUCK3 {
|
||||
regulator-name = "buck3";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-ramp-delay = <250>;
|
||||
};
|
||||
ldo1: LDO1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1650000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
ldo2: LDO2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1650000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo3: LDO3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1650000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
led_ldo1: LED_LDO1 {
|
||||
regulator-name = "led_ldo1";
|
||||
regulator-min-microvolt = <200000>;
|
||||
regulator-max-microvolt = <300000>;
|
||||
};
|
||||
led_ldo2: LED_LDO2 {
|
||||
regulator-name = "led_ldo2";
|
||||
regulator-min-microvolt = <200000>;
|
||||
regulator-max-microvolt = <300000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,127 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mfd/rohm,bd9571mwv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ROHM BD9571MWV/BD9574MWF Power Management Integrated Circuit (PMIC)
|
||||
|
||||
maintainers:
|
||||
- Marek Vasut <marek.vasut@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- rohm,bd9571mwv
|
||||
- rohm,bd9574mwf
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
interrupt-controller: true
|
||||
|
||||
'#interrupt-cells':
|
||||
const: 2
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
'#gpio-cells':
|
||||
const: 2
|
||||
|
||||
rohm,ddr-backup-power:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0x0
|
||||
maximum: 0xf
|
||||
description: |
|
||||
Value to use for DDR-Backup Power (default 0).
|
||||
This is a bitmask that specifies which DDR power rails need to be kept
|
||||
powered when backup mode is entered, for system suspend:
|
||||
- bit 0: DDR0
|
||||
- bit 1: DDR1
|
||||
- bit 2: DDR0C
|
||||
- bit 3: DDR1C
|
||||
These bits match the KEEPON_DDR* bits in the documentation for the "BKUP
|
||||
Mode Cnt" register.
|
||||
|
||||
rohm,rstbmode-level:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
The RSTB signal is configured for level mode, to accommodate a toggle
|
||||
power switch (the RSTBMODE pin is strapped low).
|
||||
|
||||
rohm,rstbmode-pulse:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
The RSTB signal is configured for pulse mode, to accommodate a momentary
|
||||
power switch (the RSTBMODE pin is strapped high).
|
||||
|
||||
regulators:
|
||||
type: object
|
||||
description:
|
||||
List of child nodes that specify the regulator initialization data.
|
||||
Child nodes must be named after their hardware counterparts.
|
||||
|
||||
patternProperties:
|
||||
"^(vd09|vd18|vd25|vd33|dvfs)$":
|
||||
type: object
|
||||
$ref: ../regulator/regulator.yaml#
|
||||
|
||||
properties:
|
||||
regulator-name:
|
||||
pattern: "^(vd09|vd18|vd25|vd33|dvfs)$"
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-controller
|
||||
- '#interrupt-cells'
|
||||
- gpio-controller
|
||||
- '#gpio-cells'
|
||||
|
||||
oneOf:
|
||||
- required:
|
||||
- rohm,rstbmode-level
|
||||
- required:
|
||||
- rohm,rstbmode-pulse
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
i2c {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pmic: pmic@30 {
|
||||
compatible = "rohm,bd9571mwv";
|
||||
reg = <0x30>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
rohm,ddr-backup-power = <0xf>;
|
||||
rohm,rstbmode-pulse;
|
||||
|
||||
regulators {
|
||||
dvfs: dvfs {
|
||||
regulator-name = "dvfs";
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <1030000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -39,6 +39,7 @@ properties:
|
|||
- allwinner,sun8i-v3s-system-controller
|
||||
- allwinner,sun50i-a64-system-controller
|
||||
- brcm,cru-clkset
|
||||
- freecom,fsg-cs2-system-controller
|
||||
- hisilicon,dsa-subctrl
|
||||
- hisilicon,hi6220-sramctrl
|
||||
- hisilicon,pcie-sas-subctrl
|
||||
|
|
@ -57,6 +58,7 @@ properties:
|
|||
- samsung,exynos4-sysreg
|
||||
- samsung,exynos5-sysreg
|
||||
- samsung,exynos5433-sysreg
|
||||
- samsung,exynos850-sysreg
|
||||
- samsung,exynosautov9-sysreg
|
||||
|
||||
- const: syscon
|
||||
|
|
|
|||
|
|
@ -1,71 +0,0 @@
|
|||
Binding for Maxim MAX77686 regulators
|
||||
|
||||
This is a part of the device tree bindings of MAX77686 multi-function device.
|
||||
More information can be found in ../mfd/max77686.txt file.
|
||||
|
||||
The MAX77686 PMIC has 9 high-efficiency Buck and 26 Low-DropOut (LDO)
|
||||
regulators that can be controlled over I2C.
|
||||
|
||||
Following properties should be present in main device node of the MFD chip.
|
||||
|
||||
Optional node:
|
||||
- voltage-regulators : The regulators of max77686 have to be instantiated
|
||||
under subnode named "voltage-regulators" using the following format.
|
||||
|
||||
regulator_name {
|
||||
regulator-compatible = LDOn/BUCKn
|
||||
standard regulator constraints....
|
||||
};
|
||||
refer Documentation/devicetree/bindings/regulator/regulator.txt
|
||||
|
||||
The regulator node's name should be initialized with a string
|
||||
to get matched with their hardware counterparts as follow:
|
||||
|
||||
-LDOn : for LDOs, where n can lie in range 1 to 26.
|
||||
example: LDO1, LDO2, LDO26.
|
||||
-BUCKn : for BUCKs, where n can lie in range 1 to 9.
|
||||
example: BUCK1, BUCK5, BUCK9.
|
||||
|
||||
Regulators which can be turned off during system suspend:
|
||||
-LDOn : 2, 6-8, 10-12, 14-16,
|
||||
-BUCKn : 1-4.
|
||||
Use standard regulator bindings for it ('regulator-off-in-suspend').
|
||||
|
||||
LDO20, LDO21, LDO22, BUCK8 and BUCK9 can be configured to GPIO enable
|
||||
control. To turn this feature on this property must be added to the regulator
|
||||
sub-node:
|
||||
- maxim,ena-gpios : one GPIO specifier enable control (the gpio
|
||||
flags are actually ignored and always
|
||||
ACTIVE_HIGH is used)
|
||||
|
||||
Example:
|
||||
|
||||
max77686: pmic@9 {
|
||||
compatible = "maxim,max77686";
|
||||
interrupt-parent = <&wakeup_eint>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <0x09>;
|
||||
|
||||
voltage-regulators {
|
||||
ldo11_reg: LDO11 {
|
||||
regulator-name = "vdd_ldo11";
|
||||
regulator-min-microvolt = <1900000>;
|
||||
regulator-max-microvolt = <1900000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
buck1_reg: BUCK1 {
|
||||
regulator-name = "vdd_mif";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
buck9_reg: BUCK9 {
|
||||
regulator-name = "CAM_ISP_CORE_1.2V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/regulator/maxim,max77686.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Maxim MAX77686 Power Management IC regulators
|
||||
|
||||
maintainers:
|
||||
- Chanwoo Choi <cw00.choi@samsung.com>
|
||||
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
||||
|
||||
description: |
|
||||
This is a part of device tree bindings for Maxim MAX77686 Power Management
|
||||
Integrated Circuit (PMIC).
|
||||
|
||||
The Maxim MAX77686 provides high-efficiency Buck and 26 Low-DropOut (LDO)
|
||||
regulators.
|
||||
|
||||
See also Documentation/devicetree/bindings/mfd/maxim,max77686.yaml for
|
||||
additional information and example.
|
||||
|
||||
patternProperties:
|
||||
# 26 LDOs
|
||||
"^LDO([1-9]|1[0-9]|2[3-6])$":
|
||||
type: object
|
||||
$ref: regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
Properties for single LDO regulator.
|
||||
Regulators which can be turned off during system suspend:
|
||||
LDO2, LDO6-8, LDO10-12, LDO14-16
|
||||
|
||||
required:
|
||||
- regulator-name
|
||||
|
||||
# LDO20-LDO22 with maxim,ena-gpios
|
||||
"^LDO2[0-2]$":
|
||||
type: object
|
||||
$ref: regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
Properties for single LDO regulator.
|
||||
|
||||
properties:
|
||||
maxim,ena-gpios:
|
||||
maxItems: 1
|
||||
description: |
|
||||
GPIO specifier to enable the GPIO control (on/off) for regulator.
|
||||
|
||||
required:
|
||||
- regulator-name
|
||||
|
||||
# 9 bucks
|
||||
"^BUCK[1-7]$":
|
||||
type: object
|
||||
$ref: regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
Properties for single BUCK regulator.
|
||||
Regulators which can be turned off during system suspend:
|
||||
BUCK[1-4]
|
||||
|
||||
required:
|
||||
- regulator-name
|
||||
|
||||
"^BUCK[89]$":
|
||||
type: object
|
||||
$ref: regulator.yaml#
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
Properties for single BUCK regulator.
|
||||
|
||||
properties:
|
||||
maxim,ena-gpios:
|
||||
maxItems: 1
|
||||
description: |
|
||||
GPIO specifier to enable the GPIO control (on/off) for regulator.
|
||||
|
||||
required:
|
||||
- regulator-name
|
||||
|
||||
additionalProperties: false
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
ROHM BD70528 Power Management Integrated Circuit regulator bindings
|
||||
|
||||
Required properties:
|
||||
- regulator-name: should be "buck1", "buck2", "buck3", "ldo1", "ldo2", "ldo3",
|
||||
"led_ldo1", "led_ldo2"
|
||||
|
||||
List of regulators provided by this controller. BD70528 regulators node
|
||||
should be sub node of the BD70528 MFD node. See BD70528 MFD bindings at
|
||||
Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt
|
||||
|
||||
The valid names for BD70528 regulator nodes are:
|
||||
BUCK1, BUCK2, BUCK3, LDO1, LDO2, LDO3, LED_LDO1, LED_LDO2
|
||||
|
||||
Optional properties:
|
||||
- Any optional property defined in bindings/regulator/regulator.txt
|
||||
|
||||
Example:
|
||||
regulators {
|
||||
buck1: BUCK1 {
|
||||
regulator-name = "buck1";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3400000>;
|
||||
regulator-boot-on;
|
||||
regulator-ramp-delay = <125>;
|
||||
};
|
||||
buck2: BUCK2 {
|
||||
regulator-name = "buck2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-ramp-delay = <125>;
|
||||
};
|
||||
buck3: BUCK3 {
|
||||
regulator-name = "buck3";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-boot-on;
|
||||
regulator-ramp-delay = <250>;
|
||||
};
|
||||
ldo1: LDO1 {
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1650000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
ldo2: LDO2 {
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1650000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo3: LDO3 {
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1650000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
led_ldo1: LED_LDO1 {
|
||||
regulator-name = "led_ldo1";
|
||||
regulator-min-microvolt = <200000>;
|
||||
regulator-max-microvolt = <300000>;
|
||||
};
|
||||
led_ldo2: LED_LDO2 {
|
||||
regulator-name = "led_ldo2";
|
||||
regulator-min-microvolt = <200000>;
|
||||
regulator-max-microvolt = <300000>;
|
||||
};
|
||||
};
|
||||
10
MAINTAINERS
10
MAINTAINERS
|
|
@ -11702,7 +11702,7 @@ M: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
|
|||
M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/*/max77686.txt
|
||||
F: Documentation/devicetree/bindings/*/maxim,max77686.yaml
|
||||
F: Documentation/devicetree/bindings/clock/maxim,max77686.txt
|
||||
F: Documentation/devicetree/bindings/mfd/max14577.txt
|
||||
F: Documentation/devicetree/bindings/mfd/max77693.txt
|
||||
|
|
@ -16601,27 +16601,19 @@ ROHM POWER MANAGEMENT IC DEVICE DRIVERS
|
|||
R: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
|
||||
L: linux-power@fi.rohmeurope.com
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt
|
||||
F: Documentation/devicetree/bindings/regulator/rohm,bd70528-regulator.txt
|
||||
F: drivers/clk/clk-bd718x7.c
|
||||
F: drivers/gpio/gpio-bd70528.c
|
||||
F: drivers/gpio/gpio-bd71815.c
|
||||
F: drivers/gpio/gpio-bd71828.c
|
||||
F: drivers/mfd/rohm-bd70528.c
|
||||
F: drivers/mfd/rohm-bd71828.c
|
||||
F: drivers/mfd/rohm-bd718x7.c
|
||||
F: drivers/mfd/rohm-bd9576.c
|
||||
F: drivers/power/supply/bd70528-charger.c
|
||||
F: drivers/regulator/bd70528-regulator.c
|
||||
F: drivers/regulator/bd71815-regulator.c
|
||||
F: drivers/regulator/bd71828-regulator.c
|
||||
F: drivers/regulator/bd718x7-regulator.c
|
||||
F: drivers/regulator/bd9576-regulator.c
|
||||
F: drivers/regulator/rohm-regulator.c
|
||||
F: drivers/rtc/rtc-bd70528.c
|
||||
F: drivers/watchdog/bd70528_wdt.c
|
||||
F: drivers/watchdog/bd9576_wdt.c
|
||||
F: include/linux/mfd/rohm-bd70528.h
|
||||
F: include/linux/mfd/rohm-bd71815.h
|
||||
F: include/linux/mfd/rohm-bd71828.h
|
||||
F: include/linux/mfd/rohm-bd718x7.h
|
||||
|
|
|
|||
|
|
@ -1133,17 +1133,6 @@ config GPIO_ARIZONA
|
|||
help
|
||||
Support for GPIOs on Wolfson Arizona class devices.
|
||||
|
||||
config GPIO_BD70528
|
||||
tristate "ROHM BD70528 GPIO support"
|
||||
depends on MFD_ROHM_BD70528
|
||||
help
|
||||
Support for GPIOs on ROHM BD70528 PMIC. There are four GPIOs
|
||||
available on the ROHM PMIC in total. The GPIOs can also
|
||||
generate interrupts.
|
||||
|
||||
This driver can also be built as a module. If so, the module
|
||||
will be called gpio-bd70528.
|
||||
|
||||
config GPIO_BD71815
|
||||
tristate "ROHM BD71815 PMIC GPIO support"
|
||||
depends on MFD_ROHM_BD71828
|
||||
|
|
|
|||
|
|
@ -38,7 +38,6 @@ obj-$(CONFIG_GPIO_ASPEED_SGPIO) += gpio-aspeed-sgpio.o
|
|||
obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
|
||||
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
|
||||
obj-$(CONFIG_GPIO_BCM_XGS_IPROC) += gpio-xgs-iproc.o
|
||||
obj-$(CONFIG_GPIO_BD70528) += gpio-bd70528.o
|
||||
obj-$(CONFIG_GPIO_BD71815) += gpio-bd71815.o
|
||||
obj-$(CONFIG_GPIO_BD71828) += gpio-bd71828.o
|
||||
obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
|
||||
|
|
|
|||
|
|
@ -1,230 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
// Copyright (C) 2018 ROHM Semiconductors
|
||||
// gpio-bd70528.c ROHM BD70528MWV gpio driver
|
||||
|
||||
#include <linux/gpio/driver.h>
|
||||
#include <linux/mfd/rohm-bd70528.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#define GPIO_IN_REG(offset) (BD70528_REG_GPIO1_IN + (offset) * 2)
|
||||
#define GPIO_OUT_REG(offset) (BD70528_REG_GPIO1_OUT + (offset) * 2)
|
||||
|
||||
struct bd70528_gpio {
|
||||
struct regmap *regmap;
|
||||
struct device *dev;
|
||||
struct gpio_chip gpio;
|
||||
};
|
||||
|
||||
static int bd70528_set_debounce(struct bd70528_gpio *bdgpio,
|
||||
unsigned int offset, unsigned int debounce)
|
||||
{
|
||||
u8 val;
|
||||
|
||||
switch (debounce) {
|
||||
case 0:
|
||||
val = BD70528_DEBOUNCE_DISABLE;
|
||||
break;
|
||||
case 1 ... 15000:
|
||||
val = BD70528_DEBOUNCE_15MS;
|
||||
break;
|
||||
case 15001 ... 30000:
|
||||
val = BD70528_DEBOUNCE_30MS;
|
||||
break;
|
||||
case 30001 ... 50000:
|
||||
val = BD70528_DEBOUNCE_50MS;
|
||||
break;
|
||||
default:
|
||||
dev_err(bdgpio->dev,
|
||||
"Invalid debounce value %u\n", debounce);
|
||||
return -EINVAL;
|
||||
}
|
||||
return regmap_update_bits(bdgpio->regmap, GPIO_IN_REG(offset),
|
||||
BD70528_DEBOUNCE_MASK, val);
|
||||
}
|
||||
|
||||
static int bd70528_get_direction(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
|
||||
int val, ret;
|
||||
|
||||
/* Do we need to do something to IRQs here? */
|
||||
ret = regmap_read(bdgpio->regmap, GPIO_OUT_REG(offset), &val);
|
||||
if (ret) {
|
||||
dev_err(bdgpio->dev, "Could not read gpio direction\n");
|
||||
return ret;
|
||||
}
|
||||
if (val & BD70528_GPIO_OUT_EN_MASK)
|
||||
return GPIO_LINE_DIRECTION_OUT;
|
||||
|
||||
return GPIO_LINE_DIRECTION_IN;
|
||||
}
|
||||
|
||||
static int bd70528_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
|
||||
unsigned long config)
|
||||
{
|
||||
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
|
||||
|
||||
switch (pinconf_to_config_param(config)) {
|
||||
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
|
||||
return regmap_update_bits(bdgpio->regmap,
|
||||
GPIO_OUT_REG(offset),
|
||||
BD70528_GPIO_DRIVE_MASK,
|
||||
BD70528_GPIO_OPEN_DRAIN);
|
||||
break;
|
||||
case PIN_CONFIG_DRIVE_PUSH_PULL:
|
||||
return regmap_update_bits(bdgpio->regmap,
|
||||
GPIO_OUT_REG(offset),
|
||||
BD70528_GPIO_DRIVE_MASK,
|
||||
BD70528_GPIO_PUSH_PULL);
|
||||
break;
|
||||
case PIN_CONFIG_INPUT_DEBOUNCE:
|
||||
return bd70528_set_debounce(bdgpio, offset,
|
||||
pinconf_to_config_argument(config));
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
static int bd70528_direction_input(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
|
||||
|
||||
/* Do we need to do something to IRQs here? */
|
||||
return regmap_update_bits(bdgpio->regmap, GPIO_OUT_REG(offset),
|
||||
BD70528_GPIO_OUT_EN_MASK,
|
||||
BD70528_GPIO_OUT_DISABLE);
|
||||
}
|
||||
|
||||
static void bd70528_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
int ret;
|
||||
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
|
||||
u8 val = (value) ? BD70528_GPIO_OUT_HI : BD70528_GPIO_OUT_LO;
|
||||
|
||||
ret = regmap_update_bits(bdgpio->regmap, GPIO_OUT_REG(offset),
|
||||
BD70528_GPIO_OUT_MASK, val);
|
||||
if (ret)
|
||||
dev_err(bdgpio->dev, "Could not set gpio to %d\n", value);
|
||||
}
|
||||
|
||||
static int bd70528_direction_output(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
|
||||
|
||||
bd70528_gpio_set(chip, offset, value);
|
||||
return regmap_update_bits(bdgpio->regmap, GPIO_OUT_REG(offset),
|
||||
BD70528_GPIO_OUT_EN_MASK,
|
||||
BD70528_GPIO_OUT_ENABLE);
|
||||
}
|
||||
|
||||
#define GPIO_IN_STATE_MASK(offset) (BD70528_GPIO_IN_STATE_BASE << (offset))
|
||||
|
||||
static int bd70528_gpio_get_o(struct bd70528_gpio *bdgpio, unsigned int offset)
|
||||
{
|
||||
int ret;
|
||||
unsigned int val;
|
||||
|
||||
ret = regmap_read(bdgpio->regmap, GPIO_OUT_REG(offset), &val);
|
||||
if (!ret)
|
||||
ret = !!(val & BD70528_GPIO_OUT_MASK);
|
||||
else
|
||||
dev_err(bdgpio->dev, "GPIO (out) state read failed\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset)
|
||||
{
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(bdgpio->regmap, BD70528_REG_GPIO_STATE, &val);
|
||||
|
||||
if (!ret)
|
||||
ret = !(val & GPIO_IN_STATE_MASK(offset));
|
||||
else
|
||||
dev_err(bdgpio->dev, "GPIO (in) state read failed\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset)
|
||||
{
|
||||
int ret;
|
||||
struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
|
||||
|
||||
/*
|
||||
* There is a race condition where someone might be changing the
|
||||
* GPIO direction after we get it but before we read the value. But
|
||||
* application design where GPIO direction may be changed just when
|
||||
* we read GPIO value would be pointless as reader could not know
|
||||
* whether the returned high/low state is caused by input or output.
|
||||
* Or then there must be other ways to mitigate the issue. Thus
|
||||
* locking would make no sense.
|
||||
*/
|
||||
ret = bd70528_get_direction(chip, offset);
|
||||
if (ret == GPIO_LINE_DIRECTION_OUT)
|
||||
ret = bd70528_gpio_get_o(bdgpio, offset);
|
||||
else if (ret == GPIO_LINE_DIRECTION_IN)
|
||||
ret = bd70528_gpio_get_i(bdgpio, offset);
|
||||
else
|
||||
dev_err(bdgpio->dev, "failed to read GPIO direction\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int bd70528_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct bd70528_gpio *bdgpio;
|
||||
int ret;
|
||||
|
||||
bdgpio = devm_kzalloc(dev, sizeof(*bdgpio), GFP_KERNEL);
|
||||
if (!bdgpio)
|
||||
return -ENOMEM;
|
||||
bdgpio->dev = dev;
|
||||
bdgpio->gpio.parent = dev->parent;
|
||||
bdgpio->gpio.label = "bd70528-gpio";
|
||||
bdgpio->gpio.owner = THIS_MODULE;
|
||||
bdgpio->gpio.get_direction = bd70528_get_direction;
|
||||
bdgpio->gpio.direction_input = bd70528_direction_input;
|
||||
bdgpio->gpio.direction_output = bd70528_direction_output;
|
||||
bdgpio->gpio.set_config = bd70528_gpio_set_config;
|
||||
bdgpio->gpio.can_sleep = true;
|
||||
bdgpio->gpio.get = bd70528_gpio_get;
|
||||
bdgpio->gpio.set = bd70528_gpio_set;
|
||||
bdgpio->gpio.ngpio = 4;
|
||||
bdgpio->gpio.base = -1;
|
||||
#ifdef CONFIG_OF_GPIO
|
||||
bdgpio->gpio.of_node = dev->parent->of_node;
|
||||
#endif
|
||||
bdgpio->regmap = dev_get_regmap(dev->parent, NULL);
|
||||
if (!bdgpio->regmap)
|
||||
return -ENODEV;
|
||||
|
||||
ret = devm_gpiochip_add_data(dev, &bdgpio->gpio, bdgpio);
|
||||
if (ret)
|
||||
dev_err(dev, "gpio_init: Failed to add bd70528-gpio\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct platform_driver bd70528_gpio = {
|
||||
.driver = {
|
||||
.name = "bd70528-gpio"
|
||||
},
|
||||
.probe = bd70528_probe,
|
||||
};
|
||||
|
||||
module_platform_driver(bd70528_gpio);
|
||||
|
||||
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
|
||||
MODULE_DESCRIPTION("BD70528 voltage regulator driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:bd70528-gpio");
|
||||
|
|
@ -634,7 +634,7 @@ config INTEL_SOC_PMIC_CHTWC
|
|||
config INTEL_SOC_PMIC_CHTDC_TI
|
||||
tristate "Support for Intel Cherry Trail Dollar Cove TI PMIC"
|
||||
depends on GPIOLIB
|
||||
depends on I2C
|
||||
depends on I2C=y && I2C_DESIGNWARE_PLATFORM=y
|
||||
depends on ACPI
|
||||
depends on X86
|
||||
select MFD_CORE
|
||||
|
|
@ -644,6 +644,10 @@ config INTEL_SOC_PMIC_CHTDC_TI
|
|||
Select this option for supporting Dollar Cove (TI version) PMIC
|
||||
device that is found on some Intel Cherry Trail systems.
|
||||
|
||||
This option is a bool as it provides an ACPI OpRegion which must be
|
||||
available before any devices using it are probed. This option also
|
||||
needs the designware-i2c driver to be builtin for the same reason.
|
||||
|
||||
config INTEL_SOC_PMIC_MRFLD
|
||||
tristate "Support for Intel Merrifield Basin Cove PMIC"
|
||||
depends on GPIOLIB
|
||||
|
|
@ -1945,23 +1949,6 @@ config MFD_ROHM_BD718XX
|
|||
NXP i.MX8. It contains 8 BUCK outputs and 7 LDOs, voltage monitoring
|
||||
and emergency shut down as well as 32,768KHz clock output.
|
||||
|
||||
config MFD_ROHM_BD70528
|
||||
tristate "ROHM BD70528 Power Management IC"
|
||||
depends on I2C=y
|
||||
depends on OF
|
||||
select REGMAP_I2C
|
||||
select REGMAP_IRQ
|
||||
select MFD_CORE
|
||||
help
|
||||
Select this option to get support for the ROHM BD70528 Power
|
||||
Management IC. BD71837 is general purpose single-chip power
|
||||
management IC for battery-powered portable devices. It contains
|
||||
3 ultra-low current consumption buck converters, 3 LDOs and 2 LED
|
||||
drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz
|
||||
crystal oscillator, high-accuracy VREF for use with an external ADC,
|
||||
10 bits SAR ADC for battery temperature monitor and 1S battery
|
||||
charger.
|
||||
|
||||
config MFD_ROHM_BD71828
|
||||
tristate "ROHM BD71828 and BD71815 Power Management IC"
|
||||
depends on I2C=y
|
||||
|
|
|
|||
|
|
@ -257,7 +257,6 @@ obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o
|
|||
obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o
|
||||
obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o
|
||||
obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o
|
||||
obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-bd70528.o
|
||||
obj-$(CONFIG_MFD_ROHM_BD71828) += rohm-bd71828.o
|
||||
obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o
|
||||
obj-$(CONFIG_MFD_ROHM_BD957XMUF) += rohm-bd9576.o
|
||||
|
|
|
|||
|
|
@ -87,8 +87,7 @@ static const struct of_device_id atmel_flexcom_of_match[] = {
|
|||
};
|
||||
MODULE_DEVICE_TABLE(of, atmel_flexcom_of_match);
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static int atmel_flexcom_resume(struct device *dev)
|
||||
static int __maybe_unused atmel_flexcom_resume_noirq(struct device *dev)
|
||||
{
|
||||
struct atmel_flexcom *ddata = dev_get_drvdata(dev);
|
||||
int err;
|
||||
|
|
@ -105,16 +104,16 @@ static int atmel_flexcom_resume(struct device *dev)
|
|||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(atmel_flexcom_pm_ops, NULL,
|
||||
atmel_flexcom_resume);
|
||||
static const struct dev_pm_ops atmel_flexcom_pm_ops = {
|
||||
.resume_noirq = atmel_flexcom_resume_noirq,
|
||||
};
|
||||
|
||||
static struct platform_driver atmel_flexcom_driver = {
|
||||
.probe = atmel_flexcom_probe,
|
||||
.driver = {
|
||||
.name = "atmel_flexcom",
|
||||
.pm = &atmel_flexcom_pm_ops,
|
||||
.pm = pm_ptr(&atmel_flexcom_pm_ops),
|
||||
.of_match_table = atmel_flexcom_of_match,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -556,6 +556,7 @@ static const struct regmap_range da9062_aa_writeable_ranges[] = {
|
|||
regmap_reg_range(DA9062AA_VBUCK3_B, DA9062AA_VBUCK3_B),
|
||||
regmap_reg_range(DA9062AA_VLDO1_B, DA9062AA_VLDO4_B),
|
||||
regmap_reg_range(DA9062AA_BBAT_CONT, DA9062AA_BBAT_CONT),
|
||||
regmap_reg_range(DA9062AA_CONFIG_J, DA9062AA_CONFIG_J),
|
||||
regmap_reg_range(DA9062AA_GP_ID_0, DA9062AA_GP_ID_19),
|
||||
};
|
||||
|
||||
|
|
@ -674,6 +675,17 @@ static int da9062_i2c_probe(struct i2c_client *i2c,
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* If SMBus is not available and only I2C is possible, enter I2C mode */
|
||||
if (i2c_check_functionality(i2c->adapter, I2C_FUNC_I2C)) {
|
||||
dev_info(chip->dev, "Entering I2C mode!\n");
|
||||
ret = regmap_clear_bits(chip->regmap, DA9062AA_CONFIG_J,
|
||||
DA9062AA_TWOWIRE_TO_MASK);
|
||||
if (ret < 0) {
|
||||
dev_err(chip->dev, "Failed to set Two-Wire Bus Mode.\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
ret = da9062_clear_fault_log(chip);
|
||||
if (ret < 0)
|
||||
dev_warn(chip->dev, "Cannot clear fault log\n");
|
||||
|
|
|
|||
|
|
@ -136,6 +136,7 @@ static int intel_lpss_acpi_probe(struct platform_device *pdev)
|
|||
{
|
||||
struct intel_lpss_platform_info *info;
|
||||
const struct acpi_device_id *id;
|
||||
int ret;
|
||||
|
||||
id = acpi_match_device(intel_lpss_acpi_ids, &pdev->dev);
|
||||
if (!id)
|
||||
|
|
@ -149,10 +150,14 @@ static int intel_lpss_acpi_probe(struct platform_device *pdev)
|
|||
info->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
info->irq = platform_get_irq(pdev, 0);
|
||||
|
||||
ret = intel_lpss_probe(&pdev->dev, info);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pm_runtime_set_active(&pdev->dev);
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
return intel_lpss_probe(&pdev->dev, info);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_lpss_acpi_remove(struct platform_device *pdev)
|
||||
|
|
|
|||
|
|
@ -17,6 +17,15 @@
|
|||
|
||||
#include "intel-lpss.h"
|
||||
|
||||
/* Some DSDTs have an unused GEXP ACPI device conflicting with I2C4 resources */
|
||||
static const struct pci_device_id ignore_resource_conflicts_ids[] = {
|
||||
/* Microsoft Surface Go (version 1) I2C4 */
|
||||
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, 0x9d64, 0x152d, 0x1182), },
|
||||
/* Microsoft Surface Go 2 I2C4 */
|
||||
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, 0x9d64, 0x152d, 0x1237), },
|
||||
{ }
|
||||
};
|
||||
|
||||
static int intel_lpss_pci_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *id)
|
||||
{
|
||||
|
|
@ -35,6 +44,9 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev,
|
|||
info->mem = &pdev->resource[0];
|
||||
info->irq = pdev->irq;
|
||||
|
||||
if (pci_match_id(ignore_resource_conflicts_ids, pdev))
|
||||
info->ignore_resource_conflicts = true;
|
||||
|
||||
pdev->d3cold_delay = 0;
|
||||
|
||||
/* Probably it is enough to set this for iDMA capable devices only */
|
||||
|
|
@ -254,7 +266,7 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
|
|||
{ PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info },
|
||||
/* ICL-N */
|
||||
{ PCI_VDEVICE(INTEL, 0x38a8), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x38a8), (kernel_ulong_t)&spt_uart_info },
|
||||
/* TGL-H */
|
||||
{ PCI_VDEVICE(INTEL, 0x43a7), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x43a8), (kernel_ulong_t)&bxt_uart_info },
|
||||
|
|
@ -359,7 +371,14 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
|
|||
/* LKF */
|
||||
{ PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98aa), (kernel_ulong_t)&bxt_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98c5), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98c6), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98c7), (kernel_ulong_t)&bxt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98e8), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98e9), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98ea), (kernel_ulong_t)&bxt_i2c_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x98eb), (kernel_ulong_t)&bxt_i2c_info },
|
||||
/* SPT-LP */
|
||||
{ PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info },
|
||||
{ PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info },
|
||||
|
|
|
|||
|
|
@ -401,6 +401,7 @@ int intel_lpss_probe(struct device *dev,
|
|||
return ret;
|
||||
|
||||
lpss->cell->swnode = info->swnode;
|
||||
lpss->cell->ignore_resource_conflicts = info->ignore_resource_conflicts;
|
||||
|
||||
intel_lpss_init_dev(lpss);
|
||||
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ struct software_node;
|
|||
|
||||
struct intel_lpss_platform_info {
|
||||
struct resource *mem;
|
||||
bool ignore_resource_conflicts;
|
||||
int irq;
|
||||
unsigned long clk_rate;
|
||||
const char *clk_con_id;
|
||||
|
|
|
|||
|
|
@ -14,15 +14,12 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/mfd/core.h>
|
||||
#include <linux/mfd/intel_soc_pmic.h>
|
||||
#include <linux/platform_data/x86/soc.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "intel_soc_pmic_core.h"
|
||||
|
||||
/* Crystal Cove PMIC shares same ACPI ID between different platforms */
|
||||
#define BYT_CRC_HRV 2
|
||||
#define CHT_CRC_HRV 3
|
||||
|
||||
/* PWM consumed by the Intel GFX */
|
||||
static struct pwm_lookup crc_pwm_lookup[] = {
|
||||
PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_pmic_backlight", 0, PWM_POLARITY_NORMAL),
|
||||
|
|
@ -34,31 +31,12 @@ static int intel_soc_pmic_i2c_probe(struct i2c_client *i2c,
|
|||
struct device *dev = &i2c->dev;
|
||||
struct intel_soc_pmic_config *config;
|
||||
struct intel_soc_pmic *pmic;
|
||||
unsigned long long hrv;
|
||||
acpi_status status;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* There are 2 different Crystal Cove PMICs a Bay Trail and Cherry
|
||||
* Trail version, use _HRV to differentiate between the 2.
|
||||
*/
|
||||
status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv);
|
||||
if (ACPI_FAILURE(status)) {
|
||||
dev_err(dev, "Failed to get PMIC hardware revision\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
switch (hrv) {
|
||||
case BYT_CRC_HRV:
|
||||
if (soc_intel_is_byt())
|
||||
config = &intel_soc_pmic_config_byt_crc;
|
||||
break;
|
||||
case CHT_CRC_HRV:
|
||||
else
|
||||
config = &intel_soc_pmic_config_cht_crc;
|
||||
break;
|
||||
default:
|
||||
dev_warn(dev, "Unknown hardware rev %llu, assuming BYT\n", hrv);
|
||||
config = &intel_soc_pmic_config_byt_crc;
|
||||
}
|
||||
|
||||
pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
|
||||
if (!pmic)
|
||||
|
|
|
|||
|
|
@ -1,314 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
//
|
||||
// Copyright (C) 2019 ROHM Semiconductors
|
||||
//
|
||||
// ROHM BD70528 PMIC driver
|
||||
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/mfd/core.h>
|
||||
#include <linux/mfd/rohm-bd70528.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#define BD70528_NUM_OF_GPIOS 4
|
||||
|
||||
static const struct resource rtc_irqs[] = {
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_RTC_ALARM, "bd70528-rtc-alm"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_ELPS_TIM, "bd70528-elapsed-timer"),
|
||||
};
|
||||
|
||||
static const struct resource charger_irqs[] = {
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_OV_RES, "bd70528-bat-ov-res"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_OV_DET, "bd70528-bat-ov-det"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DBAT_DET, "bd70528-bat-dead"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_COLD_RES, "bd70528-bat-warmed"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_COLD_DET, "bd70528-bat-cold"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_HOT_RES, "bd70528-bat-cooled"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BATTSD_HOT_DET, "bd70528-bat-hot"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_CHG_TSD, "bd70528-chg-tshd"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_RMV, "bd70528-bat-removed"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_BAT_DET, "bd70528-bat-detected"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_OV_RES, "bd70528-dcin2-ov-res"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_OV_DET, "bd70528-dcin2-ov-det"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_RMV, "bd70528-dcin2-removed"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN2_DET, "bd70528-dcin2-detected"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN1_RMV, "bd70528-dcin1-removed"),
|
||||
DEFINE_RES_IRQ_NAMED(BD70528_INT_DCIN1_DET, "bd70528-dcin1-detected"),
|
||||
};
|
||||
|
||||
static struct mfd_cell bd70528_mfd_cells[] = {
|
||||
{ .name = "bd70528-pmic", },
|
||||
{ .name = "bd70528-gpio", },
|
||||
/*
|
||||
* We use BD71837 driver to drive the clock block. Only differences to
|
||||
* BD70528 clock gate are the register address and mask.
|
||||
*/
|
||||
{ .name = "bd70528-clk", },
|
||||
{ .name = "bd70528-wdt", },
|
||||
{
|
||||
.name = "bd70528-power",
|
||||
.resources = charger_irqs,
|
||||
.num_resources = ARRAY_SIZE(charger_irqs),
|
||||
}, {
|
||||
.name = "bd70528-rtc",
|
||||
.resources = rtc_irqs,
|
||||
.num_resources = ARRAY_SIZE(rtc_irqs),
|
||||
},
|
||||
};
|
||||
|
||||
static const struct regmap_range volatile_ranges[] = {
|
||||
{
|
||||
.range_min = BD70528_REG_INT_MAIN,
|
||||
.range_max = BD70528_REG_INT_OP_FAIL,
|
||||
}, {
|
||||
.range_min = BD70528_REG_RTC_COUNT_H,
|
||||
.range_max = BD70528_REG_RTC_ALM_REPEAT,
|
||||
}, {
|
||||
/*
|
||||
* WDT control reg is special. Magic values must be written to
|
||||
* it in order to change the control. Should not be cached.
|
||||
*/
|
||||
.range_min = BD70528_REG_WDT_CTRL,
|
||||
.range_max = BD70528_REG_WDT_CTRL,
|
||||
}, {
|
||||
/*
|
||||
* BD70528 also contains a few other registers which require
|
||||
* magic sequences to be written in order to update the value.
|
||||
* At least SHIPMODE, HWRESET, WARMRESET,and STANDBY
|
||||
*/
|
||||
.range_min = BD70528_REG_SHIPMODE,
|
||||
.range_max = BD70528_REG_STANDBY,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct regmap_access_table volatile_regs = {
|
||||
.yes_ranges = &volatile_ranges[0],
|
||||
.n_yes_ranges = ARRAY_SIZE(volatile_ranges),
|
||||
};
|
||||
|
||||
static struct regmap_config bd70528_regmap = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.volatile_table = &volatile_regs,
|
||||
.max_register = BD70528_MAX_REGISTER,
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
};
|
||||
|
||||
/*
|
||||
* Mapping of main IRQ register bits to sub-IRQ register offsets so that we can
|
||||
* access corect sub-IRQ registers based on bits that are set in main IRQ
|
||||
* register.
|
||||
*/
|
||||
|
||||
static unsigned int bit0_offsets[] = {0}; /* Shutdown */
|
||||
static unsigned int bit1_offsets[] = {1}; /* Power failure */
|
||||
static unsigned int bit2_offsets[] = {2}; /* VR FAULT */
|
||||
static unsigned int bit3_offsets[] = {3}; /* PMU interrupts */
|
||||
static unsigned int bit4_offsets[] = {4, 5}; /* Charger 1 and Charger 2 */
|
||||
static unsigned int bit5_offsets[] = {6}; /* RTC */
|
||||
static unsigned int bit6_offsets[] = {7}; /* GPIO */
|
||||
static unsigned int bit7_offsets[] = {8}; /* Invalid operation */
|
||||
|
||||
static struct regmap_irq_sub_irq_map bd70528_sub_irq_offsets[] = {
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit0_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit1_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit2_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit3_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit4_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit5_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit6_offsets),
|
||||
REGMAP_IRQ_MAIN_REG_OFFSET(bit7_offsets),
|
||||
};
|
||||
|
||||
static struct regmap_irq bd70528_irqs[] = {
|
||||
REGMAP_IRQ_REG(BD70528_INT_LONGPUSH, 0, BD70528_INT_LONGPUSH_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_WDT, 0, BD70528_INT_WDT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_HWRESET, 0, BD70528_INT_HWRESET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_RSTB_FAULT, 0, BD70528_INT_RSTB_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_VBAT_UVLO, 0, BD70528_INT_VBAT_UVLO_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_TSD, 0, BD70528_INT_TSD_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_RSTIN, 0, BD70528_INT_RSTIN_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK1_FAULT, 1,
|
||||
BD70528_INT_BUCK1_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK2_FAULT, 1,
|
||||
BD70528_INT_BUCK2_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK3_FAULT, 1,
|
||||
BD70528_INT_BUCK3_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LDO1_FAULT, 1, BD70528_INT_LDO1_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LDO2_FAULT, 1, BD70528_INT_LDO2_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LDO3_FAULT, 1, BD70528_INT_LDO3_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LED1_FAULT, 1, BD70528_INT_LED1_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LED2_FAULT, 1, BD70528_INT_LED2_FAULT_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK1_OCP, 2, BD70528_INT_BUCK1_OCP_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK2_OCP, 2, BD70528_INT_BUCK2_OCP_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK3_OCP, 2, BD70528_INT_BUCK3_OCP_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LED1_OCP, 2, BD70528_INT_LED1_OCP_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LED2_OCP, 2, BD70528_INT_LED2_OCP_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK1_FULLON, 2,
|
||||
BD70528_INT_BUCK1_FULLON_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK2_FULLON, 2,
|
||||
BD70528_INT_BUCK2_FULLON_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_SHORTPUSH, 3, BD70528_INT_SHORTPUSH_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_AUTO_WAKEUP, 3,
|
||||
BD70528_INT_AUTO_WAKEUP_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_STATE_CHANGE, 3,
|
||||
BD70528_INT_STATE_CHANGE_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BAT_OV_RES, 4, BD70528_INT_BAT_OV_RES_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BAT_OV_DET, 4, BD70528_INT_BAT_OV_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DBAT_DET, 4, BD70528_INT_DBAT_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BATTSD_COLD_RES, 4,
|
||||
BD70528_INT_BATTSD_COLD_RES_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BATTSD_COLD_DET, 4,
|
||||
BD70528_INT_BATTSD_COLD_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BATTSD_HOT_RES, 4,
|
||||
BD70528_INT_BATTSD_HOT_RES_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BATTSD_HOT_DET, 4,
|
||||
BD70528_INT_BATTSD_HOT_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_CHG_TSD, 4, BD70528_INT_CHG_TSD_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BAT_RMV, 5, BD70528_INT_BAT_RMV_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BAT_DET, 5, BD70528_INT_BAT_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DCIN2_OV_RES, 5,
|
||||
BD70528_INT_DCIN2_OV_RES_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DCIN2_OV_DET, 5,
|
||||
BD70528_INT_DCIN2_OV_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DCIN2_RMV, 5, BD70528_INT_DCIN2_RMV_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DCIN2_DET, 5, BD70528_INT_DCIN2_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DCIN1_RMV, 5, BD70528_INT_DCIN1_RMV_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_DCIN1_DET, 5, BD70528_INT_DCIN1_DET_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_RTC_ALARM, 6, BD70528_INT_RTC_ALARM_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_ELPS_TIM, 6, BD70528_INT_ELPS_TIM_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_GPIO0, 7, BD70528_INT_GPIO0_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_GPIO1, 7, BD70528_INT_GPIO1_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_GPIO2, 7, BD70528_INT_GPIO2_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_GPIO3, 7, BD70528_INT_GPIO3_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK1_DVS_OPFAIL, 8,
|
||||
BD70528_INT_BUCK1_DVS_OPFAIL_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK2_DVS_OPFAIL, 8,
|
||||
BD70528_INT_BUCK2_DVS_OPFAIL_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_BUCK3_DVS_OPFAIL, 8,
|
||||
BD70528_INT_BUCK3_DVS_OPFAIL_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LED1_VOLT_OPFAIL, 8,
|
||||
BD70528_INT_LED1_VOLT_OPFAIL_MASK),
|
||||
REGMAP_IRQ_REG(BD70528_INT_LED2_VOLT_OPFAIL, 8,
|
||||
BD70528_INT_LED2_VOLT_OPFAIL_MASK),
|
||||
};
|
||||
|
||||
static struct regmap_irq_chip bd70528_irq_chip = {
|
||||
.name = "bd70528_irq",
|
||||
.main_status = BD70528_REG_INT_MAIN,
|
||||
.irqs = &bd70528_irqs[0],
|
||||
.num_irqs = ARRAY_SIZE(bd70528_irqs),
|
||||
.status_base = BD70528_REG_INT_SHDN,
|
||||
.mask_base = BD70528_REG_INT_SHDN_MASK,
|
||||
.ack_base = BD70528_REG_INT_SHDN,
|
||||
.type_base = BD70528_REG_GPIO1_IN,
|
||||
.init_ack_masked = true,
|
||||
.num_regs = 9,
|
||||
.num_main_regs = 1,
|
||||
.num_type_reg = 4,
|
||||
.sub_reg_offsets = &bd70528_sub_irq_offsets[0],
|
||||
.num_main_status_bits = 8,
|
||||
.irq_reg_stride = 1,
|
||||
};
|
||||
|
||||
static int bd70528_i2c_probe(struct i2c_client *i2c,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct bd70528_data *bd70528;
|
||||
struct regmap_irq_chip_data *irq_data;
|
||||
int ret, i;
|
||||
|
||||
if (!i2c->irq) {
|
||||
dev_err(&i2c->dev, "No IRQ configured\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
bd70528 = devm_kzalloc(&i2c->dev, sizeof(*bd70528), GFP_KERNEL);
|
||||
if (!bd70528)
|
||||
return -ENOMEM;
|
||||
|
||||
mutex_init(&bd70528->rtc_timer_lock);
|
||||
|
||||
dev_set_drvdata(&i2c->dev, &bd70528->chip);
|
||||
|
||||
bd70528->chip.regmap = devm_regmap_init_i2c(i2c, &bd70528_regmap);
|
||||
if (IS_ERR(bd70528->chip.regmap)) {
|
||||
dev_err(&i2c->dev, "Failed to initialize Regmap\n");
|
||||
return PTR_ERR(bd70528->chip.regmap);
|
||||
}
|
||||
|
||||
/*
|
||||
* Disallow type setting for all IRQs by default as most of them do not
|
||||
* support setting type.
|
||||
*/
|
||||
for (i = 0; i < ARRAY_SIZE(bd70528_irqs); i++)
|
||||
bd70528_irqs[i].type.types_supported = 0;
|
||||
|
||||
/* Set IRQ typesetting information for GPIO pins 0 - 3 */
|
||||
for (i = 0; i < BD70528_NUM_OF_GPIOS; i++) {
|
||||
struct regmap_irq_type *type;
|
||||
|
||||
type = &bd70528_irqs[BD70528_INT_GPIO0 + i].type;
|
||||
type->type_reg_offset = 2 * i;
|
||||
type->type_rising_val = 0x20;
|
||||
type->type_falling_val = 0x10;
|
||||
type->type_level_high_val = 0x40;
|
||||
type->type_level_low_val = 0x50;
|
||||
type->types_supported = (IRQ_TYPE_EDGE_BOTH |
|
||||
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW);
|
||||
}
|
||||
|
||||
ret = devm_regmap_add_irq_chip(&i2c->dev, bd70528->chip.regmap,
|
||||
i2c->irq, IRQF_ONESHOT, 0,
|
||||
&bd70528_irq_chip, &irq_data);
|
||||
if (ret) {
|
||||
dev_err(&i2c->dev, "Failed to add IRQ chip\n");
|
||||
return ret;
|
||||
}
|
||||
dev_dbg(&i2c->dev, "Registered %d IRQs for chip\n",
|
||||
bd70528_irq_chip.num_irqs);
|
||||
|
||||
/*
|
||||
* BD70528 IRQ controller is not touching the main mask register.
|
||||
* So enable the GPIO block interrupts at main level. We can just leave
|
||||
* them enabled as the IRQ controller should disable IRQs from
|
||||
* sub-registers when IRQ is disabled or freed.
|
||||
*/
|
||||
ret = regmap_update_bits(bd70528->chip.regmap,
|
||||
BD70528_REG_INT_MAIN_MASK,
|
||||
BD70528_INT_GPIO_MASK, 0);
|
||||
|
||||
ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO,
|
||||
bd70528_mfd_cells,
|
||||
ARRAY_SIZE(bd70528_mfd_cells), NULL, 0,
|
||||
regmap_irq_get_domain(irq_data));
|
||||
if (ret)
|
||||
dev_err(&i2c->dev, "Failed to create subdevices\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct of_device_id bd70528_of_match[] = {
|
||||
{ .compatible = "rohm,bd70528", },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, bd70528_of_match);
|
||||
|
||||
static struct i2c_driver bd70528_drv = {
|
||||
.driver = {
|
||||
.name = "rohm-bd70528",
|
||||
.of_match_table = bd70528_of_match,
|
||||
},
|
||||
.probe = &bd70528_i2c_probe,
|
||||
};
|
||||
|
||||
module_i2c_driver(bd70528_drv);
|
||||
|
||||
MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
|
||||
MODULE_DESCRIPTION("ROHM BD70528 Power Management IC driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1361,7 +1361,7 @@ static void stmpe_of_probe(struct stmpe_platform_data *pdata,
|
|||
|
||||
pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
|
||||
|
||||
for_each_child_of_node(np, child) {
|
||||
for_each_available_child_of_node(np, child) {
|
||||
if (of_node_name_eq(child, "stmpe_gpio")) {
|
||||
pdata->blocks |= STMPE_BLOCK_GPIO;
|
||||
} else if (of_node_name_eq(child, "stmpe_keypad")) {
|
||||
|
|
|
|||
|
|
@ -436,15 +436,6 @@ static void tps65910_power_off(void)
|
|||
|
||||
tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev);
|
||||
|
||||
/*
|
||||
* The PWR_OFF bit needs to be set separately, before transitioning
|
||||
* to the OFF state. It enables the "sequential" power-off mode on
|
||||
* TPS65911, it's a NO-OP on TPS65910.
|
||||
*/
|
||||
if (regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL,
|
||||
DEVCTRL_PWR_OFF_MASK) < 0)
|
||||
return;
|
||||
|
||||
regmap_update_bits(tps65910->regmap, TPS65910_DEVCTRL,
|
||||
DEVCTRL_DEV_OFF_MASK | DEVCTRL_DEV_ON_MASK,
|
||||
DEVCTRL_DEV_OFF_MASK);
|
||||
|
|
@ -504,6 +495,19 @@ static int tps65910_i2c_probe(struct i2c_client *i2c,
|
|||
tps65910_sleepinit(tps65910, pmic_plat_data);
|
||||
|
||||
if (pmic_plat_data->pm_off && !pm_power_off) {
|
||||
/*
|
||||
* The PWR_OFF bit needs to be set separately, before
|
||||
* transitioning to the OFF state. It enables the "sequential"
|
||||
* power-off mode on TPS65911, it's a NO-OP on TPS65910.
|
||||
*/
|
||||
ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL,
|
||||
DEVCTRL_PWR_OFF_MASK);
|
||||
if (ret) {
|
||||
dev_err(&i2c->dev, "failed to set power-off mode: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
tps65910_i2c_client = i2c;
|
||||
pm_power_off = tps65910_power_off;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ struct ntxec {
|
|||
* This convenience function converts an 8-bit value to 16-bit for use in the
|
||||
* second kind of register.
|
||||
*/
|
||||
static inline __be16 ntxec_reg8(u8 value)
|
||||
static inline u16 ntxec_reg8(u8 value)
|
||||
{
|
||||
return value << 8;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,389 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||||
/* Copyright (C) 2018 ROHM Semiconductors */
|
||||
|
||||
#ifndef __LINUX_MFD_BD70528_H__
|
||||
#define __LINUX_MFD_BD70528_H__
|
||||
|
||||
#include <linux/bits.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/mfd/rohm-generic.h>
|
||||
#include <linux/mfd/rohm-shared.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
enum {
|
||||
BD70528_BUCK1,
|
||||
BD70528_BUCK2,
|
||||
BD70528_BUCK3,
|
||||
BD70528_LDO1,
|
||||
BD70528_LDO2,
|
||||
BD70528_LDO3,
|
||||
BD70528_LED1,
|
||||
BD70528_LED2,
|
||||
};
|
||||
|
||||
struct bd70528_data {
|
||||
struct rohm_regmap_dev chip;
|
||||
struct mutex rtc_timer_lock;
|
||||
};
|
||||
|
||||
#define BD70528_BUCK_VOLTS 0x10
|
||||
#define BD70528_LDO_VOLTS 0x20
|
||||
|
||||
#define BD70528_REG_BUCK1_EN 0x0F
|
||||
#define BD70528_REG_BUCK1_VOLT 0x15
|
||||
#define BD70528_REG_BUCK2_EN 0x10
|
||||
#define BD70528_REG_BUCK2_VOLT 0x16
|
||||
#define BD70528_REG_BUCK3_EN 0x11
|
||||
#define BD70528_REG_BUCK3_VOLT 0x17
|
||||
#define BD70528_REG_LDO1_EN 0x1b
|
||||
#define BD70528_REG_LDO1_VOLT 0x1e
|
||||
#define BD70528_REG_LDO2_EN 0x1c
|
||||
#define BD70528_REG_LDO2_VOLT 0x1f
|
||||
#define BD70528_REG_LDO3_EN 0x1d
|
||||
#define BD70528_REG_LDO3_VOLT 0x20
|
||||
#define BD70528_REG_LED_CTRL 0x2b
|
||||
#define BD70528_REG_LED_VOLT 0x29
|
||||
#define BD70528_REG_LED_EN 0x2a
|
||||
|
||||
/* main irq registers */
|
||||
#define BD70528_REG_INT_MAIN 0x7E
|
||||
#define BD70528_REG_INT_MAIN_MASK 0x74
|
||||
|
||||
/* 'sub irq' registers */
|
||||
#define BD70528_REG_INT_SHDN 0x7F
|
||||
#define BD70528_REG_INT_PWR_FLT 0x80
|
||||
#define BD70528_REG_INT_VR_FLT 0x81
|
||||
#define BD70528_REG_INT_MISC 0x82
|
||||
#define BD70528_REG_INT_BAT1 0x83
|
||||
#define BD70528_REG_INT_BAT2 0x84
|
||||
#define BD70528_REG_INT_RTC 0x85
|
||||
#define BD70528_REG_INT_GPIO 0x86
|
||||
#define BD70528_REG_INT_OP_FAIL 0x87
|
||||
|
||||
#define BD70528_REG_INT_SHDN_MASK 0x75
|
||||
#define BD70528_REG_INT_PWR_FLT_MASK 0x76
|
||||
#define BD70528_REG_INT_VR_FLT_MASK 0x77
|
||||
#define BD70528_REG_INT_MISC_MASK 0x78
|
||||
#define BD70528_REG_INT_BAT1_MASK 0x79
|
||||
#define BD70528_REG_INT_BAT2_MASK 0x7a
|
||||
#define BD70528_REG_INT_RTC_MASK 0x7b
|
||||
#define BD70528_REG_INT_GPIO_MASK 0x7c
|
||||
#define BD70528_REG_INT_OP_FAIL_MASK 0x7d
|
||||
|
||||
/* Reset related 'magic' registers */
|
||||
#define BD70528_REG_SHIPMODE 0x03
|
||||
#define BD70528_REG_HWRESET 0x04
|
||||
#define BD70528_REG_WARMRESET 0x05
|
||||
#define BD70528_REG_STANDBY 0x06
|
||||
|
||||
/* GPIO registers */
|
||||
#define BD70528_REG_GPIO_STATE 0x8F
|
||||
|
||||
#define BD70528_REG_GPIO1_IN 0x4d
|
||||
#define BD70528_REG_GPIO2_IN 0x4f
|
||||
#define BD70528_REG_GPIO3_IN 0x51
|
||||
#define BD70528_REG_GPIO4_IN 0x53
|
||||
#define BD70528_REG_GPIO1_OUT 0x4e
|
||||
#define BD70528_REG_GPIO2_OUT 0x50
|
||||
#define BD70528_REG_GPIO3_OUT 0x52
|
||||
#define BD70528_REG_GPIO4_OUT 0x54
|
||||
|
||||
/* RTC */
|
||||
|
||||
#define BD70528_REG_RTC_COUNT_H 0x2d
|
||||
#define BD70528_REG_RTC_COUNT_L 0x2e
|
||||
#define BD70528_REG_RTC_SEC 0x2f
|
||||
#define BD70528_REG_RTC_MINUTE 0x30
|
||||
#define BD70528_REG_RTC_HOUR 0x31
|
||||
#define BD70528_REG_RTC_WEEK 0x32
|
||||
#define BD70528_REG_RTC_DAY 0x33
|
||||
#define BD70528_REG_RTC_MONTH 0x34
|
||||
#define BD70528_REG_RTC_YEAR 0x35
|
||||
|
||||
#define BD70528_REG_RTC_ALM_SEC 0x36
|
||||
#define BD70528_REG_RTC_ALM_START BD70528_REG_RTC_ALM_SEC
|
||||
#define BD70528_REG_RTC_ALM_MINUTE 0x37
|
||||
#define BD70528_REG_RTC_ALM_HOUR 0x38
|
||||
#define BD70528_REG_RTC_ALM_WEEK 0x39
|
||||
#define BD70528_REG_RTC_ALM_DAY 0x3a
|
||||
#define BD70528_REG_RTC_ALM_MONTH 0x3b
|
||||
#define BD70528_REG_RTC_ALM_YEAR 0x3c
|
||||
#define BD70528_REG_RTC_ALM_MASK 0x3d
|
||||
#define BD70528_REG_RTC_ALM_REPEAT 0x3e
|
||||
#define BD70528_REG_RTC_START BD70528_REG_RTC_SEC
|
||||
|
||||
#define BD70528_REG_RTC_WAKE_SEC 0x43
|
||||
#define BD70528_REG_RTC_WAKE_START BD70528_REG_RTC_WAKE_SEC
|
||||
#define BD70528_REG_RTC_WAKE_MIN 0x44
|
||||
#define BD70528_REG_RTC_WAKE_HOUR 0x45
|
||||
#define BD70528_REG_RTC_WAKE_CTRL 0x46
|
||||
|
||||
#define BD70528_REG_ELAPSED_TIMER_EN 0x42
|
||||
#define BD70528_REG_WAKE_EN 0x46
|
||||
|
||||
/* WDT registers */
|
||||
#define BD70528_REG_WDT_CTRL 0x4A
|
||||
#define BD70528_REG_WDT_HOUR 0x49
|
||||
#define BD70528_REG_WDT_MINUTE 0x48
|
||||
#define BD70528_REG_WDT_SEC 0x47
|
||||
|
||||
/* Charger / Battery */
|
||||
#define BD70528_REG_CHG_CURR_STAT 0x59
|
||||
#define BD70528_REG_CHG_BAT_STAT 0x57
|
||||
#define BD70528_REG_CHG_BAT_TEMP 0x58
|
||||
#define BD70528_REG_CHG_IN_STAT 0x56
|
||||
#define BD70528_REG_CHG_DCIN_ILIM 0x5d
|
||||
#define BD70528_REG_CHG_CHG_CURR_WARM 0x61
|
||||
#define BD70528_REG_CHG_CHG_CURR_COLD 0x62
|
||||
|
||||
/* Masks for main IRQ register bits */
|
||||
enum {
|
||||
BD70528_INT_SHDN,
|
||||
#define BD70528_INT_SHDN_MASK BIT(BD70528_INT_SHDN)
|
||||
BD70528_INT_PWR_FLT,
|
||||
#define BD70528_INT_PWR_FLT_MASK BIT(BD70528_INT_PWR_FLT)
|
||||
BD70528_INT_VR_FLT,
|
||||
#define BD70528_INT_VR_FLT_MASK BIT(BD70528_INT_VR_FLT)
|
||||
BD70528_INT_MISC,
|
||||
#define BD70528_INT_MISC_MASK BIT(BD70528_INT_MISC)
|
||||
BD70528_INT_BAT1,
|
||||
#define BD70528_INT_BAT1_MASK BIT(BD70528_INT_BAT1)
|
||||
BD70528_INT_RTC,
|
||||
#define BD70528_INT_RTC_MASK BIT(BD70528_INT_RTC)
|
||||
BD70528_INT_GPIO,
|
||||
#define BD70528_INT_GPIO_MASK BIT(BD70528_INT_GPIO)
|
||||
BD70528_INT_OP_FAIL,
|
||||
#define BD70528_INT_OP_FAIL_MASK BIT(BD70528_INT_OP_FAIL)
|
||||
};
|
||||
|
||||
/* IRQs */
|
||||
enum {
|
||||
/* Shutdown register IRQs */
|
||||
BD70528_INT_LONGPUSH,
|
||||
BD70528_INT_WDT,
|
||||
BD70528_INT_HWRESET,
|
||||
BD70528_INT_RSTB_FAULT,
|
||||
BD70528_INT_VBAT_UVLO,
|
||||
BD70528_INT_TSD,
|
||||
BD70528_INT_RSTIN,
|
||||
/* Power failure register IRQs */
|
||||
BD70528_INT_BUCK1_FAULT,
|
||||
BD70528_INT_BUCK2_FAULT,
|
||||
BD70528_INT_BUCK3_FAULT,
|
||||
BD70528_INT_LDO1_FAULT,
|
||||
BD70528_INT_LDO2_FAULT,
|
||||
BD70528_INT_LDO3_FAULT,
|
||||
BD70528_INT_LED1_FAULT,
|
||||
BD70528_INT_LED2_FAULT,
|
||||
/* VR FAULT register IRQs */
|
||||
BD70528_INT_BUCK1_OCP,
|
||||
BD70528_INT_BUCK2_OCP,
|
||||
BD70528_INT_BUCK3_OCP,
|
||||
BD70528_INT_LED1_OCP,
|
||||
BD70528_INT_LED2_OCP,
|
||||
BD70528_INT_BUCK1_FULLON,
|
||||
BD70528_INT_BUCK2_FULLON,
|
||||
/* PMU register interrupts */
|
||||
BD70528_INT_SHORTPUSH,
|
||||
BD70528_INT_AUTO_WAKEUP,
|
||||
BD70528_INT_STATE_CHANGE,
|
||||
/* Charger 1 register IRQs */
|
||||
BD70528_INT_BAT_OV_RES,
|
||||
BD70528_INT_BAT_OV_DET,
|
||||
BD70528_INT_DBAT_DET,
|
||||
BD70528_INT_BATTSD_COLD_RES,
|
||||
BD70528_INT_BATTSD_COLD_DET,
|
||||
BD70528_INT_BATTSD_HOT_RES,
|
||||
BD70528_INT_BATTSD_HOT_DET,
|
||||
BD70528_INT_CHG_TSD,
|
||||
/* Charger 2 register IRQs */
|
||||
BD70528_INT_BAT_RMV,
|
||||
BD70528_INT_BAT_DET,
|
||||
BD70528_INT_DCIN2_OV_RES,
|
||||
BD70528_INT_DCIN2_OV_DET,
|
||||
BD70528_INT_DCIN2_RMV,
|
||||
BD70528_INT_DCIN2_DET,
|
||||
BD70528_INT_DCIN1_RMV,
|
||||
BD70528_INT_DCIN1_DET,
|
||||
/* RTC register IRQs */
|
||||
BD70528_INT_RTC_ALARM,
|
||||
BD70528_INT_ELPS_TIM,
|
||||
/* GPIO register IRQs */
|
||||
BD70528_INT_GPIO0,
|
||||
BD70528_INT_GPIO1,
|
||||
BD70528_INT_GPIO2,
|
||||
BD70528_INT_GPIO3,
|
||||
/* Invalid operation register IRQs */
|
||||
BD70528_INT_BUCK1_DVS_OPFAIL,
|
||||
BD70528_INT_BUCK2_DVS_OPFAIL,
|
||||
BD70528_INT_BUCK3_DVS_OPFAIL,
|
||||
BD70528_INT_LED1_VOLT_OPFAIL,
|
||||
BD70528_INT_LED2_VOLT_OPFAIL,
|
||||
};
|
||||
|
||||
/* Masks */
|
||||
#define BD70528_INT_LONGPUSH_MASK 0x1
|
||||
#define BD70528_INT_WDT_MASK 0x2
|
||||
#define BD70528_INT_HWRESET_MASK 0x4
|
||||
#define BD70528_INT_RSTB_FAULT_MASK 0x8
|
||||
#define BD70528_INT_VBAT_UVLO_MASK 0x10
|
||||
#define BD70528_INT_TSD_MASK 0x20
|
||||
#define BD70528_INT_RSTIN_MASK 0x40
|
||||
|
||||
#define BD70528_INT_BUCK1_FAULT_MASK 0x1
|
||||
#define BD70528_INT_BUCK2_FAULT_MASK 0x2
|
||||
#define BD70528_INT_BUCK3_FAULT_MASK 0x4
|
||||
#define BD70528_INT_LDO1_FAULT_MASK 0x8
|
||||
#define BD70528_INT_LDO2_FAULT_MASK 0x10
|
||||
#define BD70528_INT_LDO3_FAULT_MASK 0x20
|
||||
#define BD70528_INT_LED1_FAULT_MASK 0x40
|
||||
#define BD70528_INT_LED2_FAULT_MASK 0x80
|
||||
|
||||
#define BD70528_INT_BUCK1_OCP_MASK 0x1
|
||||
#define BD70528_INT_BUCK2_OCP_MASK 0x2
|
||||
#define BD70528_INT_BUCK3_OCP_MASK 0x4
|
||||
#define BD70528_INT_LED1_OCP_MASK 0x8
|
||||
#define BD70528_INT_LED2_OCP_MASK 0x10
|
||||
#define BD70528_INT_BUCK1_FULLON_MASK 0x20
|
||||
#define BD70528_INT_BUCK2_FULLON_MASK 0x40
|
||||
|
||||
#define BD70528_INT_SHORTPUSH_MASK 0x1
|
||||
#define BD70528_INT_AUTO_WAKEUP_MASK 0x2
|
||||
#define BD70528_INT_STATE_CHANGE_MASK 0x10
|
||||
|
||||
#define BD70528_INT_BAT_OV_RES_MASK 0x1
|
||||
#define BD70528_INT_BAT_OV_DET_MASK 0x2
|
||||
#define BD70528_INT_DBAT_DET_MASK 0x4
|
||||
#define BD70528_INT_BATTSD_COLD_RES_MASK 0x8
|
||||
#define BD70528_INT_BATTSD_COLD_DET_MASK 0x10
|
||||
#define BD70528_INT_BATTSD_HOT_RES_MASK 0x20
|
||||
#define BD70528_INT_BATTSD_HOT_DET_MASK 0x40
|
||||
#define BD70528_INT_CHG_TSD_MASK 0x80
|
||||
|
||||
#define BD70528_INT_BAT_RMV_MASK 0x1
|
||||
#define BD70528_INT_BAT_DET_MASK 0x2
|
||||
#define BD70528_INT_DCIN2_OV_RES_MASK 0x4
|
||||
#define BD70528_INT_DCIN2_OV_DET_MASK 0x8
|
||||
#define BD70528_INT_DCIN2_RMV_MASK 0x10
|
||||
#define BD70528_INT_DCIN2_DET_MASK 0x20
|
||||
#define BD70528_INT_DCIN1_RMV_MASK 0x40
|
||||
#define BD70528_INT_DCIN1_DET_MASK 0x80
|
||||
|
||||
#define BD70528_INT_RTC_ALARM_MASK 0x1
|
||||
#define BD70528_INT_ELPS_TIM_MASK 0x2
|
||||
|
||||
#define BD70528_INT_GPIO0_MASK 0x1
|
||||
#define BD70528_INT_GPIO1_MASK 0x2
|
||||
#define BD70528_INT_GPIO2_MASK 0x4
|
||||
#define BD70528_INT_GPIO3_MASK 0x8
|
||||
|
||||
#define BD70528_INT_BUCK1_DVS_OPFAIL_MASK 0x1
|
||||
#define BD70528_INT_BUCK2_DVS_OPFAIL_MASK 0x2
|
||||
#define BD70528_INT_BUCK3_DVS_OPFAIL_MASK 0x4
|
||||
#define BD70528_INT_LED1_VOLT_OPFAIL_MASK 0x10
|
||||
#define BD70528_INT_LED2_VOLT_OPFAIL_MASK 0x20
|
||||
|
||||
#define BD70528_DEBOUNCE_MASK 0x3
|
||||
|
||||
#define BD70528_DEBOUNCE_DISABLE 0
|
||||
#define BD70528_DEBOUNCE_15MS 1
|
||||
#define BD70528_DEBOUNCE_30MS 2
|
||||
#define BD70528_DEBOUNCE_50MS 3
|
||||
|
||||
#define BD70528_GPIO_DRIVE_MASK 0x2
|
||||
#define BD70528_GPIO_PUSH_PULL 0x0
|
||||
#define BD70528_GPIO_OPEN_DRAIN 0x2
|
||||
|
||||
#define BD70528_GPIO_OUT_EN_MASK 0x80
|
||||
#define BD70528_GPIO_OUT_ENABLE 0x80
|
||||
#define BD70528_GPIO_OUT_DISABLE 0x0
|
||||
|
||||
#define BD70528_GPIO_OUT_HI 0x1
|
||||
#define BD70528_GPIO_OUT_LO 0x0
|
||||
#define BD70528_GPIO_OUT_MASK 0x1
|
||||
|
||||
#define BD70528_GPIO_IN_STATE_BASE 1
|
||||
|
||||
/* RTC masks to mask out reserved bits */
|
||||
|
||||
#define BD70528_MASK_ELAPSED_TIMER_EN 0x1
|
||||
/* Mask second, min and hour fields
|
||||
* HW would support ALM irq for over 24h
|
||||
* (by setting day, month and year too)
|
||||
* but as we wish to keep this same as for
|
||||
* wake-up we limit ALM to 24H and only
|
||||
* unmask sec, min and hour
|
||||
*/
|
||||
#define BD70528_MASK_WAKE_EN 0x1
|
||||
|
||||
/* WDT masks */
|
||||
#define BD70528_MASK_WDT_EN 0x1
|
||||
#define BD70528_MASK_WDT_HOUR 0x1
|
||||
#define BD70528_MASK_WDT_MINUTE 0x7f
|
||||
#define BD70528_MASK_WDT_SEC 0x7f
|
||||
|
||||
#define BD70528_WDT_STATE_BIT 0x1
|
||||
#define BD70528_ELAPSED_STATE_BIT 0x2
|
||||
#define BD70528_WAKE_STATE_BIT 0x4
|
||||
|
||||
/* Charger masks */
|
||||
#define BD70528_MASK_CHG_STAT 0x7f
|
||||
#define BD70528_MASK_CHG_BAT_TIMER 0x20
|
||||
#define BD70528_MASK_CHG_BAT_OVERVOLT 0x10
|
||||
#define BD70528_MASK_CHG_BAT_DETECT 0x1
|
||||
#define BD70528_MASK_CHG_DCIN1_UVLO 0x1
|
||||
#define BD70528_MASK_CHG_DCIN_ILIM 0x3f
|
||||
#define BD70528_MASK_CHG_CHG_CURR 0x1f
|
||||
#define BD70528_MASK_CHG_TRICKLE_CURR 0x10
|
||||
|
||||
/*
|
||||
* Note, external battery register is the lonely rider at
|
||||
* address 0xc5. See how to stuff that in the regmap
|
||||
*/
|
||||
#define BD70528_MAX_REGISTER 0x94
|
||||
|
||||
/* Buck control masks */
|
||||
#define BD70528_MASK_RUN_EN 0x4
|
||||
#define BD70528_MASK_STBY_EN 0x2
|
||||
#define BD70528_MASK_IDLE_EN 0x1
|
||||
#define BD70528_MASK_LED1_EN 0x1
|
||||
#define BD70528_MASK_LED2_EN 0x10
|
||||
|
||||
#define BD70528_MASK_BUCK_VOLT 0xf
|
||||
#define BD70528_MASK_LDO_VOLT 0x1f
|
||||
#define BD70528_MASK_LED1_VOLT 0x1
|
||||
#define BD70528_MASK_LED2_VOLT 0x10
|
||||
|
||||
/* Misc irq masks */
|
||||
#define BD70528_INT_MASK_SHORT_PUSH 1
|
||||
#define BD70528_INT_MASK_AUTO_WAKE 2
|
||||
#define BD70528_INT_MASK_POWER_STATE 4
|
||||
|
||||
#define BD70528_MASK_BUCK_RAMP 0x10
|
||||
#define BD70528_SIFT_BUCK_RAMP 4
|
||||
|
||||
#if IS_ENABLED(CONFIG_BD70528_WATCHDOG)
|
||||
|
||||
int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable, int *old_state);
|
||||
void bd70528_wdt_lock(struct rohm_regmap_dev *data);
|
||||
void bd70528_wdt_unlock(struct rohm_regmap_dev *data);
|
||||
|
||||
#else /* CONFIG_BD70528_WATCHDOG */
|
||||
|
||||
static inline int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable,
|
||||
int *old_state)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void bd70528_wdt_lock(struct rohm_regmap_dev *data)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void bd70528_wdt_unlock(struct rohm_regmap_dev *data)
|
||||
{
|
||||
}
|
||||
|
||||
#endif /* CONFIG_BD70528_WATCHDOG */
|
||||
|
||||
#endif /* __LINUX_MFD_BD70528_H__ */
|
||||
|
|
@ -12,7 +12,6 @@ enum rohm_chip_type {
|
|||
ROHM_CHIP_TYPE_BD9573,
|
||||
ROHM_CHIP_TYPE_BD9574,
|
||||
ROHM_CHIP_TYPE_BD9576,
|
||||
ROHM_CHIP_TYPE_BD70528,
|
||||
ROHM_CHIP_TYPE_BD71815,
|
||||
ROHM_CHIP_TYPE_BD71828,
|
||||
ROHM_CHIP_TYPE_BD71837,
|
||||
|
|
|
|||
|
|
@ -103,7 +103,6 @@
|
|||
#define CNTRLREG_TSC_AFE_CTRL(val) FIELD_PREP(GENMASK(6, 5), (val))
|
||||
#define CNTRLREG_TSC_4WIRE CNTRLREG_TSC_AFE_CTRL(1)
|
||||
#define CNTRLREG_TSC_5WIRE CNTRLREG_TSC_AFE_CTRL(2)
|
||||
#define CNTRLREG_TSC_8WIRE CNTRLREG_TSC_AFE_CTRL(3)
|
||||
#define CNTRLREG_TSC_ENB BIT(7)
|
||||
|
||||
/*Control registers bitfields for MAGADC IP */
|
||||
|
|
|
|||
Loading…
Reference in New Issue