ARM: Renesas SoC cleanup, refactoring and more SMP support

Lots of cleanup and refactoring and some SMP additions for Renesas
 platforms.  Due to some inter-dependencies with other arm-soc
 branches, this Renesas stuff was separated out for sending after the
 other branches were merged.
 
 Highlights:
 - remove unused board support and cleanup of unused headers
 - refactoring of init and device registration
 - simplify IRQ initialization
 
 Conflicts: Too many. Most of these are because Simon chose to send
 some board updates through the V4L tree that ends up colliding with
 the main platform changes. We'll work with him on sorting out his
 workflow:
 
 - arch/arm/boot/dts/r8a7740.dtsi:
   - Add/add conflict in a devicetree file (keep both)
 
 - arch/arm/mach-shmobile/Makefile:
   - Splitting out of clock files collides with intc move to DT.
     Keep HEAD version but remove intc-* files for R8A7740 and R8A7779.
 
 - arch/arm/mach-shmobile/board-bockw.c:
   - Keep HEAD but remove i2c, hspi and mmc device init calls
 
 - arch/arm/mach-shmobile/board-marzen.c
   - Remove mach/hardware.h include and r8a7779_add_usb_phy_device() call,
     everything else stays.
 
 - arch/arm/mach-shmobile/include/mach/r8a7778.h:
   - From HEAD, Keep camera-rcar.h include and r8a7778_add_vin_device()
   - From branch, keep everything
 
 - arch/arm/mach-shmobile/include/mach/r8a7779.h:
   - From HEAD, Keep only camera-rcar.h include and r8a7779_add_vin_device()
 
 - arch/arm/mach-shmobile/setup-r8a7778.c
   - Keep HEAD, but drop the MMC section (struct resource + add_mmc_device())
   - take the new function name from our side (r8a7778_add_dt_devices())
 
 - arch/arm/mach-shmobile/setup-r8a7779.c
   - Keep HEAD, but drop r8a7779_add_usb_phy_device()
 
 I've also pushed a test-merge2 branch where you can see how I resolved
 them.
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Merge tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Renesas SoC cleanup, refactoring and more SMP support from Kevin Hilman:
 "Lots of cleanup and refactoring and some SMP additions for Renesas
  platforms.  Due to some inter-dependencies with other arm-soc
  branches, this Renesas stuff was separated out for sending after the
  other branches were merged.

  Highlights:
   - remove unused board support and cleanup of unused headers
   - refactoring of init and device registration
   - simplify IRQ initialization"

* tag 'renesas-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (68 commits)
  ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
  ARM: shmobile: Introduce per-CPU SMP boot / sleep code
  ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779
  ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0
  ARM: shmobile: Add shared SCU CPU Hotplug code
  ARM: shmobile: Use shared SCU SMP boot code on emev2
  ARM: shmobile: Use shared SCU SMP boot code on r8a7779
  ARM: shmobile: Use shared SCU SMP boot code on sh73a0
  ARM: shmobile: Introduce shared SCU SMP boot code
  ARM: shmobile: sh73a0: Remove global GPIO_NR definition
  ARM: shmobile: kzm9d: remove nfsroot settings from bootargs
  ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs
  ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup
  ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup
  ARM: shmobile: bockw: add missing __initdata
  ARM: shmobile: r8a7790: add missing __initdata
  ARM: shmobile: r8a7779: add missing __initdata
  ARM: shmobile: Remove unused shmobile_init_time()
  ARM: shmobile: Use clocksource_of_init() on r8a7790
  ARM: shmobile: Use default ->init_time() on KZM9G DT ref
  ...
This commit is contained in:
Linus Torvalds 2013-09-09 16:33:57 -07:00
commit fa91515cbf
62 changed files with 856 additions and 1900 deletions

View file

@ -198,12 +198,16 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
emev2-kzm9d-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
r8a7740-armadillo800eva-reference.dtb \
r8a7779-marzen.dtb \
r8a7779-marzen-reference.dtb \
r8a7790-lager.dtb \
r8a7790-lager-reference.dtb \
sh73a0-kzm9g.dtb \
sh73a0-kzm9g-reference.dtb \
r8a73a4-ape6evm.dtb \
r8a73a4-ape6evm-reference.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \

View file

@ -21,7 +21,7 @@ memory {
};
chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
};
reg_1p8v: regulator@0 {

View file

@ -21,6 +21,6 @@ memory {
};
chosen {
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
};
};

View file

@ -46,6 +46,12 @@ gic: interrupt-controller@e0020000 {
<0xe0020000 0x0100>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 120 4>,
<0 121 4>;
};
sti@e0180000 {
compatible = "renesas,em-sti";
reg = <0xe0180000 0x54>;

View file

@ -0,0 +1,65 @@
/*
* Device Tree Source for the APE6EVM board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r8a73a4.dtsi"
/ {
model = "APE6EVM";
compatible = "renesas,ape6evm-reference", "renesas,r8a73a4";
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel rw";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
lbsc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0x80000000>;
};
};
&i2c5 {
vdd_dvfs: max8973@1b {
compatible = "maxim,max8973";
reg = <0x1b>;
regulator-min-microvolt = <935000>;
regulator-max-microvolt = <1200000>;
regulator-boot-on;
regulator-always-on;
};
};
&cpu0 {
cpu0-supply = <&vdd_dvfs>;
operating-points = <
/* kHz uV */
1950000 1115000
1462500 995000
>;
voltage-tolerance = <1>; /* 1% */
};
&pfc {
pinctrl-0 = <&scifa0_pins>;
pinctrl-names = "default";
scifa0_pins: scifa0 {
renesas,groups = "scifa0_data";
renesas,function = "scifa0";
};
};

View file

@ -16,7 +16,7 @@ / {
compatible = "renesas,ape6evm", "renesas,r8a73a4";
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp";
bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
};
memory@40000000 {

View file

@ -17,7 +17,7 @@ / {
compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
chosen {
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
};
memory {

View file

@ -16,7 +16,7 @@ / {
compatible = "renesas,armadillo800eva";
chosen {
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
};
memory {

View file

@ -32,6 +32,11 @@ gic: interrupt-controller@c2800000 {
<0xc2000000 0x1000>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 83 4>;
};
/* irqpin0: IRQ0 - IRQ7 */
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin";
@ -147,4 +152,11 @@ pfc: pfc@e6050000 {
gpio-controller;
#gpio-cells = <2>;
};
tpu: pwm@e6600000 {
compatible = "renesas,tpu-r8a7740", "renesas,tpu";
reg = <0xe6600000 0x100>;
status = "disabled";
#pwm-cells = <3>;
};
};

View file

@ -0,0 +1,32 @@
/*
* Reference Device Tree Source for the Bock-W board
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* based on r8a7779
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Simon Horman
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r8a7778.dtsi"
/ {
model = "bockw";
compatible = "renesas,bockw-reference", "renesas,r8a7778";
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel rw";
};
memory {
device_type = "memory";
reg = <0x60000000 0x10000000>;
};
};

View file

@ -22,7 +22,7 @@ / {
compatible = "renesas,bockw", "renesas,r8a7778";
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs";
bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
};
memory {

View file

@ -18,7 +18,7 @@ / {
compatible = "renesas,marzen-reference", "renesas,r8a7779";
chosen {
bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";
bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on rw";
};
memory {

View file

@ -0,0 +1,27 @@
/*
* Device Tree Source for the Marzen board
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Simon Horman
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r8a7779.dtsi"
/ {
model = "marzen";
compatible = "renesas,marzen", "renesas,r8a7779";
chosen {
bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";
};
memory {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};
};

View file

@ -149,7 +149,7 @@ irqpin0: irqpin@fe780010 {
sense-bitfield-width = <2>;
};
i2c0: i2c@0xffc70000 {
i2c0: i2c@ffc70000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@ -158,7 +158,7 @@ i2c0: i2c@0xffc70000 {
interrupts = <0 79 0x4>;
};
i2c1: i2c@0xffc71000 {
i2c1: i2c@ffc71000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@ -167,7 +167,7 @@ i2c1: i2c@0xffc71000 {
interrupts = <0 82 0x4>;
};
i2c2: i2c@0xffc72000 {
i2c2: i2c@ffc72000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@ -176,7 +176,7 @@ i2c2: i2c@0xffc72000 {
interrupts = <0 80 0x4>;
};
i2c3: i2c@0xffc73000 {
i2c3: i2c@ffc73000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";

View file

@ -0,0 +1,45 @@
/*
* Device Tree Source for the Lager board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
/include/ "r8a7790.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Lager";
compatible = "renesas,lager-reference", "renesas,r8a7790";
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
leds {
compatible = "gpio-leds";
led6 {
gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
};
led7 {
gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
};
led8 {
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
};
};
};

View file

@ -16,7 +16,7 @@ / {
compatible = "renesas,lager", "renesas,r8a7790";
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel";
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory@40000000 {

View file

@ -33,7 +33,7 @@ cpu@0 {
};
chosen {
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
};
memory {

View file

@ -16,7 +16,7 @@ / {
compatible = "renesas,kzm9g", "renesas,sh73a0";
chosen {
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
};
memory {

View file

@ -38,6 +38,12 @@ gic: interrupt-controller@f0001000 {
<0xf0000100 0x100>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 55 4>,
<0 56 4>;
};
irqpin0: irqpin@e6900000 {
compatible = "renesas,intc-irqpin";
#interrupt-cells = <2>;

View file

@ -1,83 +0,0 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_EXPERT=y
CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_ARCH_SH73A0=y
CONFIG_MACH_AG5EVM=y
CONFIG_MEMORY_SIZE=0x10000000
CONFIG_CPU_BPREDICT_DISABLE=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_458693=y
CONFIG_NO_HZ=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=tty0 console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM=y
# CONFIG_SUSPEND is not set
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_BLK_DEV is not set
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_SMSC911X=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_WLAN is not set
CONFIG_INPUT_SPARSEKMAP=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=9
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_SH_MOBILE=y
# CONFIG_HWMON is not set
# CONFIG_MFD_SUPPORT is not set
CONFIG_FB=y
CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_FTRACE is not set

View file

@ -1,121 +0,0 @@
# CONFIG_ARM_PATCH_PHYS_VIRT is not set
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_CGROUPS=y
CONFIG_CPUSETS=y
CONFIG_NAMESPACES=y
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE=y
CONFIG_KEYBOARD_GPIO_POLLED=y
CONFIG_ARCH_SH73A0=y
CONFIG_MACH_KOTA2=y
CONFIG_MEMORY_SIZE=0x1e000000
# CONFIG_SH_TIMER_TMU is not set
# CONFIG_SWP_EMULATE is not set
CONFIG_CPU_BPREDICT_DISABLE=y
CONFIG_ARM_ERRATA_460075=y
CONFIG_ARM_ERRATA_742230=y
CONFIG_ARM_ERRATA_742231=y
CONFIG_PL310_ERRATA_588369=y
CONFIG_ARM_ERRATA_720789=y
CONFIG_PL310_ERRATA_727915=y
CONFIG_ARM_ERRATA_743622=y
CONFIG_ARM_ERRATA_751472=y
CONFIG_PL310_ERRATA_753970=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_PL310_ERRATA_769419=y
CONFIG_NO_HZ=y
CONFIG_SMP=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
CONFIG_CPU_IDLE=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM_RUNTIME=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_CFG80211=y
CONFIG_WIRELESS_EXT_SYSFS=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_BLK_DEV is not set
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_B43=y
CONFIG_B43_PHY_N=y
CONFIG_B43_DEBUG=y
CONFIG_INPUT_SPARSEKMAP=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_SH_KEYSC=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=9
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C_SH_MOBILE=y
# CONFIG_HWMON is not set
CONFIG_BCMA=y
CONFIG_BCMA_DEBUG=y
CONFIG_FB=y
CONFIG_FB_SH_MOBILE_LCDC=y
CONFIG_LCD_PLATFORM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_RENESAS_TPU=y
CONFIG_LEDS_TRIGGERS=y
# CONFIG_DNOTIFY is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_INFO_REDUCED=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y

View file

@ -109,18 +109,22 @@ config ARCH_EMEV2
comment "SH-Mobile Board Type"
config MACH_AG5EVM
bool "AG5EVM board"
depends on ARCH_SH73A0
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SH_LCD_MIPI_DSI
config MACH_APE6EVM
bool "APE6EVM board"
depends on ARCH_R8A73A4
select USE_OF
config MACH_APE6EVM_REFERENCE
bool "APE6EVM board - Reference Device Tree Implementation"
depends on ARCH_R8A73A4
select USE_OF
---help---
Use reference implementation of APE6EVM board support
which makes a greater use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_MACKEREL
bool "mackerel board"
depends on ARCH_SH7372
@ -129,12 +133,6 @@ config MACH_MACKEREL
select SND_SOC_AK4642 if SND_SIMPLE_CARD
select USE_OF
config MACH_KOTA2
bool "KOTA2 board"
depends on ARCH_SH73A0
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
config MACH_ARMADILLO800EVA
bool "Armadillo-800 EVA board"
depends on ARCH_R8A7740
@ -165,11 +163,26 @@ config MACH_BOCKW
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
config MACH_BOCKW_REFERENCE
bool "BOCK-W - Reference Device Tree Implementation"
depends on ARCH_R8A7778
select ARCH_REQUIRE_GPIOLIB
select RENESAS_INTC_IRQPIN
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
---help---
Use reference implementation of BockW board support
which makes use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_MARZEN
bool "MARZEN board"
depends on ARCH_R8A7779
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
config MACH_MARZEN_REFERENCE
bool "MARZEN board - Reference Device Tree Implementation"
@ -189,6 +202,17 @@ config MACH_LAGER
depends on ARCH_R8A7790
select USE_OF
config MACH_LAGER_REFERENCE
bool "Lager board - Reference Device Tree Implementation"
depends on ARCH_R8A7790
select USE_OF
---help---
Use reference implementation of Lager board support
which makes use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_KZM9D
bool "KZM9D board"
depends on ARCH_EMEV2

View file

@ -11,9 +11,9 @@ obj-y := timer.o console.o
obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o intc-sh7372.o
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o intc-sh73a0.o
obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o intc-r8a7740.o
obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o intc-r8a7779.o
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o
obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
@ -32,32 +32,31 @@ endif
# SMP objects
smp-y := platsmp.o headsmp.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
# IRQ objects
obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
obj-$(CONFIG_ARCH_R8A7740) += entry-intc.o
# PM objects
obj-$(CONFIG_SUSPEND) += suspend.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o
obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o
obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o
obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o
obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o
# Board objects
obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o
obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
obj-$(CONFIG_MACH_APE6EVM_REFERENCE) += board-ape6evm-reference.o
obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_KOTA2) += board-kota2.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager.o
obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o

View file

@ -1,16 +1,17 @@
# per-board load address for uImage
loadaddr-y :=
loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
loadaddr-$(CONFIG_MACH_LAGER_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000

View file

@ -1,639 +0,0 @@
/*
* arch/arm/mach-shmobile/board-ag5evm.c
*
* Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
* Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/serial_sci.h>
#include <linux/smsc911x.h>
#include <linux/gpio.h>
#include <linux/videodev2.h>
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/tmio.h>
#include <linux/platform_data/bd6107.h>
#include <linux/sh_clk.h>
#include <linux/irqchip/arm-gic.h>
#include <video/sh_mobile_lcdc.h>
#include <video/sh_mipi_dsi.h>
#include <sound/sh_fsi.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/sh73a0.h>
#include <mach/common.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/traps.h>
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
static struct resource smsc9220_resources[] = {
[0] = {
.start = 0x14000000,
.end = 0x14000000 + SZ_64K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
.flags = IORESOURCE_IRQ,
},
};
static struct smsc911x_platform_config smsc9220_platdata = {
.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
.phy_interface = PHY_INTERFACE_MODE_MII,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
};
static struct platform_device eth_device = {
.name = "smsc911x",
.id = 0,
.dev = {
.platform_data = &smsc9220_platdata,
},
.resource = smsc9220_resources,
.num_resources = ARRAY_SIZE(smsc9220_resources),
};
static struct sh_keysc_info keysc_platdata = {
.mode = SH_KEYSC_MODE_6,
.scan_timing = 3,
.delay = 100,
.keycodes = {
KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
KEY_SPACE, KEY_9, KEY_6, KEY_3, KEY_WAKEUP, KEY_RIGHT, \
KEY_COFFEE,
KEY_0, KEY_8, KEY_5, KEY_2, KEY_DOWN, KEY_ENTER, KEY_UP,
KEY_KPASTERISK, KEY_7, KEY_4, KEY_1, KEY_STOP, KEY_LEFT, \
KEY_COMPUTER,
},
};
static struct resource keysc_resources[] = {
[0] = {
.name = "KEYSC",
.start = 0xe61b0000,
.end = 0xe61b0098 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(71),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device keysc_device = {
.name = "sh_keysc",
.id = 0,
.num_resources = ARRAY_SIZE(keysc_resources),
.resource = keysc_resources,
.dev = {
.platform_data = &keysc_platdata,
},
};
/* FSI A */
static struct resource fsi_resources[] = {
[0] = {
.name = "FSI",
.start = 0xEC230000,
.end = 0xEC230400 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(146),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device fsi_device = {
.name = "sh_fsi2",
.id = -1,
.num_resources = ARRAY_SIZE(fsi_resources),
.resource = fsi_resources,
};
/* Fixed 1.8V regulator to be used by MMCIF */
static struct regulator_consumer_supply fixed1v8_power_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
};
static struct resource sh_mmcif_resources[] = {
[0] = {
.name = "MMCIF",
.start = 0xe6bd0000,
.end = 0xe6bd00ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(141),
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = gic_spi(140),
.flags = IORESOURCE_IRQ,
},
};
static struct sh_mmcif_plat_data sh_mmcif_platdata = {
.sup_pclk = 0,
.ocr = MMC_VDD_165_195,
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
.slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
.slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
};
static struct platform_device mmc_device = {
.name = "sh_mmcif",
.id = 0,
.dev = {
.dma_mask = NULL,
.coherent_dma_mask = 0xffffffff,
.platform_data = &sh_mmcif_platdata,
},
.num_resources = ARRAY_SIZE(sh_mmcif_resources),
.resource = sh_mmcif_resources,
};
/* IrDA */
static struct resource irda_resources[] = {
[0] = {
.start = 0xE6D00000,
.end = 0xE6D01FD4 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(95),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device irda_device = {
.name = "sh_irda",
.id = 0,
.resource = irda_resources,
.num_resources = ARRAY_SIZE(irda_resources),
};
/* MIPI-DSI */
static struct resource mipidsi0_resources[] = {
[0] = {
.name = "DSI0",
.start = 0xfeab0000,
.end = 0xfeab3fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "DSI0",
.start = 0xfeab4000,
.end = 0xfeab7fff,
.flags = IORESOURCE_MEM,
},
};
static int sh_mipi_set_dot_clock(struct platform_device *pdev,
void __iomem *base,
int enable)
{
struct clk *pck, *phy;
int ret;
pck = clk_get(&pdev->dev, "dsip_clk");
if (IS_ERR(pck)) {
ret = PTR_ERR(pck);
goto sh_mipi_set_dot_clock_pck_err;
}
phy = clk_get(&pdev->dev, "dsiphy_clk");
if (IS_ERR(phy)) {
ret = PTR_ERR(phy);
goto sh_mipi_set_dot_clock_phy_err;
}
if (enable) {
clk_set_rate(pck, clk_round_rate(pck, 24000000));
clk_set_rate(phy, clk_round_rate(pck, 510000000));
clk_enable(pck);
clk_enable(phy);
} else {
clk_disable(pck);
clk_disable(phy);
}
ret = 0;
clk_put(phy);
sh_mipi_set_dot_clock_phy_err:
clk_put(pck);
sh_mipi_set_dot_clock_pck_err:
return ret;
}
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.channel = LCDC_CHAN_MAINLCD,
.lane = 2,
.vsynw_offset = 20,
.clksrc = 1,
.flags = SH_MIPI_DSI_HSABM |
SH_MIPI_DSI_SYNC_PULSES_MODE |
SH_MIPI_DSI_HSbyteCLK,
.set_dot_clock = sh_mipi_set_dot_clock,
};
static struct platform_device mipidsi0_device = {
.name = "sh-mipi-dsi",
.num_resources = ARRAY_SIZE(mipidsi0_resources),
.resource = mipidsi0_resources,
.id = 0,
.dev = {
.platform_data = &mipidsi0_info,
},
};
/* LCDC0 and backlight */
static const struct fb_videomode lcdc0_modes[] = {
{
.name = "R63302(QHD)",
.xres = 544,
.yres = 961,
.left_margin = 72,
.right_margin = 600,
.hsync_len = 16,
.upper_margin = 8,
.lower_margin = 8,
.vsync_len = 2,
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
},
};
static struct sh_mobile_lcdc_info lcdc0_info = {
.clock_source = LCDC_CLK_PERIPHERAL,
.ch[0] = {
.chan = LCDC_CHAN_MAINLCD,
.interface_type = RGB24,
.clock_divider = 1,
.flags = LCDC_FLAGS_DWPOL,
.fourcc = V4L2_PIX_FMT_RGB565,
.lcd_modes = lcdc0_modes,
.num_modes = ARRAY_SIZE(lcdc0_modes),
.panel_cfg = {
.width = 44,
.height = 79,
},
.tx_dev = &mipidsi0_device,
}
};
static struct resource lcdc0_resources[] = {
[0] = {
.name = "LCDC0",
.start = 0xfe940000, /* P4-only space */
.end = 0xfe943fff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0x580),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device lcdc0_device = {
.name = "sh_mobile_lcdc_fb",
.num_resources = ARRAY_SIZE(lcdc0_resources),
.resource = lcdc0_resources,
.id = 0,
.dev = {
.platform_data = &lcdc0_info,
.coherent_dma_mask = ~0,
},
};
static struct bd6107_platform_data backlight_data = {
.fbdev = &lcdc0_device.dev,
.reset = 235,
.def_value = 0,
};
static struct i2c_board_info backlight_board_info = {
I2C_BOARD_INFO("bd6107", 0x6d),
.platform_data = &backlight_data,
};
/* Fixed 2.8V regulators to be used by SDHI0 */
static struct regulator_consumer_supply fixed2v8_power_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
};
/* SDHI0 */
static struct sh_mobile_sdhi_info sdhi0_info = {
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
.cd_gpio = 251,
};
static struct resource sdhi0_resources[] = {
[0] = {
.name = "SDHI0",
.start = 0xee100000,
.end = 0xee1000ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
.start = gic_spi(83),
.flags = IORESOURCE_IRQ,
},
[2] = {
.name = SH_MOBILE_SDHI_IRQ_SDCARD,
.start = gic_spi(84),
.flags = IORESOURCE_IRQ,
},
[3] = {
.name = SH_MOBILE_SDHI_IRQ_SDIO,
.start = gic_spi(85),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sdhi0_device = {
.name = "sh_mobile_sdhi",
.id = 0,
.num_resources = ARRAY_SIZE(sdhi0_resources),
.resource = sdhi0_resources,
.dev = {
.platform_data = &sdhi0_info,
},
};
/* Fixed 3.3V regulator to be used by SDHI1 */
static struct regulator_consumer_supply cn4_power_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
};
static struct regulator_init_data cn4_power_init_data = {
.constraints = {
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
},
.num_consumer_supplies = ARRAY_SIZE(cn4_power_consumers),
.consumer_supplies = cn4_power_consumers,
};
static struct fixed_voltage_config cn4_power_info = {
.supply_name = "CN4 SD/MMC Vdd",
.microvolts = 3300000,
.gpio = 114,
.enable_high = 1,
.init_data = &cn4_power_init_data,
};
static struct platform_device cn4_power = {
.name = "reg-fixed-voltage",
.id = 2,
.dev = {
.platform_data = &cn4_power_info,
},
};
static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
{
static int power_gpio = -EINVAL;
if (power_gpio < 0) {
int ret = gpio_request_one(114, GPIOF_OUT_INIT_LOW,
"sdhi1_power");
if (!ret)
power_gpio = 114;
}
/*
* If requesting the GPIO above failed, it means, that the regulator got
* probed and grabbed the GPIO, but we don't know, whether the sdhi
* driver already uses the regulator. If it doesn't, we have to toggle
* the GPIO ourselves, even though it is now owned by the fixed
* regulator driver. We have to live with the race in case the driver
* gets unloaded and the GPIO freed between these two steps.
*/
gpio_set_value(114, state);
}
static struct sh_mobile_sdhi_info sh_sdhi1_info = {
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
.tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
.tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
.set_pwr = ag5evm_sdhi1_set_pwr,
};
static struct resource sdhi1_resources[] = {
[0] = {
.name = "SDHI1",
.start = 0xee120000,
.end = 0xee1200ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = SH_MOBILE_SDHI_IRQ_CARD_DETECT,
.start = gic_spi(87),
.flags = IORESOURCE_IRQ,
},
[2] = {
.name = SH_MOBILE_SDHI_IRQ_SDCARD,
.start = gic_spi(88),
.flags = IORESOURCE_IRQ,
},
[3] = {
.name = SH_MOBILE_SDHI_IRQ_SDIO,
.start = gic_spi(89),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sdhi1_device = {
.name = "sh_mobile_sdhi",
.id = 1,
.dev = {
.platform_data = &sh_sdhi1_info,
},
.num_resources = ARRAY_SIZE(sdhi1_resources),
.resource = sdhi1_resources,
};
static struct platform_device *ag5evm_devices[] __initdata = {
&cn4_power,
&eth_device,
&keysc_device,
&fsi_device,
&mmc_device,
&irda_device,
&mipidsi0_device,
&lcdc0_device,
&sdhi0_device,
&sdhi1_device,
};
static unsigned long pin_pullup_conf[] = {
PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
};
static const struct pinctrl_map ag5evm_pinctrl_map[] = {
/* FSIA */
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_mclk_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_sclk_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_data_in", "fsia"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
"fsia_data_out", "fsia"),
/* I2C2 & I2C3 */
PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.2", "pfc-sh73a0",
"i2c2_0", "i2c2"),
PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
"i2c3_0", "i2c3"),
/* IrDA */
PIN_MAP_MUX_GROUP_DEFAULT("sh_irda.0", "pfc-sh73a0",
"irda_0", "irda"),
/* KEYSC */
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out04", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out5", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out6_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out7_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out8_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out9_2", "keysc"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", pin_pullup_conf),
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_ctrl_0", "mmc0"),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"PORT279", pin_pullup_conf),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", pin_pullup_conf),
/* SCIFA2 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_data_0", "scifa2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_ctrl_0", "scifa2"),
/* SDHI0 (CN15 [SD I/F]) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_wp", "sdhi0"),
/* SDHI1 (CN4 [WLAN I/F]) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_ctrl", "sdhi1"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"PORT263", pin_pullup_conf),
};
static void __init ag5evm_init(void)
{
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers,
ARRAY_SIZE(fixed2v8_power_consumers), 3300000);
regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies));
pinctrl_register_mappings(ag5evm_pinctrl_map,
ARRAY_SIZE(ag5evm_pinctrl_map));
sh73a0_pinmux_init();
/* enable MMCIF */
gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
/* enable SMSC911X */
gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
/* LCD panel */
gpio_request_one(217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
mdelay(1);
gpio_set_value(217, 1);
mdelay(100);
#ifdef CONFIG_CACHE_L2X0
/* Shared attribute override enable, 64K*8way */
l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
#endif
sh73a0_add_standard_devices();
i2c_register_board_info(1, &backlight_board_info, 1);
platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
}
MACHINE_START(AG5EVM, "ag5evm")
.smp = smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
.init_early = sh73a0_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq,
.init_machine = ag5evm_init,
.init_late = shmobile_init_late,
.init_time = sh73a0_earlytimer_init,
MACHINE_END

View file

@ -0,0 +1,63 @@
/*
* APE6EVM board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
#include <linux/sh_clk.h>
#include <mach/common.h>
#include <mach/r8a73a4.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
static void __init ape6evm_add_standard_devices(void)
{
struct clk *parent;
struct clk *mp;
r8a73a4_clock_init();
/* MP clock parent = extal2 */
parent = clk_get(NULL, "extal2");
mp = clk_get(NULL, "mp");
BUG_ON(IS_ERR(parent) || IS_ERR(mp));
clk_set_parent(mp, parent);
clk_put(parent);
clk_put(mp);
r8a73a4_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
}
static const char *ape6evm_boards_compat_dt[] __initdata = {
"renesas,ape6evm-reference",
NULL,
};
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
.init_early = r8a73a4_init_delay,
.init_machine = ape6evm_add_standard_devices,
.dt_compat = ape6evm_boards_compat_dt,
MACHINE_END

View file

@ -241,7 +241,6 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
.init_early = r8a73a4_init_delay,
.init_time = shmobile_timer_init,
.init_machine = ape6evm_add_standard_devices,
.dt_compat = ape6evm_boards_compat_dt,
MACHINE_END

View file

@ -190,7 +190,6 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
.init_early = r8a7740_init_delay,
.init_irq = r8a7740_init_irq_of,
.init_machine = eva_init,
.init_time = shmobile_timer_init,
.init_late = shmobile_init_late,
.dt_compat = eva_boards_compat_dt,
.restart = eva_restart,

View file

@ -1313,7 +1313,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
.map_io = r8a7740_map_io,
.init_early = eva_add_early_devices,
.init_irq = r8a7740_init_irq,
.init_irq = r8a7740_init_irq_of,
.init_machine = eva_init,
.init_late = shmobile_init_late,
.init_time = eva_earlytimer_init,

View file

@ -0,0 +1,61 @@
/*
* Bock-W board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/of_platform.h>
#include <linux/pinctrl/machine.h>
#include <mach/common.h>
#include <mach/r8a7778.h>
#include <asm/mach/arch.h>
/*
* see board-bock.c for checking detail of dip-switch
*/
static const struct pinctrl_map bockw_pinctrl_map[] = {
/* SCIF0 */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_data_a", "scif0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
"scif0_ctrl", "scif0"),
};
static void __init bockw_init(void)
{
r8a7778_clock_init();
pinctrl_register_mappings(bockw_pinctrl_map,
ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init();
r8a7778_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *bockw_boards_compat_dt[] __initdata = {
"renesas,bockw-reference",
NULL,
};
DT_MACHINE_START(BOCKW_DT, "bockw")
.init_early = r8a7778_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_machine = bockw_init,
.dt_compat = bockw_boards_compat_dt,
MACHINE_END

View file

@ -21,8 +21,11 @@
#include <linux/mfd/tmio.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mtd/partitions.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
@ -66,28 +69,38 @@ static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
static struct smsc911x_platform_config smsc911x_data = {
static struct smsc911x_platform_config smsc911x_data __initdata = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.flags = SMSC911X_USE_32BIT,
.phy_interface = PHY_INTERFACE_MODE_MII,
};
static struct resource smsc911x_resources[] = {
static struct resource smsc911x_resources[] __initdata = {
DEFINE_RES_MEM(0x18300000, 0x1000),
DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
};
/* USB */
static struct resource usb_phy_resources[] __initdata = {
DEFINE_RES_MEM(0xffe70800, 0x100),
DEFINE_RES_MEM(0xffe76000, 0x100),
};
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
/* SDHI */
static struct sh_mobile_sdhi_info sdhi0_info = {
static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
};
static struct resource sdhi0_resources[] __initdata = {
DEFINE_RES_MEM(0xFFE4C000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x77)),
};
static struct sh_eth_plat_data ether_platform_data __initdata = {
.phy = 0x01,
.edmac_endian = EDMAC_LITTLE_ENDIAN,
@ -136,7 +149,12 @@ static struct spi_board_info spi_board_info[] __initdata = {
};
/* MMC */
static struct sh_mmcif_plat_data sh_mmcif_plat = {
static struct resource mmc_resources[] __initdata = {
DEFINE_RES_MEM(0xffe4e000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x5d)),
};
static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
.sup_pclk = 0,
.ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
.caps = MMC_CAP_4_BIT_DATA |
@ -217,11 +235,7 @@ static void __init bockw_init(void)
r8a7778_clock_init();
r8a7778_init_irq_extpin(1);
r8a7778_add_standard_devices();
r8a7778_add_usb_phy_device(&usb_phy_platform_data);
r8a7778_add_ether_device(&ether_platform_data);
r8a7778_add_i2c_device(0);
r8a7778_add_hspi_device(0);
r8a7778_add_mmc_device(&sh_mmcif_plat);
r8a7778_add_vin_device(0, &vin_platform_data);
/* VIN1 has a pin conflict with Ether */
if (!IS_ENABLED(CONFIG_SH_ETH))
@ -241,6 +255,19 @@ static void __init bockw_init(void)
ARRAY_SIZE(bockw_pinctrl_map));
r8a7778_pinmux_init();
platform_device_register_resndata(
&platform_bus, "sh_mmcif", -1,
mmc_resources, ARRAY_SIZE(mmc_resources),
&sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
platform_device_register_resndata(
&platform_bus, "rcar_usb_phy", -1,
usb_phy_resources,
ARRAY_SIZE(usb_phy_resources),
&usb_phy_platform_data,
sizeof(struct rcar_phy_platform_data));
/* for SMSC */
base = ioremap_nocache(FPGA, SZ_1M);
if (base) {
@ -276,7 +303,10 @@ static void __init bockw_init(void)
iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
iounmap(base);
r8a7778_sdhi_init(0, &sdhi0_info);
platform_device_register_resndata(
&platform_bus, "sh_mobile_sdhi", 0,
sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
}
}
@ -289,7 +319,6 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
.init_early = r8a7778_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_machine = bockw_init,
.init_time = shmobile_timer_init,
.dt_compat = bockw_boards_compat_dt,
.init_late = r8a7778_init_late,
MACHINE_END

View file

@ -1,550 +0,0 @@
/*
* kota2 board support
*
* Copyright (C) 2011 Renesas Solutions Corp.
* Copyright (C) 2011 Magnus Damm
* Copyright (C) 2010 Takashi Yoshii <yoshii.takashi.zj@renesas.com>
* Copyright (C) 2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_data/pwm-renesas-tpu.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <linux/gpio.h>
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/gpio_keys.h>
#include <linux/leds.h>
#include <linux/leds_pwm.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mfd/tmio.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/sh73a0.h>
#include <mach/common.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/traps.h>
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
/* SMSC 9220 */
static struct resource smsc9220_resources[] = {
[0] = {
.start = 0x14000000, /* CS5A */
.end = 0x140000ff, /* A1->A7 */
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SH73A0_PINT0_IRQ(2), /* PINTA2 */
.flags = IORESOURCE_IRQ,
},
};
static struct smsc911x_platform_config smsc9220_platdata = {
.flags = SMSC911X_USE_32BIT, /* 32-bit SW on 16-bit HW bus */
.phy_interface = PHY_INTERFACE_MODE_MII,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
};
static struct platform_device eth_device = {
.name = "smsc911x",
.id = 0,
.dev = {
.platform_data = &smsc9220_platdata,
},
.resource = smsc9220_resources,
.num_resources = ARRAY_SIZE(smsc9220_resources),
};
/* KEYSC */
static struct sh_keysc_info keysc_platdata = {
.mode = SH_KEYSC_MODE_6,
.scan_timing = 3,
.delay = 100,
.keycodes = {
KEY_NUMERIC_STAR, KEY_NUMERIC_0, KEY_NUMERIC_POUND,
0, 0, 0, 0, 0,
KEY_NUMERIC_7, KEY_NUMERIC_8, KEY_NUMERIC_9,
0, KEY_DOWN, 0, 0, 0,
KEY_NUMERIC_4, KEY_NUMERIC_5, KEY_NUMERIC_6,
KEY_LEFT, KEY_ENTER, KEY_RIGHT, 0, 0,
KEY_NUMERIC_1, KEY_NUMERIC_2, KEY_NUMERIC_3,
0, KEY_UP, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
},
};
static struct resource keysc_resources[] = {
[0] = {
.name = "KEYSC",
.start = 0xe61b0000,
.end = 0xe61b0098 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(71),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device keysc_device = {
.name = "sh_keysc",
.id = 0,
.num_resources = ARRAY_SIZE(keysc_resources),
.resource = keysc_resources,
.dev = {
.platform_data = &keysc_platdata,
},
};
/* GPIO KEY */
#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
static struct gpio_keys_button gpio_buttons[] = {
GPIO_KEY(KEY_VOLUMEUP, 56, "+"), /* S2: VOL+ [IRQ9] */
GPIO_KEY(KEY_VOLUMEDOWN, 54, "-"), /* S3: VOL- [IRQ10] */
GPIO_KEY(KEY_MENU, 27, "Menu"), /* S4: MENU [IRQ30] */
GPIO_KEY(KEY_HOMEPAGE, 26, "Home"), /* S5: HOME [IRQ31] */
GPIO_KEY(KEY_BACK, 11, "Back"), /* S6: BACK [IRQ0] */
GPIO_KEY(KEY_PHONE, 238, "Tel"), /* S7: TEL [IRQ11] */
GPIO_KEY(KEY_POWER, 239, "C1"), /* S8: CAM [IRQ13] */
GPIO_KEY(KEY_MAIL, 224, "Mail"), /* S9: MAIL [IRQ3] */
/* Omitted button "C3?": 223 - S10: CUST [IRQ8] */
GPIO_KEY(KEY_CAMERA, 164, "C2"), /* S11: CAM_HALF [IRQ25] */
/* Omitted button "?": 152 - S12: CAM_FULL [No IRQ] */
};
static struct gpio_keys_platform_data gpio_key_info = {
.buttons = gpio_buttons,
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
static struct platform_device gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &gpio_key_info,
},
};
/* GPIO LED */
#define GPIO_LED(n, g) { .name = n, .gpio = g }
static struct gpio_led gpio_leds[] = {
GPIO_LED("G", 20), /* PORT20 [GPO0] -> LED7 -> "G" */
GPIO_LED("H", 21), /* PORT21 [GPO1] -> LED8 -> "H" */
GPIO_LED("J", 22), /* PORT22 [GPO2] -> LED9 -> "J" */
};
static struct gpio_led_platform_data gpio_leds_info = {
.leds = gpio_leds,
.num_leds = ARRAY_SIZE(gpio_leds),
};
static struct platform_device gpio_leds_device = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &gpio_leds_info,
},
};
/* TPU LED */
static struct resource tpu1_pwm_resources[] = {
[0] = {
.start = 0xe6610000,
.end = 0xe66100ff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device tpu1_pwm_device = {
.name = "renesas-tpu-pwm",
.id = 1,
.num_resources = ARRAY_SIZE(tpu1_pwm_resources),
.resource = tpu1_pwm_resources,
};
static struct resource tpu2_pwm_resources[] = {
[0] = {
.start = 0xe6620000,
.end = 0xe66200ff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device tpu2_pwm_device = {
.name = "renesas-tpu-pwm",
.id = 2,
.num_resources = ARRAY_SIZE(tpu2_pwm_resources),
.resource = tpu2_pwm_resources,
};
static struct resource tpu3_pwm_resources[] = {
[0] = {
.start = 0xe6630000,
.end = 0xe66300ff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device tpu3_pwm_device = {
.name = "renesas-tpu-pwm",
.id = 3,
.num_resources = ARRAY_SIZE(tpu3_pwm_resources),
.resource = tpu3_pwm_resources,
};
static struct resource tpu4_pwm_resources[] = {
[0] = {
.start = 0xe6640000,
.end = 0xe66400ff,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device tpu4_pwm_device = {
.name = "renesas-tpu-pwm",
.id = 4,
.num_resources = ARRAY_SIZE(tpu4_pwm_resources),
.resource = tpu4_pwm_resources,
};
static struct pwm_lookup pwm_lookup[] = {
PWM_LOOKUP("renesas-tpu-pwm.1", 2, "leds-pwm.0", "V2513"),
PWM_LOOKUP("renesas-tpu-pwm.2", 1, "leds-pwm.0", "V2515"),
PWM_LOOKUP("renesas-tpu-pwm.3", 0, "leds-pwm.0", "KEYLED"),
PWM_LOOKUP("renesas-tpu-pwm.4", 1, "leds-pwm.0", "V2514"),
};
static struct led_pwm tpu_pwm_leds[] = {
{
.name = "V2513",
.max_brightness = 1000,
}, {
.name = "V2515",
.max_brightness = 1000,
}, {
.name = "KEYLED",
.max_brightness = 1000,
}, {
.name = "V2514",
.max_brightness = 1000,
},
};
static struct led_pwm_platform_data leds_pwm_pdata = {
.num_leds = ARRAY_SIZE(tpu_pwm_leds),
.leds = tpu_pwm_leds,
};
static struct platform_device leds_pwm_device = {
.name = "leds-pwm",
.id = 0,
.dev = {
.platform_data = &leds_pwm_pdata,
},
};
/* Fixed 1.8V regulator to be used by MMCIF */
static struct regulator_consumer_supply fixed1v8_power_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
};
/* MMCIF */
static struct resource mmcif_resources[] = {
[0] = {
.name = "MMCIF",
.start = 0xe6bd0000,
.end = 0xe6bd00ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(140),
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = gic_spi(141),
.flags = IORESOURCE_IRQ,
},
};
static struct sh_mmcif_plat_data mmcif_info = {
.ocr = MMC_VDD_165_195,
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
};
static struct platform_device mmcif_device = {
.name = "sh_mmcif",
.id = 0,
.dev = {
.platform_data = &mmcif_info,
},
.num_resources = ARRAY_SIZE(mmcif_resources),
.resource = mmcif_resources,
};
/* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */
static struct regulator_consumer_supply fixed3v3_power_consumers[] =
{
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
};
/* SDHI0 */
static struct sh_mobile_sdhi_info sdhi0_info = {
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
};
static struct resource sdhi0_resources[] = {
[0] = {
.name = "SDHI0",
.start = 0xee100000,
.end = 0xee1000ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(83),
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = gic_spi(84),
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = gic_spi(85),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sdhi0_device = {
.name = "sh_mobile_sdhi",
.id = 0,
.num_resources = ARRAY_SIZE(sdhi0_resources),
.resource = sdhi0_resources,
.dev = {
.platform_data = &sdhi0_info,
},
};
/* SDHI1 */
static struct sh_mobile_sdhi_info sdhi1_info = {
.tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
};
static struct resource sdhi1_resources[] = {
[0] = {
.name = "SDHI1",
.start = 0xee120000,
.end = 0xee1200ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(87),
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = gic_spi(88),
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = gic_spi(89),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device sdhi1_device = {
.name = "sh_mobile_sdhi",
.id = 1,
.num_resources = ARRAY_SIZE(sdhi1_resources),
.resource = sdhi1_resources,
.dev = {
.platform_data = &sdhi1_info,
},
};
static struct platform_device *kota2_devices[] __initdata = {
&eth_device,
&keysc_device,
&gpio_keys_device,
&gpio_leds_device,
&tpu1_pwm_device,
&tpu2_pwm_device,
&tpu3_pwm_device,
&tpu4_pwm_device,
&leds_pwm_device,
&mmcif_device,
&sdhi0_device,
&sdhi1_device,
};
static unsigned long pin_pullup_conf[] = {
PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
};
static const struct pinctrl_map kota2_pinctrl_map[] = {
/* KEYSC */
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out04", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out5", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out6_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out7_0", "keysc"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_out8_0", "keysc"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
"keysc_in8", pin_pullup_conf),
/* MMCIF */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", "mmc0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_ctrl_0", "mmc0"),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"PORT279", pin_pullup_conf),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
"mmc0_data8_0", pin_pullup_conf),
/* SCIFA2 (UART2) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_data_0", "scifa2"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
"scifa2_ctrl_0", "scifa2"),
/* SCIFA4 (UART1) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
"scifa4_data", "scifa4"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
"scifa4_ctrl", "scifa4"),
/* SCIFB (BT) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
"scifb_data_0", "scifb"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
"scifb_clk_0", "scifb"),
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
"scifb_ctrl_0", "scifb"),
/* SDHI0 (microSD) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_ctrl", "sdhi0"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_cd", "sdhi0"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"sdhi0_data4", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"PORT256", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
"PORT251", pin_pullup_conf),
/* SDHI1 (BCM4330) */
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", "sdhi1"),
PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_ctrl", "sdhi1"),
PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"sdhi1_data4", pin_pullup_conf),
PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
"PORT263", pin_pullup_conf),
/* SMSC911X */
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_data_0_7", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_data_8_15", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_cs5_a", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_we0", "bsc"),
/* TPU */
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.1", "pfc-sh73a0",
"tpu1_to2", "tpu1"),
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.2", "pfc-sh73a0",
"tpu2_to1", "tpu2"),
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.3", "pfc-sh73a0",
"tpu3_to0", "tpu3"),
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.4", "pfc-sh73a0",
"tpu4_to1", "tpu4"),
};
static void __init kota2_init(void)
{
regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
pinctrl_register_mappings(kota2_pinctrl_map,
ARRAY_SIZE(kota2_pinctrl_map));
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
sh73a0_pinmux_init();
/* SMSC911X */
gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
/* MMCIF */
gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 64K*8way */
l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
#endif
sh73a0_add_standard_devices();
platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
}
MACHINE_START(KOTA2, "kota2")
.smp = smp_ops(sh73a0_smp_ops),
.map_io = sh73a0_map_io,
.init_early = sh73a0_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = sh73a0_init_irq,
.init_machine = kota2_init,
.init_late = shmobile_init_late,
.init_time = sh73a0_earlytimer_init,
MACHINE_END

View file

@ -52,6 +52,5 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
.init_early = sh73a0_init_delay,
.nr_irqs = NR_IRQS_LEGACY,
.init_machine = kzm_init,
.init_time = shmobile_timer_init,
.dt_compat = kzm9g_boards_compat_dt,
MACHINE_END

View file

@ -54,14 +54,14 @@
/*
* external GPIO
*/
#define GPIO_PCF8575_BASE (GPIO_NR)
#define GPIO_PCF8575_PORT10 (GPIO_NR + 8)
#define GPIO_PCF8575_PORT11 (GPIO_NR + 9)
#define GPIO_PCF8575_PORT12 (GPIO_NR + 10)
#define GPIO_PCF8575_PORT13 (GPIO_NR + 11)
#define GPIO_PCF8575_PORT14 (GPIO_NR + 12)
#define GPIO_PCF8575_PORT15 (GPIO_NR + 13)
#define GPIO_PCF8575_PORT16 (GPIO_NR + 14)
#define GPIO_PCF8575_BASE (310)
#define GPIO_PCF8575_PORT10 (GPIO_PCF8575_BASE + 8)
#define GPIO_PCF8575_PORT11 (GPIO_PCF8575_BASE + 9)
#define GPIO_PCF8575_PORT12 (GPIO_PCF8575_BASE + 10)
#define GPIO_PCF8575_PORT13 (GPIO_PCF8575_BASE + 11)
#define GPIO_PCF8575_PORT14 (GPIO_PCF8575_BASE + 12)
#define GPIO_PCF8575_PORT15 (GPIO_PCF8575_BASE + 13)
#define GPIO_PCF8575_PORT16 (GPIO_PCF8575_BASE + 14)
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {

View file

@ -0,0 +1,45 @@
/*
* Lager board support - Reference DT implementation
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Simon Horman
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/of_platform.h>
#include <mach/r8a7790.h>
#include <asm/mach/arch.h>
static void __init lager_add_standard_devices(void)
{
/* clocks are setup late during boot in the case of DT */
r8a7790_clock_init();
r8a7790_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *lager_boards_compat_dt[] __initdata = {
"renesas,lager-reference",
NULL,
};
DT_MACHINE_START(LAGER_DT, "lager")
.init_early = r8a7790_init_delay,
.init_machine = lager_add_standard_devices,
.init_time = r8a7790_timer_init,
.dt_compat = lager_boards_compat_dt,
MACHINE_END

View file

@ -42,6 +42,5 @@ DT_MACHINE_START(MARZEN, "marzen")
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = r8a7779_init_irq_dt,
.init_machine = marzen_init,
.init_time = shmobile_timer_init,
.dt_compat = marzen_boards_compat_dt,
MACHINE_END

View file

@ -30,6 +30,7 @@
#include <linux/dma-mapping.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
@ -39,7 +40,6 @@
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/tmio.h>
#include <media/soc_camera.h>
#include <mach/hardware.h>
#include <mach/r8a7779.h>
#include <mach/common.h>
#include <mach/irqs.h>
@ -59,7 +59,26 @@ static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};
static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
/* USB PHY */
static struct resource usb_phy_resources[] = {
[0] = {
.start = 0xffe70800,
.end = 0xffe70900 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct rcar_phy_platform_data usb_phy_platform_data;
static struct platform_device usb_phy = {
.name = "rcar_usb_phy",
.id = -1,
.dev = {
.platform_data = &usb_phy_platform_data,
},
.resource = usb_phy_resources,
.num_resources = ARRAY_SIZE(usb_phy_resources),
};
/* SMSC LAN89218 */
static struct resource smsc911x_resources[] = {
@ -212,6 +231,7 @@ static struct platform_device *marzen_devices[] __initdata = {
&thermal_device,
&hspi_device,
&leds_device,
&usb_phy,
&camera0_device,
&camera1_device,
};
@ -274,19 +294,23 @@ static void __init marzen_init(void)
r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
r8a7779_add_standard_devices();
r8a7779_add_usb_phy_device(&usb_phy_platform_data);
r8a7779_add_vin_device(1, &vin_platform_data);
r8a7779_add_vin_device(3, &vin_platform_data);
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
}
MACHINE_START(MARZEN, "marzen")
static const char *marzen_boards_compat_dt[] __initdata = {
"renesas,marzen",
NULL,
};
DT_MACHINE_START(MARZEN, "marzen")
.smp = smp_ops(r8a7779_smp_ops),
.map_io = r8a7779_map_io,
.init_early = r8a7779_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = r8a7779_init_irq,
.init_irq = r8a7779_init_irq_dt,
.init_machine = marzen_init,
.init_late = r8a7779_init_late,
.dt_compat = marzen_boards_compat_dt,
.init_time = r8a7779_earlytimer_init,
MACHINE_END

View file

@ -40,3 +40,52 @@ shmobile_boot_fn:
.globl shmobile_boot_arg
shmobile_boot_arg:
2: .space 4
/*
* Per-CPU SMP boot function/argument selection code based on MPIDR
*/
ENTRY(shmobile_smp_boot)
@ r0 = MPIDR_HWID_BITMASK
mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
and r0, r1, r0 @ r0 = cpu_logical_map() value
mov r1, #0 @ r1 = CPU index
adr r5, 1f @ array of per-cpu mpidr values
adr r6, 2f @ array of per-cpu functions
adr r7, 3f @ array of per-cpu arguments
shmobile_smp_boot_find_mpidr:
ldr r8, [r5, r1, lsl #2]
cmp r8, r0
bne shmobile_smp_boot_next
ldr r9, [r6, r1, lsl #2]
cmp r9, #0
bne shmobile_smp_boot_found
shmobile_smp_boot_next:
add r1, r1, #1
cmp r1, #CONFIG_NR_CPUS
blo shmobile_smp_boot_find_mpidr
b shmobile_smp_sleep
shmobile_smp_boot_found:
ldr r0, [r7, r1, lsl #2]
mov pc, r9
ENDPROC(shmobile_smp_boot)
ENTRY(shmobile_smp_sleep)
wfi
b shmobile_smp_boot
ENDPROC(shmobile_smp_sleep)
.globl shmobile_smp_mpidr
shmobile_smp_mpidr:
1: .space CONFIG_NR_CPUS * 4
.globl shmobile_smp_fn
shmobile_smp_fn:
2: .space CONFIG_NR_CPUS * 4
.globl shmobile_smp_arg
shmobile_smp_arg:
3: .space CONFIG_NR_CPUS * 4

View file

@ -2,7 +2,6 @@
#define __ARCH_MACH_COMMON_H
extern void shmobile_earlytimer_init(void);
extern void shmobile_timer_init(void);
extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
unsigned int mult, unsigned int div);
struct twd_local_timer;
@ -10,7 +9,16 @@ extern void shmobile_setup_console(void);
extern void shmobile_boot_vector(void);
extern unsigned long shmobile_boot_fn;
extern unsigned long shmobile_boot_arg;
extern void shmobile_smp_boot(void);
extern void shmobile_smp_sleep(void);
extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
unsigned long arg);
extern void shmobile_boot_scu(void);
extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
struct task_struct *idle);
extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
struct clk;
extern int shmobile_clk_init(void);
extern void shmobile_handle_irq_intc(struct pt_regs *);

View file

@ -1,4 +0,0 @@
#ifndef __ASM_MACH_HARDWARE_H
#define __ASM_MACH_HARDWARE_H
#endif /* __ASM_MACH_HARDWARE_H */

View file

@ -2,6 +2,7 @@
#define __ASM_R8A73A4_H__
void r8a73a4_add_standard_devices(void);
void r8a73a4_add_dt_devices(void);
void r8a73a4_clock_init(void);
void r8a73a4_pinmux_init(void);
void r8a73a4_init_delay(void);

View file

@ -48,7 +48,6 @@ enum {
extern void r8a7740_meram_workaround(void);
extern void r8a7740_init_delay(void);
extern void r8a7740_init_irq(void);
extern void r8a7740_init_irq_of(void);
extern void r8a7740_map_io(void);
extern void r8a7740_add_early_devices(void);

View file

@ -18,21 +18,15 @@
#ifndef __ASM_R8A7778_H__
#define __ASM_R8A7778_H__
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/sh_eth.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/platform_data/camera-rcar.h>
extern void r8a7778_add_standard_devices(void);
extern void r8a7778_add_standard_devices_dt(void);
extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
extern void r8a7778_add_i2c_device(int id);
extern void r8a7778_add_hspi_device(int id);
extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
extern void r8a7778_add_vin_device(int id,
struct rcar_vin_platform_data *pdata);
extern void r8a7778_add_dt_devices(void);
extern void r8a7778_init_late(void);
extern void r8a7778_init_delay(void);
@ -40,6 +34,5 @@ extern void r8a7778_init_irq_dt(void);
extern void r8a7778_clock_init(void);
extern void r8a7778_init_irq_extpin(int irlm);
extern void r8a7778_pinmux_init(void);
extern void r8a7778_sdhi_init(int id, struct sh_mobile_sdhi_info *info);
#endif /* __ASM_R8A7778_H__ */

View file

@ -4,7 +4,6 @@
#include <linux/sh_clk.h>
#include <linux/pm_domain.h>
#include <linux/sh_eth.h>
#include <linux/platform_data/usb-rcar-phy.h>
#include <linux/platform_data/camera-rcar.h>
struct platform_device;
@ -26,7 +25,6 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d)
}
extern void r8a7779_init_delay(void);
extern void r8a7779_init_irq(void);
extern void r8a7779_init_irq_extpin(int irlm);
extern void r8a7779_init_irq_dt(void);
extern void r8a7779_map_io(void);
@ -35,7 +33,6 @@ extern void r8a7779_add_early_devices(void);
extern void r8a7779_add_standard_devices(void);
extern void r8a7779_add_standard_devices_dt(void);
extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
extern void r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
extern void r8a7779_add_vin_device(int idx,
struct rcar_vin_platform_data *pdata);
extern void r8a7779_init_late(void);

View file

@ -2,6 +2,7 @@
#define __ASM_R8A7790_H__
void r8a7790_add_standard_devices(void);
void r8a7790_add_dt_devices(void);
void r8a7790_clock_init(void);
void r8a7790_pinmux_init(void);
void r8a7790_init_delay(void);

View file

@ -1,8 +1,6 @@
#ifndef __ASM_SH73A0_H__
#define __ASM_SH73A0_H__
#define GPIO_NR 310
/* DMA slave IDs */
enum {
SHDMA_SLAVE_INVALID,

View file

@ -1,68 +0,0 @@
/*
* R8A7740 processor support
*
* Copyright (C) 2011 Renesas Solutions Corp.
* Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
static void __init r8a7740_init_irq_common(void)
{
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
/* route signals to GIC */
iowrite32(0x0, pfc_inta_ctrl);
/*
* To mask the shared interrupt to SPI 149 we must ensure to set
* PRIO *and* MASK. Else we run into IRQ floods when registering
* the intc_irqpin devices
*/
iowrite32(0x0, intc_prio_base + 0x0);
iowrite32(0x0, intc_prio_base + 0x4);
iowrite32(0x0, intc_prio_base + 0x8);
iowrite32(0x0, intc_prio_base + 0xc);
iowrite8(0xff, intc_msk_base + 0x0);
iowrite8(0xff, intc_msk_base + 0x4);
iowrite8(0xff, intc_msk_base + 0x8);
iowrite8(0xff, intc_msk_base + 0xc);
iounmap(intc_prio_base);
iounmap(intc_msk_base);
iounmap(pfc_inta_ctrl);
}
void __init r8a7740_init_irq_of(void)
{
irqchip_init();
r8a7740_init_irq_common();
}
void __init r8a7740_init_irq(void)
{
void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
/* initialize the Generic Interrupt Controller PL390 r0p0 */
gic_init(0, 29, gic_dist_base, gic_cpu_base);
r8a7740_init_irq_common();
}

View file

@ -1,131 +0,0 @@
/*
* r8a7779 processor support - INTC hardware block
*
* Copyright (C) 2011 Renesas Solutions Corp.
* Copyright (C) 2011 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
#include <linux/irqchip.h>
#include <mach/common.h>
#include <mach/intc.h>
#include <mach/irqs.h>
#include <mach/r8a7779.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#define INT2SMSKCR0 IOMEM(0xfe7822a0)
#define INT2SMSKCR1 IOMEM(0xfe7822a4)
#define INT2SMSKCR2 IOMEM(0xfe7822a8)
#define INT2SMSKCR3 IOMEM(0xfe7822ac)
#define INT2SMSKCR4 IOMEM(0xfe7822b0)
#define INT2NTSR0 IOMEM(0xfe700060)
#define INT2NTSR1 IOMEM(0xfe700064)
static struct renesas_intc_irqpin_config irqpin0_platform_data = {
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
.sense_bitfield_width = 2,
};
static struct resource irqpin0_resources[] = {
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */
DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */
DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */
DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
};
static struct platform_device irqpin0_device = {
.name = "renesas_intc_irqpin",
.id = 0,
.resource = irqpin0_resources,
.num_resources = ARRAY_SIZE(irqpin0_resources),
.dev = {
.platform_data = &irqpin0_platform_data,
},
};
void __init r8a7779_init_irq_extpin(int irlm)
{
void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
unsigned long tmp;
if (icr0) {
tmp = ioread32(icr0);
if (irlm)
tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
else
tmp &= ~(1 << 23); /* IRL mode - not supported */
tmp |= (1 << 21); /* LVLMODE = 1 */
iowrite32(tmp, icr0);
iounmap(icr0);
if (irlm)
platform_device_register(&irqpin0_device);
} else
pr_warn("r8a7779: unable to setup external irq pin mode\n");
}
static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
{
return 0; /* always allow wakeup */
}
static void __init r8a7779_init_irq_common(void)
{
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
/* route all interrupts to ARM */
__raw_writel(0xffffffff, INT2NTSR0);
__raw_writel(0x3fffffff, INT2NTSR1);
/* unmask all known interrupts in INTCS2 */
__raw_writel(0xfffffff0, INT2SMSKCR0);
__raw_writel(0xfff7ffff, INT2SMSKCR1);
__raw_writel(0xfffbffdf, INT2SMSKCR2);
__raw_writel(0xbffffffc, INT2SMSKCR3);
__raw_writel(0x003fee3f, INT2SMSKCR4);
}
void __init r8a7779_init_irq(void)
{
void __iomem *gic_dist_base = IOMEM(0xf0001000);
void __iomem *gic_cpu_base = IOMEM(0xf0000100);
/* use GIC to handle interrupts */
gic_init(0, 29, gic_dist_base, gic_cpu_base);
r8a7779_init_irq_common();
}
#ifdef CONFIG_OF
void __init r8a7779_init_irq_dt(void)
{
irqchip_init();
r8a7779_init_irq_common();
}
#endif

View file

@ -0,0 +1,81 @@
/*
* SMP support for SoCs with SCU covered by mach-shmobile
*
* Copyright (C) 2013 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include <mach/common.h>
void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
{
/* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* enable SCU and cache coherency on booting CPU */
scu_enable(shmobile_scu_base);
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
}
int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
/* For this particular CPU register SCU boot vector */
shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
(unsigned long)shmobile_scu_base);
return 0;
}
#ifdef CONFIG_HOTPLUG_CPU
void shmobile_smp_scu_cpu_die(unsigned int cpu)
{
/* For this particular CPU deregister boot vector */
shmobile_smp_hook(cpu, 0, 0);
dsb();
flush_cache_all();
/* disable cache coherency */
scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
/* jump to shared mach-shmobile sleep / reset code */
shmobile_smp_sleep();
}
static int shmobile_smp_scu_psr_core_disabled(int cpu)
{
unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);
if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
return 1;
return 0;
}
int shmobile_smp_scu_cpu_kill(unsigned int cpu)
{
int k;
/* this function is running on another CPU than the offline target,
* here we need wait for shutdown code in platform_cpu_die() to
* finish before asking SoC-specific code to power off the CPU core.
*/
for (k = 0; k < 1000; k++) {
if (shmobile_smp_scu_psr_core_disabled(cpu))
return 1;
mdelay(1);
}
return 0;
}
#endif

View file

@ -12,6 +12,9 @@
*/
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <mach/common.h>
void __init shmobile_smp_init_cpus(unsigned int ncores)
{
@ -26,3 +29,18 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
}
extern unsigned long shmobile_smp_fn[];
extern unsigned long shmobile_smp_arg[];
extern unsigned long shmobile_smp_mpidr[];
void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg)
{
shmobile_smp_fn[cpu] = 0;
flush_cache_all();
shmobile_smp_mpidr[cpu] = cpu_logical_map(cpu);
shmobile_smp_fn[cpu] = fn;
shmobile_smp_arg[cpu] = arg;
flush_cache_all();
}

View file

@ -27,7 +27,6 @@
#include <linux/input.h>
#include <linux/io.h>
#include <linux/irqchip/arm-gic.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/emev2.h>
#include <mach/irqs.h>

View file

@ -188,7 +188,7 @@ static struct resource cmt10_resources[] = {
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a73a4_add_standard_devices(void)
void __init r8a73a4_add_dt_devices(void)
{
r8a73a4_register_scif(SCIFA0);
r8a73a4_register_scif(SCIFA1);
@ -196,10 +196,15 @@ void __init r8a73a4_add_standard_devices(void)
r8a73a4_register_scif(SCIFB1);
r8a73a4_register_scif(SCIFB2);
r8a73a4_register_scif(SCIFB3);
r8a7790_register_cmt(10);
}
void __init r8a73a4_add_standard_devices(void)
{
r8a73a4_add_dt_devices();
r8a73a4_register_irqc(0);
r8a73a4_register_irqc(1);
r8a73a4_register_thermal();
r8a7790_register_cmt(10);
}
void __init r8a73a4_init_delay(void)
@ -210,11 +215,6 @@ void __init r8a73a4_init_delay(void)
}
#ifdef CONFIG_USE_OF
void __init r8a73a4_add_standard_devices_dt(void)
{
platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *r8a73a4_boards_compat_dt[] __initdata = {
"renesas,r8a73a4",
@ -223,8 +223,6 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
.init_early = r8a73a4_init_delay,
.init_machine = r8a73a4_add_standard_devices_dt,
.init_time = shmobile_timer_init,
.dt_compat = r8a73a4_boards_compat_dt,
MACHINE_END
#endif /* CONFIG_USE_OF */

View file

@ -22,6 +22,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
@ -1019,6 +1021,36 @@ void __init r8a7740_init_delay(void)
shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
};
void __init r8a7740_init_irq_of(void)
{
void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
irqchip_init();
/* route signals to GIC */
iowrite32(0x0, pfc_inta_ctrl);
/*
* To mask the shared interrupt to SPI 149 we must ensure to set
* PRIO *and* MASK. Else we run into IRQ floods when registering
* the intc_irqpin devices
*/
iowrite32(0x0, intc_prio_base + 0x0);
iowrite32(0x0, intc_prio_base + 0x4);
iowrite32(0x0, intc_prio_base + 0x8);
iowrite32(0x0, intc_prio_base + 0xc);
iowrite8(0xff, intc_msk_base + 0x0);
iowrite8(0xff, intc_msk_base + 0x4);
iowrite8(0xff, intc_msk_base + 0x8);
iowrite8(0xff, intc_msk_base + 0xc);
iounmap(intc_prio_base);
iounmap(intc_msk_base);
iounmap(pfc_inta_ctrl);
}
static void __init r8a7740_generic_init(void)
{
r8a7740_clock_init(0);
@ -1035,7 +1067,6 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
.init_early = r8a7740_init_delay,
.init_irq = r8a7740_init_irq_of,
.init_machine = r8a7740_generic_init,
.init_time = shmobile_timer_init,
.dt_compat = r8a7740_boards_compat_dt,
MACHINE_END

View file

@ -95,20 +95,6 @@ static struct sh_timer_config sh_tmu1_platform_data __initdata = {
&sh_tmu##idx##_platform_data, \
sizeof(sh_tmu##idx##_platform_data))
/* USB PHY */
static struct resource usb_phy_resources[] __initdata = {
DEFINE_RES_MEM(0xffe70800, 0x100),
DEFINE_RES_MEM(0xffe76000, 0x100),
};
void __init r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
{
platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
usb_phy_resources,
ARRAY_SIZE(usb_phy_resources),
pdata, sizeof(*pdata));
}
/* USB */
static struct usb_phy *phy;
@ -248,30 +234,6 @@ void __init r8a7778_pinmux_init(void)
r8a7778_register_gpio(4);
};
/* SDHI */
static struct resource sdhi_resources[] __initdata = {
/* SDHI0 */
DEFINE_RES_MEM(0xFFE4C000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x77)),
/* SDHI1 */
DEFINE_RES_MEM(0xFFE4D000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x78)),
/* SDHI2 */
DEFINE_RES_MEM(0xFFE4F000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x76)),
};
void __init r8a7778_sdhi_init(int id,
struct sh_mobile_sdhi_info *info)
{
BUG_ON(id < 0 || id > 2);
platform_device_register_resndata(
&platform_bus, "sh_mobile_sdhi", id,
sdhi_resources + (2 * id), 2,
info, sizeof(*info));
}
/* I2C */
static struct resource i2c_resources[] __initdata = {
/* I2C0 */
@ -288,7 +250,7 @@ static struct resource i2c_resources[] __initdata = {
DEFINE_RES_IRQ(gic_iid(0x6d)),
};
void __init r8a7778_add_i2c_device(int id)
static void __init r8a7778_register_i2c(int id)
{
BUG_ON(id < 0 || id > 3);
@ -310,7 +272,7 @@ static struct resource hspi_resources[] __initdata = {
DEFINE_RES_IRQ(gic_iid(0x75)),
};
void __init r8a7778_add_hspi_device(int id)
void __init r8a7778_register_hspi(int id)
{
BUG_ON(id < 0 || id > 2);
@ -319,20 +281,6 @@ void __init r8a7778_add_hspi_device(int id)
hspi_resources + (2 * id), 2);
}
/* MMC */
static struct resource mmc_resources[] __initdata = {
DEFINE_RES_MEM(0xffe4e000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x5d)),
};
void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
{
platform_device_register_resndata(
&platform_bus, "sh_mmcif", -1,
mmc_resources, ARRAY_SIZE(mmc_resources),
info, sizeof(*info));
}
/* VIN */
#define R8A7778_VIN(idx) \
static struct resource vin##idx##_resources[] __initdata = { \
@ -367,7 +315,7 @@ void __init r8a7778_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
platform_device_register_full(vin_info_table[id]);
}
void __init r8a7778_add_standard_devices(void)
void __init r8a7778_add_dt_devices(void)
{
int i;
@ -391,6 +339,18 @@ void __init r8a7778_add_standard_devices(void)
r8a7778_register_tmu(1);
}
void __init r8a7778_add_standard_devices(void)
{
r8a7778_add_dt_devices();
r8a7778_register_i2c(0);
r8a7778_register_i2c(1);
r8a7778_register_i2c(2);
r8a7778_register_i2c(3);
r8a7778_register_hspi(0);
r8a7778_register_hspi(1);
r8a7778_register_hspi(2);
}
void __init r8a7778_init_late(void)
{
phy = usb_get_phy(USB_PHY_TYPE_USB2);
@ -480,7 +440,6 @@ static const char *r8a7778_compat_dt[] __initdata = {
DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
.init_early = r8a7778_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_time = shmobile_timer_init,
.dt_compat = r8a7778_compat_dt,
.init_late = r8a7778_init_late,
MACHINE_END

View file

@ -22,14 +22,16 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqchip/arm-gic.h>
#include <linux/of_platform.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/serial_sci.h>
#include <linux/sh_intc.h>
#include <linux/sh_timer.h>
#include <linux/dma-mapping.h>
#include <linux/usb/otg.h>
@ -37,7 +39,6 @@
#include <linux/usb/ehci_pdriver.h>
#include <linux/usb/ohci_pdriver.h>
#include <linux/pm_runtime.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/r8a7779.h>
#include <mach/common.h>
@ -69,6 +70,60 @@ void __init r8a7779_map_io(void)
iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
}
/* IRQ */
#define INT2SMSKCR0 IOMEM(0xfe7822a0)
#define INT2SMSKCR1 IOMEM(0xfe7822a4)
#define INT2SMSKCR2 IOMEM(0xfe7822a8)
#define INT2SMSKCR3 IOMEM(0xfe7822ac)
#define INT2SMSKCR4 IOMEM(0xfe7822b0)
#define INT2NTSR0 IOMEM(0xfe700060)
#define INT2NTSR1 IOMEM(0xfe700064)
static struct renesas_intc_irqpin_config irqpin0_platform_data __initdata = {
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
.sense_bitfield_width = 2,
};
static struct resource irqpin0_resources[] __initdata = {
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */
DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */
DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */
DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
};
void __init r8a7779_init_irq_extpin(int irlm)
{
void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
u32 tmp;
if (!icr0) {
pr_warn("r8a7779: unable to setup external irq pin mode\n");
return;
}
tmp = ioread32(icr0);
if (irlm)
tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
else
tmp &= ~(1 << 23); /* IRL mode - not supported */
tmp |= (1 << 21); /* LVLMODE = 1 */
iowrite32(tmp, icr0);
iounmap(icr0);
if (irlm)
platform_device_register_resndata(
&platform_bus, "renesas_intc_irqpin", -1,
irqpin0_resources, ARRAY_SIZE(irqpin0_resources),
&irqpin0_platform_data, sizeof(irqpin0_platform_data));
}
/* PFC/GPIO */
static struct resource r8a7779_pfc_resources[] = {
DEFINE_RES_MEM(0xfffc0000, 0x023c),
};
@ -388,15 +443,6 @@ static struct platform_device sata_device = {
},
};
/* USB PHY */
static struct resource usb_phy_resources[] __initdata = {
[0] = {
.start = 0xffe70800,
.end = 0xffe70900 - 1,
.flags = IORESOURCE_MEM,
},
};
/* USB */
static struct usb_phy *phy;
@ -548,7 +594,7 @@ static struct platform_device ohci1_device = {
};
/* Ether */
static struct resource ether_resources[] = {
static struct resource ether_resources[] __initdata = {
{
.start = 0xfde00000,
.end = 0xfde003ff,
@ -629,14 +675,6 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
pdata, sizeof(*pdata));
}
void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
{
platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
usb_phy_resources,
ARRAY_SIZE(usb_phy_resources),
pdata, sizeof(*pdata));
}
void __init r8a7779_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
{
BUG_ON(id < 0 || id > 3);
@ -697,6 +735,29 @@ void __init r8a7779_init_late(void)
}
#ifdef CONFIG_USE_OF
static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
{
return 0; /* always allow wakeup */
}
void __init r8a7779_init_irq_dt(void)
{
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
irqchip_init();
/* route all interrupts to ARM */
__raw_writel(0xffffffff, INT2NTSR0);
__raw_writel(0x3fffffff, INT2NTSR1);
/* unmask all known interrupts in INTCS2 */
__raw_writel(0xfffffff0, INT2SMSKCR0);
__raw_writel(0xfff7ffff, INT2SMSKCR1);
__raw_writel(0xfffbffdf, INT2SMSKCR2);
__raw_writel(0xbffffffc, INT2SMSKCR3);
__raw_writel(0x003fee3f, INT2SMSKCR4);
}
void __init r8a7779_init_delay(void)
{
shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
@ -723,7 +784,6 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
.nr_irqs = NR_IRQS_LEGACY,
.init_irq = r8a7779_init_irq_dt,
.init_machine = r8a7779_add_standard_devices_dt,
.init_time = shmobile_timer_init,
.init_late = r8a7779_init_late,
.dt_compat = r8a7779_compat_dt,
MACHINE_END

View file

@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clocksource.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
@ -160,13 +161,13 @@ static struct resource thermal_resources[] __initdata = {
thermal_resources, \
ARRAY_SIZE(thermal_resources))
static struct sh_timer_config cmt00_platform_data = {
static struct sh_timer_config cmt00_platform_data __initdata = {
.name = "CMT00",
.timer_bit = 0,
.clockevent_rating = 80,
};
static struct resource cmt00_resources[] = {
static struct resource cmt00_resources[] __initdata = {
DEFINE_RES_MEM(0xffca0510, 0x0c),
DEFINE_RES_MEM(0xffca0500, 0x04),
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
@ -179,7 +180,7 @@ static struct resource cmt00_resources[] = {
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a7790_add_standard_devices(void)
void __init r8a7790_add_dt_devices(void)
{
r8a7790_register_scif(SCIFA0);
r8a7790_register_scif(SCIFA1);
@ -191,9 +192,14 @@ void __init r8a7790_add_standard_devices(void)
r8a7790_register_scif(SCIF1);
r8a7790_register_scif(HSCIF0);
r8a7790_register_scif(HSCIF1);
r8a7790_register_cmt(00);
}
void __init r8a7790_add_standard_devices(void)
{
r8a7790_add_dt_devices();
r8a7790_register_irqc(0);
r8a7790_register_thermal();
r8a7790_register_cmt(00);
}
#define MODEMR 0xe6160060
@ -258,7 +264,7 @@ void __init r8a7790_timer_init(void)
iounmap(base);
#endif /* CONFIG_ARM_ARCH_TIMER */
shmobile_timer_init();
clocksource_of_init();
}
void __init r8a7790_init_delay(void)

View file

@ -35,7 +35,6 @@
#include <linux/dma-mapping.h>
#include <linux/platform_data/sh_ipmmu.h>
#include <mach/dma-register.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>
#include <mach/common.h>

View file

@ -34,7 +34,6 @@
#include <linux/platform_data/sh_ipmmu.h>
#include <linux/platform_data/irq-renesas-intc-irqpin.h>
#include <mach/dma-register.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/sh73a0.h>
#include <mach/common.h>

View file

@ -34,6 +34,12 @@
static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int ret;
ret = shmobile_smp_scu_boot_secondary(cpu, idle);
if (ret)
return ret;
arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
return 0;
}
@ -42,21 +48,16 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
{
void __iomem *smu;
/* setup EMEV2 specific SCU base, enable */
shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
scu_enable(shmobile_scu_base);
/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
/* Tell ROM loader about our vector (in headsmp.S) */
smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
if (smu) {
iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
iounmap(smu);
}
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
/* enable cache coherency on booting CPU */
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
/* setup EMEV2 specific SCU bits */
shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
shmobile_smp_scu_prepare_cpus(max_cpus);
}
struct smp_operations emev2_smp_ops __initdata = {

View file

@ -84,30 +84,34 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
struct r8a7779_pm_ch *ch = NULL;
int ret = -EIO;
unsigned int lcpu = cpu_logical_map(cpu);
int ret;
cpu = cpu_logical_map(cpu);
ret = shmobile_smp_scu_boot_secondary(cpu, idle);
if (ret)
return ret;
if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
ch = r8a7779_ch_cpu[cpu];
if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu))
ch = r8a7779_ch_cpu[lcpu];
if (ch)
ret = r8a7779_sysc_power_up(ch);
else
ret = -EIO;
return ret;
}
static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
{
scu_enable(shmobile_scu_base);
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
__raw_writel(__pa(shmobile_boot_vector), AVECR);
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
/* enable cache coherency on booting CPU */
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
/* setup r8a7779 specific SCU bits */
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
shmobile_smp_scu_prepare_cpus(max_cpus);
r8a7779_pm_init();
@ -117,56 +121,15 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
r8a7779_platform_cpu_kill(3);
}
static void __init r8a7779_smp_init_cpus(void)
{
/* setup r8a7779 specific SCU base */
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
}
#ifdef CONFIG_HOTPLUG_CPU
static int r8a7779_scu_psr_core_disabled(int cpu)
{
unsigned long mask = 3 << (cpu * 8);
if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
return 1;
return 0;
}
static int r8a7779_cpu_kill(unsigned int cpu)
{
int k;
/* this function is running on another CPU than the offline target,
* here we need wait for shutdown code in platform_cpu_die() to
* finish before asking SoC-specific code to power off the CPU core.
*/
for (k = 0; k < 1000; k++) {
if (r8a7779_scu_psr_core_disabled(cpu))
return r8a7779_platform_cpu_kill(cpu);
mdelay(1);
}
if (shmobile_smp_scu_cpu_kill(cpu))
return r8a7779_platform_cpu_kill(cpu);
return 0;
}
static void r8a7779_cpu_die(unsigned int cpu)
{
dsb();
flush_cache_all();
/* disable cache coherency */
scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
/* Endless loop until power off from r8a7779_cpu_kill() */
while (1)
cpu_do_idle();
}
static int r8a7779_cpu_disable(unsigned int cpu)
{
/* only CPU1->3 have power domains, do not allow hotplug of CPU0 */
@ -175,12 +138,11 @@ static int r8a7779_cpu_disable(unsigned int cpu)
#endif /* CONFIG_HOTPLUG_CPU */
struct smp_operations r8a7779_smp_ops __initdata = {
.smp_init_cpus = r8a7779_smp_init_cpus,
.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
.smp_boot_secondary = r8a7779_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_kill = r8a7779_cpu_kill,
.cpu_die = r8a7779_cpu_die,
.cpu_disable = r8a7779_cpu_disable,
.cpu_die = shmobile_smp_scu_cpu_die,
.cpu_kill = r8a7779_cpu_kill,
#endif
};

View file

@ -20,14 +20,11 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <mach/common.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include <mach/sh73a0.h>
#include <asm/smp_scu.h>
#include <asm/smp_plat.h>
#include <asm/smp_twd.h>
#define WUPCR IOMEM(0xe6151010)
@ -36,8 +33,6 @@
#define SBAR IOMEM(0xe6180020)
#define APARMBAREA IOMEM(0xe6f10020)
#define PSTR_SHUTDOWN_MODE 3
#define SH73A0_SCU_BASE 0xf0000000
#ifdef CONFIG_HAVE_ARM_TWD
@ -50,69 +45,33 @@ void __init sh73a0_register_twd(void)
static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
cpu = cpu_logical_map(cpu);
unsigned int lcpu = cpu_logical_map(cpu);
int ret;
if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
__raw_writel(1 << cpu, WUPCR); /* wake up */
ret = shmobile_smp_scu_boot_secondary(cpu, idle);
if (ret)
return ret;
if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3)
__raw_writel(1 << lcpu, WUPCR); /* wake up */
else
__raw_writel(1 << cpu, SRESCR); /* reset */
__raw_writel(1 << lcpu, SRESCR); /* reset */
return 0;
}
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
{
scu_enable(shmobile_scu_base);
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
/* Map the reset vector (in headsmp.S) */
__raw_writel(0, APARMBAREA); /* 4k */
__raw_writel(__pa(shmobile_boot_vector), SBAR);
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
/* enable cache coherency on booting CPU */
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
}
static void __init sh73a0_smp_init_cpus(void)
{
/* setup sh73a0 specific SCU base */
/* setup sh73a0 specific SCU bits */
shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
shmobile_smp_scu_prepare_cpus(max_cpus);
}
#ifdef CONFIG_HOTPLUG_CPU
static int sh73a0_cpu_kill(unsigned int cpu)
{
int k;
u32 pstr;
/*
* wait until the power status register confirms the shutdown of the
* offline target
*/
for (k = 0; k < 1000; k++) {
pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3;
if (pstr == PSTR_SHUTDOWN_MODE)
return 1;
mdelay(1);
}
return 0;
}
static void sh73a0_cpu_die(unsigned int cpu)
{
/* Set power off mode. This takes the CPU out of the MP cluster */
scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
/* Enter shutdown mode */
cpu_do_idle();
}
static int sh73a0_cpu_disable(unsigned int cpu)
{
return 0; /* CPU0 and CPU1 supported */
@ -120,12 +79,11 @@ static int sh73a0_cpu_disable(unsigned int cpu)
#endif /* CONFIG_HOTPLUG_CPU */
struct smp_operations sh73a0_smp_ops __initdata = {
.smp_init_cpus = sh73a0_smp_init_cpus,
.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
.smp_boot_secondary = sh73a0_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_kill = sh73a0_cpu_kill,
.cpu_die = sh73a0_cpu_die,
.cpu_disable = sh73a0_cpu_disable,
.cpu_die = shmobile_smp_scu_cpu_die,
.cpu_kill = shmobile_smp_scu_cpu_kill,
#endif
};

View file

@ -59,7 +59,3 @@ void __init shmobile_earlytimer_init(void)
late_time_init = shmobile_late_time_init;
}
void __init shmobile_timer_init(void)
{
clocksource_of_init();
}