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[PATCH] e1000: Added PCIe bus information
This is two patches, the first is adding additional bus information for the 8257{1|2|3} controllers. The second patch was orginally a community patch to print bus type/speed/width, and enhanced by us. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: John Ronciak <john.ronciak@intel.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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@ -807,6 +807,26 @@ e1000_probe(struct pci_dev *pdev,
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if(eeprom_data & eeprom_apme_mask)
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adapter->wol |= E1000_WUFC_MAG;
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/* print bus type/speed/width info */
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{
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struct e1000_hw *hw = &adapter->hw;
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DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
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((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
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(hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
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((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
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(hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
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(hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
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(hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
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(hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
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((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
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(hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
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(hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
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"32-bit"));
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}
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for (i = 0; i < 6; i++)
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printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
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/* reset the hardware with the new settings */
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e1000_reset(adapter);
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