dt-bindings: PCI: intel,lgm-pcie: Add reference to common schemas

Add a reference to snps,dw-pcie.yaml (and indirectly pci-bus.yaml) schemas.
With this, the common bus properties can be dropped from the schema.

Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210719220351.2662758-1-robh@kernel.org
This commit is contained in:
Rob Herring 2021-07-19 15:49:02 -06:00
parent 1c14c1695e
commit fbe280ee67

View file

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: PCIe RC controller on Intel Gateway SoCs
maintainers:
- Dilip Kota <eswara.kota@linux.intel.com>
- Rahul Tanwar <rtanwar@maxlinear.com>
select:
properties:
@ -17,21 +17,15 @@ select:
required:
- compatible
allOf:
- $ref: /schemas/pci/snps,dw-pcie.yaml#
properties:
compatible:
items:
- const: intel,lgm-pcie
- const: snps,dw-pcie
device_type:
const: pci
"#address-cells":
const: 3
"#size-cells":
const: 2
reg:
items:
- description: Controller control and status registers.
@ -62,30 +56,13 @@ properties:
reset-gpios:
maxItems: 1
linux,pci-domain: true
num-lanes:
maximum: 2
description: Number of lanes to use for this port.
'#interrupt-cells':
const: 1
interrupt-map-mask:
description: Standard PCI IRQ mapping properties.
interrupt-map:
description: Standard PCI IRQ mapping properties.
max-link-speed:
description: Specify PCI Gen for link capability.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 3, 4]
default: 1
bus-range:
description: Range of bus numbers associated with this controller.
reset-assert-ms:
description: |
Delay after asserting reset to the PCIe device.
@ -94,9 +71,6 @@ properties:
required:
- compatible
- device_type
- "#address-cells"
- "#size-cells"
- reg
- reg-names
- ranges
@ -109,7 +83,7 @@ required:
- interrupt-map
- interrupt-map-mask
additionalProperties: false
unevaluatedProperties: false
examples:
- |