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bpf: verifier: MOV64 don't mark dst reg unbounded
When check_alu_op() handles a BPF_MOV64 between two registers, it calls check_reg_arg(DST_OP) on the dst register, marking it as unbounded. If the src and dst register are the same, this marks the src as unbounded, which can lead to unexpected errors for further checks that rely on bounds info. For example: BPF_MOV64_IMM(BPF_REG_2, 0), BPF_MOV64_REG(BPF_REG_2, BPF_REG_2), BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2), BPF_MOV64_IMM(BPF_REG_0, 0), BPF_EXIT_INSN(), Results in: "math between ctx pointer and register with unbounded min value is not allowed" check_alu_op() now uses check_reg_arg(DST_OP_NO_MARK), and MOVs that need to mark the dst register (MOVIMM, MOV32) do so. Added a test case for MOV64 dst == src, and dst != src. Signed-off-by: Arthur Fabre <afabre@cloudflare.com> Acked-by: Edward Cree <ecree@solarflare.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
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2 changed files with 30 additions and 2 deletions
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@ -3238,8 +3238,8 @@ static int check_alu_op(struct bpf_verifier_env *env, struct bpf_insn *insn)
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}
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}
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/* check dest operand */
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err = check_reg_arg(env, insn->dst_reg, DST_OP);
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/* check dest operand, mark as required later */
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err = check_reg_arg(env, insn->dst_reg, DST_OP_NO_MARK);
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if (err)
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return err;
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@ -3265,6 +3265,8 @@ static int check_alu_op(struct bpf_verifier_env *env, struct bpf_insn *insn)
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/* case: R = imm
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* remember the value we stored into this reg
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*/
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/* clear any state __mark_reg_known doesn't set */
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mark_reg_unknown(env, regs, insn->dst_reg);
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regs[insn->dst_reg].type = SCALAR_VALUE;
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if (BPF_CLASS(insn->code) == BPF_ALU64) {
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__mark_reg_known(regs + insn->dst_reg,
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@ -12332,6 +12332,32 @@ static struct bpf_test tests[] = {
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.result = REJECT,
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.errstr = "variable ctx access var_off=(0x0; 0x4)",
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},
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{
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"mov64 src == dst",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_2, 0),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_2),
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// Check bounds are OK
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BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_SCHED_CLS,
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.result = ACCEPT,
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},
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{
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"mov64 src != dst",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_3, 0),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_3),
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// Check bounds are OK
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BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_SCHED_CLS,
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.result = ACCEPT,
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},
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};
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static int probe_filter_length(const struct bpf_insn *fp)
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