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dt-bindings: soc: mediatek: convert pwrap documentation 

- Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml
- Add syscon compatible const for mt8186 and mt8195 to match the DTS needs,
  which is missing from pwrap.txt.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20221005-mt6357-support-v8-2-560caaafee53@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Alexandre Mergnat 2023-01-02 17:06:03 +01:00 committed by Matthias Brugger
parent f32397bfbd
commit fc5a643fdd
4 changed files with 149 additions and 77 deletions
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2
Documentation/devicetree/bindings/leds/leds-mt6323.txt
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@ -9,7 +9,7 @@ MT6323 PMIC hardware.
For MT6323 MFD bindings see:
Documentation/devicetree/bindings/mfd/mt6397.txt
For MediaTek PMIC wrapper bindings see:
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
Required properties:
- compatible : Must be "mediatek,mt6323-led"

2
Documentation/devicetree/bindings/mfd/mt6397.txt
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@ -13,7 +13,7 @@ MT6397/MT6323 is a multifunction device with the following sub modules:
It is interfaced to host controller using SPI interface by a proprietary hardware
called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap.
See the following for pwarp node definitions:
../soc/mediatek/pwrap.txt
../soc/mediatek/mediatek,pwrap.yaml
This document describes the binding for MFD device and its sub module.

147
Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml Normal file
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@ -0,0 +1,147 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek PMIC Wrapper
maintainers:
- Flora Fu <flora.fu@mediatek.com>
- Alexandre Mergnat <amergnat@baylibre.com>
description:
On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
is not directly visible to the CPU, but only through the PMIC wrapper
inside the SoC. The communication between the SoC and the PMIC can
optionally be encrypted. Also a non standard Dual IO SPI mode can be
used to increase speed.
IP Pairing
On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
The signals of these pins are routed over the SPI bus using the pwrap
bridge. In the binding description below the properties needed for bridging
are marked with "IP Pairing". These are optional on SoCs which do not support
IP Pairing
properties:
compatible:
oneOf:
- items:
- enum:
- mediatek,mt2701-pwrap
- mediatek,mt6765-pwrap
- mediatek,mt6779-pwrap
- mediatek,mt6797-pwrap
- mediatek,mt6873-pwrap
- mediatek,mt7622-pwrap
- mediatek,mt8135-pwrap
- mediatek,mt8173-pwrap
- mediatek,mt8183-pwrap
- mediatek,mt8186-pwrap
- mediatek,mt8188-pwrap
- mediatek,mt8195-pwrap
- mediatek,mt8365-pwrap
- mediatek,mt8516-pwrap
- items:
- enum:
- mediatek,mt8186-pwrap
- mediatek,mt8195-pwrap
- const: syscon
reg:
minItems: 1
items:
- description: PMIC wrapper registers
- description: IP pairing registers
reg-names:
minItems: 1
items:
- const: pwrap
- const: pwrap-bridge
interrupts:
maxItems: 1
clocks:
minItems: 2
items:
- description: SPI bus clock
- description: Main module clock
- description: System module clock
- description: Timer module clock
clock-names:
minItems: 2
items:
- const: spi
- const: wrap
- const: sys
- const: tmr
resets:
minItems: 1
items:
- description: PMIC wrapper reset
- description: IP pairing reset
reset-names:
minItems: 1
items:
- const: pwrap
- const: pwrap-bridge
pmic:
type: object
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
dependentRequired:
resets: [reset-names]
allOf:
- if:
properties:
compatible:
contains:
const: mediatek,mt8365-pwrap
then:
properties:
clocks:
minItems: 4
clock-names:
minItems: 4
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/mt8135-resets.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
pwrap@1000f000 {
compatible = "mediatek,mt8135-pwrap";
reg = <0 0x1000f000 0 0x1000>,
<0 0x11017000 0 0x1000>;
reg-names = "pwrap", "pwrap-bridge";
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk26m>, <&clk26m>;
clock-names = "spi", "wrap";
resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
<&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
reset-names = "pwrap", "pwrap-bridge";
};
};

75
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
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@ -1,75 +0,0 @@
MediaTek PMIC Wrapper Driver
This document describes the binding for the MediaTek PMIC wrapper.
On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
is not directly visible to the CPU, but only through the PMIC wrapper
inside the SoC. The communication between the SoC and the PMIC can
optionally be encrypted. Also a non standard Dual IO SPI mode can be
used to increase speed.
IP Pairing
on MT8135 the pins of some SoC internal peripherals can be on the PMIC.
The signals of these pins are routed over the SPI bus using the pwrap
bridge. In the binding description below the properties needed for bridging
are marked with "IP Pairing". These are optional on SoCs which do not support
IP Pairing
Required properties in pwrap device node.
- compatible:
"mediatek,mt2701-pwrap" for MT2701/7623 SoCs
"mediatek,mt6765-pwrap" for MT6765 SoCs
"mediatek,mt6779-pwrap" for MT6779 SoCs
"mediatek,mt6797-pwrap" for MT6797 SoCs
"mediatek,mt6873-pwrap" for MT6873/8192 SoCs
"mediatek,mt7622-pwrap" for MT7622 SoCs
"mediatek,mt8135-pwrap" for MT8135 SoCs
"mediatek,mt8173-pwrap" for MT8173 SoCs
"mediatek,mt8183-pwrap" for MT8183 SoCs
"mediatek,mt8186-pwrap" for MT8186 SoCs
"mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs
"mediatek,mt8195-pwrap" for MT8195 SoCs
"mediatek,mt8365-pwrap" for MT8365 SoCs
"mediatek,mt8516-pwrap" for MT8516 SoCs
- interrupts: IRQ for pwrap in SOC
- reg-names: "pwrap" is required; "pwrap-bridge" is optional.
"pwrap": Main registers base
"pwrap-bridge": bridge base (IP Pairing)
- reg: Must contain an entry for each entry in reg-names.
- clock-names: Must include the following entries:
"spi": SPI bus clock
"wrap": Main module clock
"sys": Optional system module clock
"tmr": Optional timer module clock
- clocks: Must contain an entry for each entry in clock-names.
Optional properities:
- reset-names: Some SoCs include the following entries:
"pwrap"
"pwrap-bridge" (IP Pairing)
- resets: Must contain an entry for each entry in reset-names.
- pmic: Using either MediaTek PMIC MFD as the child device of pwrap
See the following for child node definitions:
Documentation/devicetree/bindings/mfd/mt6397.txt
or the regulator-only device as the child device of pwrap, such as MT6380.
See the following definitions for such kinds of devices.
Documentation/devicetree/bindings/regulator/mt6380-regulator.txt
Example:
pwrap: pwrap@1000f000 {
compatible = "mediatek,mt8135-pwrap";
reg = <0 0x1000f000 0 0x1000>,
<0 0x11017000 0 0x1000>;
reg-names = "pwrap", "pwrap-bridge";
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
<&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
reset-names = "pwrap", "pwrap-bridge";
clocks = <&clk26m>, <&clk26m>;
clock-names = "spi", "wrap";
pmic {
compatible = "mediatek,mt6397";
};
};