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mmc: dw_mmc: clear IDSTS register when initialize IDMAC
If pending interrupt for IDMAC exists when initialize IDMAC, it will call interrupt handler unnecessarily. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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1 changed files with 6 additions and 0 deletions
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@ -51,6 +51,11 @@
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#define DW_MCI_DMA_THRESHOLD 16
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#define DW_MCI_DMA_THRESHOLD 16
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#ifdef CONFIG_MMC_DW_IDMAC
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#ifdef CONFIG_MMC_DW_IDMAC
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#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
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SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
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SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \
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SDMMC_IDMAC_INT_TI)
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struct idmac_desc {
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struct idmac_desc {
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u32 des0; /* Control Descriptor */
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u32 des0; /* Control Descriptor */
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#define IDMAC_DES0_DIC BIT(1)
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#define IDMAC_DES0_DIC BIT(1)
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@ -433,6 +438,7 @@ static int dw_mci_idmac_init(struct dw_mci *host)
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mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET);
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mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET);
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/* Mask out interrupts - get Tx & Rx complete only */
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/* Mask out interrupts - get Tx & Rx complete only */
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mci_writel(host, IDSTS, IDMAC_INT_CLR);
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mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI |
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mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI |
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SDMMC_IDMAC_INT_TI);
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SDMMC_IDMAC_INT_TI);
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