pinctrl: renesas: checker: Add reserved field checks

Add checks for discovering registers with reserved fields that could
benefit from being described using variable-width reserved field
shorthands, reducing kernel size.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/f5a5159ba7b396e6f09dd3f23c864a74ed8e342d.1649865241.git.geert+renesas@glider.be
This commit is contained in:
Geert Uytterhoeven 2022-04-13 19:24:12 +02:00
parent 753278b4cb
commit fc883ed5a4

View file

@ -877,7 +877,7 @@ static const struct sh_pfc_pin __init *sh_pfc_find_pin(
static void __init sh_pfc_check_cfg_reg(const char *drvname,
const struct pinmux_cfg_reg *cfg_reg)
{
unsigned int i, n, rw;
unsigned int i, n, rw, r;
int fw;
sh_pfc_check_reg(drvname, cfg_reg->reg,
@ -886,6 +886,15 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname,
if (cfg_reg->field_width) {
fw = cfg_reg->field_width;
n = (cfg_reg->reg_width / fw) << fw;
for (i = 0, r = 0; i < n; i += 1 << fw) {
if (is0s(&cfg_reg->enum_ids[i], 1 << fw))
r++;
}
if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw)
sh_pfc_warn("reg 0x%x can be described with variable-width reserved fields\n",
cfg_reg->reg);
/* Skip field checks (done at build time) */
goto check_enum_ids;
}