mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-26 10:49:33 +00:00
arm64 fixes:
- Fix potential memory leak in perf PMU probing - BPF sign extension fix for 64-bit immediates - Fix build failure with unusual configuration - Revert unused and broken branch patching from alternative code -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJVVGxeAAoJELescNyEwWM05DYH/Ajusp2WZjh3FVC7tJbNF1ky ODplN/p2bWDFhq62/pFKIR7Ms5+l6BgcS3rLxIzN6CeMIyKiU/jHnCKvNNyBcL/K aXLPJ84zNQ+iMCbjwDOEqwE2h2dPb1dXYAWsIywJ1ZzRSEwe9uIdlbLoicQT3HM6 pTbmjvNxDY/nRygFgCa/o2MCnnyld1heGibeVdSivFSRxg59E+d9i2PVlLjl05ND V5cPFdRS/TEJnjOQ0g3c+sBSqrYwD5ad0RiFJMAS0mUG7ww0wwhCUE4hkmZy7sqT Iwux96/h5VzCwlHszFmfq0/kQoa/uYusydAhQ/chlTYyWG4CXq05O6mpfql72KU= =MDVF -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: - fix potential memory leak in perf PMU probing - BPF sign extension fix for 64-bit immediates - fix build failure with unusual configuration - revert unused and broken branch patching from alternative code * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: perf: fix memory leak when probing PMU PPIs arm64: bpf: fix signedness bug in loading 64-bit immediate arm64: mm: Fix build error with CONFIG_SPARSEMEM_VMEMMAP disabled Revert "arm64: alternative: Allow immediate branch as alternative instruction"
This commit is contained in:
commit
fc8c540b1d
4 changed files with 8 additions and 57 deletions
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@ -24,7 +24,6 @@
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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#include <asm/alternative.h>
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#include <asm/alternative.h>
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#include <asm/cpufeature.h>
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#include <asm/cpufeature.h>
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#include <asm/insn.h>
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#include <linux/stop_machine.h>
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#include <linux/stop_machine.h>
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extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
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extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
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@ -34,48 +33,6 @@ struct alt_region {
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struct alt_instr *end;
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struct alt_instr *end;
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};
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};
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/*
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* Decode the imm field of a b/bl instruction, and return the byte
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* offset as a signed value (so it can be used when computing a new
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* branch target).
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*/
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static s32 get_branch_offset(u32 insn)
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{
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s32 imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_26, insn);
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/* sign-extend the immediate before turning it into a byte offset */
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return (imm << 6) >> 4;
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}
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static u32 get_alt_insn(u8 *insnptr, u8 *altinsnptr)
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{
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u32 insn;
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aarch64_insn_read(altinsnptr, &insn);
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/* Stop the world on instructions we don't support... */
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BUG_ON(aarch64_insn_is_cbz(insn));
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BUG_ON(aarch64_insn_is_cbnz(insn));
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BUG_ON(aarch64_insn_is_bcond(insn));
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/* ... and there is probably more. */
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if (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn)) {
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enum aarch64_insn_branch_type type;
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unsigned long target;
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if (aarch64_insn_is_b(insn))
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type = AARCH64_INSN_BRANCH_NOLINK;
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else
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type = AARCH64_INSN_BRANCH_LINK;
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target = (unsigned long)altinsnptr + get_branch_offset(insn);
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insn = aarch64_insn_gen_branch_imm((unsigned long)insnptr,
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target, type);
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}
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return insn;
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}
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static int __apply_alternatives(void *alt_region)
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static int __apply_alternatives(void *alt_region)
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{
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{
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struct alt_instr *alt;
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struct alt_instr *alt;
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@ -83,9 +40,6 @@ static int __apply_alternatives(void *alt_region)
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u8 *origptr, *replptr;
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u8 *origptr, *replptr;
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for (alt = region->begin; alt < region->end; alt++) {
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for (alt = region->begin; alt < region->end; alt++) {
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u32 insn;
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int i;
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if (!cpus_have_cap(alt->cpufeature))
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if (!cpus_have_cap(alt->cpufeature))
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continue;
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continue;
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@ -95,12 +49,7 @@ static int __apply_alternatives(void *alt_region)
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origptr = (u8 *)&alt->orig_offset + alt->orig_offset;
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origptr = (u8 *)&alt->orig_offset + alt->orig_offset;
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replptr = (u8 *)&alt->alt_offset + alt->alt_offset;
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replptr = (u8 *)&alt->alt_offset + alt->alt_offset;
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memcpy(origptr, replptr, alt->alt_len);
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for (i = 0; i < alt->alt_len; i += sizeof(insn)) {
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insn = get_alt_insn(origptr + i, replptr + i);
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aarch64_insn_write(origptr + i, insn);
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}
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flush_icache_range((uintptr_t)origptr,
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flush_icache_range((uintptr_t)origptr,
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(uintptr_t)(origptr + alt->alt_len));
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(uintptr_t)(origptr + alt->alt_len));
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}
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}
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@ -1315,15 +1315,15 @@ static int armpmu_device_probe(struct platform_device *pdev)
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if (!cpu_pmu)
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if (!cpu_pmu)
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return -ENODEV;
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return -ENODEV;
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irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
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if (!irqs)
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return -ENOMEM;
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/* Don't bother with PPIs; they're already affine */
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/* Don't bother with PPIs; they're already affine */
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irq = platform_get_irq(pdev, 0);
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irq = platform_get_irq(pdev, 0);
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if (irq >= 0 && irq_is_percpu(irq))
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if (irq >= 0 && irq_is_percpu(irq))
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return 0;
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return 0;
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irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
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if (!irqs)
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return -ENOMEM;
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for (i = 0; i < pdev->num_resources; ++i) {
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for (i = 0; i < pdev->num_resources; ++i) {
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struct device_node *dn;
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struct device_node *dn;
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int cpu;
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int cpu;
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@ -328,10 +328,12 @@ static int ptdump_init(void)
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for (j = 0; j < pg_level[i].num; j++)
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for (j = 0; j < pg_level[i].num; j++)
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pg_level[i].mask |= pg_level[i].bits[j].mask;
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pg_level[i].mask |= pg_level[i].bits[j].mask;
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#ifdef CONFIG_SPARSEMEM_VMEMMAP
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address_markers[VMEMMAP_START_NR].start_address =
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address_markers[VMEMMAP_START_NR].start_address =
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(unsigned long)virt_to_page(PAGE_OFFSET);
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(unsigned long)virt_to_page(PAGE_OFFSET);
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address_markers[VMEMMAP_END_NR].start_address =
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address_markers[VMEMMAP_END_NR].start_address =
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(unsigned long)virt_to_page(high_memory);
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(unsigned long)virt_to_page(high_memory);
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#endif
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pe = debugfs_create_file("kernel_page_tables", 0400, NULL, NULL,
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pe = debugfs_create_file("kernel_page_tables", 0400, NULL, NULL,
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&ptdump_fops);
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&ptdump_fops);
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@ -487,7 +487,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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return -EINVAL;
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return -EINVAL;
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}
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}
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imm64 = (u64)insn1.imm << 32 | imm;
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imm64 = (u64)insn1.imm << 32 | (u32)imm;
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emit_a64_mov_i64(dst, imm64, ctx);
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emit_a64_mov_i64(dst, imm64, ctx);
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return 1;
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return 1;
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