net/mlx5: Parse module mapping using mlx5_ifc

The assumption that the first byte in the module mapping dword is the
module number shouldn't be hard-coded in the driver, but come from
mlx5_ifc structs.

While at it, fix the incorrect width for the 'rx_lane' and 'tx_lane'
fields.

Signed-off-by: Gal Pressman <gal@nvidia.com>
Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Gal Pressman 2022-01-17 15:53:06 +02:00 committed by Saeed Mahameed
parent 271907ee2f
commit fcb610a86c
3 changed files with 7 additions and 8 deletions

View file

@ -275,7 +275,6 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num)
{
u32 in[MLX5_ST_SZ_DW(pmlp_reg)] = {0};
u32 out[MLX5_ST_SZ_DW(pmlp_reg)];
int module_mapping;
int err;
MLX5_SET(pmlp_reg, in, local_port, 1);
@ -284,8 +283,9 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num)
if (err)
return err;
module_mapping = MLX5_GET(pmlp_reg, out, lane0_module_mapping);
*module_num = module_mapping & MLX5_EEPROM_IDENTIFIER_BYTE_MASK;
*module_num = MLX5_GET(lane_2_module_mapping,
MLX5_ADDR_OF(pmlp_reg, out, lane0_module_mapping),
module);
return 0;
}

View file

@ -9888,10 +9888,10 @@ struct mlx5_ifc_pcmr_reg_bits {
};
struct mlx5_ifc_lane_2_module_mapping_bits {
u8 reserved_at_0[0x6];
u8 rx_lane[0x2];
u8 reserved_at_8[0x6];
u8 tx_lane[0x2];
u8 reserved_at_0[0x4];
u8 rx_lane[0x4];
u8 reserved_at_8[0x4];
u8 tx_lane[0x4];
u8 reserved_at_10[0x8];
u8 module[0x8];
};

View file

@ -56,7 +56,6 @@ enum mlx5_an_status {
MLX5_AN_LINK_DOWN = 4,
};
#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff
#define MLX5_I2C_ADDR_LOW 0x50
#define MLX5_I2C_ADDR_HIGH 0x51
#define MLX5_EEPROM_PAGE_LENGTH 256