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RISC-V: Fix SBI PMU calls for RV32
commit0209b5830b
upstream. Some of the SBI PMU calls does not pass 64bit arguments correctly and not under RV32 compile time flags. Currently, this doesn't create any incorrect results as RV64 ignores any value in the additional register and qemu doesn't support raw events. Fix those SBI calls in order to set correct values for RV32. Fixes:e999143459
("RISC-V: Add perf platform driver based on SBI PMU extension") Signed-off-by: Atish Patra <atishp@rivosinc.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220711174632.4186047-4-atishp@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 10 additions and 0 deletions
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@ -274,8 +274,13 @@ static int pmu_sbi_ctr_get_idx(struct perf_event *event)
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cflags |= SBI_PMU_CFG_FLAG_SET_UINH;
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cflags |= SBI_PMU_CFG_FLAG_SET_UINH;
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/* retrieve the available counter index */
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/* retrieve the available counter index */
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#if defined(CONFIG_32BIT)
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ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase, cmask,
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cflags, hwc->event_base, hwc->config, hwc->config >> 32);
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#else
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ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase, cmask,
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ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_CFG_MATCH, cbase, cmask,
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cflags, hwc->event_base, hwc->config, 0);
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cflags, hwc->event_base, hwc->config, 0);
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#endif
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if (ret.error) {
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if (ret.error) {
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pr_debug("Not able to find a counter for event %lx config %llx\n",
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pr_debug("Not able to find a counter for event %lx config %llx\n",
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hwc->event_base, hwc->config);
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hwc->event_base, hwc->config);
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@ -417,8 +422,13 @@ static void pmu_sbi_ctr_start(struct perf_event *event, u64 ival)
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struct hw_perf_event *hwc = &event->hw;
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struct hw_perf_event *hwc = &event->hw;
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unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE;
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unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE;
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#if defined(CONFIG_32BIT)
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ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, hwc->idx,
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ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, hwc->idx,
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1, flag, ival, ival >> 32, 0);
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1, flag, ival, ival >> 32, 0);
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#else
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ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, hwc->idx,
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1, flag, ival, 0, 0);
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#endif
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if (ret.error && (ret.error != SBI_ERR_ALREADY_STARTED))
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if (ret.error && (ret.error != SBI_ERR_ALREADY_STARTED))
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pr_err("Starting counter idx %d failed with error %d\n",
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pr_err("Starting counter idx %d failed with error %d\n",
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hwc->idx, sbi_err_map_linux_errno(ret.error));
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hwc->idx, sbi_err_map_linux_errno(ret.error));
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