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PCI: MSI: Remove unsafe and unnecessary hardware access
During suspend on an SMP system, {read,write}_msi_msg_desc() may be called to mask and unmask interrupts on a device that is already in a reduced power state. At this point memory-mapped registers including MSI-X tables are not accessible, and config space may not be fully functional either. While a device is in a reduced power state its interrupts are effectively masked and its MSI(-X) state will be restored when it is brought back to D0. Therefore these functions can simply read and write msi_desc::msg for devices not in D0. Further, read_msi_msg_desc() should only ever be used to update a previously written message, so it can always read msi_desc::msg and never needs to touch the hardware. Tested-by: "Michael Chan" <mchan@broadcom.com> Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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1 changed files with 11 additions and 23 deletions
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@ -196,30 +196,15 @@ void unmask_msi_irq(unsigned int irq)
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void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
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{
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struct msi_desc *entry = get_irq_desc_msi(desc);
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if (entry->msi_attrib.is_msix) {
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void __iomem *base = entry->mask_base +
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entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
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msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
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msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
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msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
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} else {
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struct pci_dev *dev = entry->dev;
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int pos = entry->msi_attrib.pos;
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u16 data;
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/* We do not touch the hardware (which may not even be
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* accessible at the moment) but return the last message
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* written. Assert that this is valid, assuming that
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* valid messages are not all-zeroes. */
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BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
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entry->msg.data));
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pci_read_config_dword(dev, msi_lower_address_reg(pos),
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&msg->address_lo);
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if (entry->msi_attrib.is_64) {
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pci_read_config_dword(dev, msi_upper_address_reg(pos),
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&msg->address_hi);
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pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
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} else {
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msg->address_hi = 0;
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pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
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}
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msg->data = data;
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}
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*msg = entry->msg;
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}
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void read_msi_msg(unsigned int irq, struct msi_msg *msg)
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@ -232,7 +217,10 @@ void read_msi_msg(unsigned int irq, struct msi_msg *msg)
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void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
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{
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struct msi_desc *entry = get_irq_desc_msi(desc);
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if (entry->msi_attrib.is_msix) {
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if (entry->dev->current_state != PCI_D0) {
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/* Don't touch the hardware now */
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} else if (entry->msi_attrib.is_msix) {
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void __iomem *base;
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base = entry->mask_base +
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entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
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