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arm: dts: mt7623: add iommu/smi device nodes

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Add iommu/smi device nodes for MT7623.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Ryder Lee 2018-09-05 18:22:19 +08:00 committed by Matthias Brugger
parent 8ff2017b94
commit fce695cbd5
1 changed files with 59 additions and 0 deletions
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59
arch/arm/boot/dts/mt7623.dtsi
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@ -13,6 +13,7 @@
#include <dt-bindings/power/mt2701-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/memory/mt2701-larb-port.h>
#include <dt-bindings/reset/mt2701-resets.h>
#include <dt-bindings/thermal/thermal.h>
@ -286,6 +287,17 @@ timer: timer@10008000 {
clock-names = "system-clk", "rtc-clk";
};
smi_common: smi@1000c000 {
compatible = "mediatek,mt7623-smi-common",
"mediatek,mt2701-smi-common";
reg = <0 0x1000c000 0 0x1000>;
clocks = <&infracfg CLK_INFRA_SMI>,
<&mmsys CLK_MM_SMI_COMMON>,
<&infracfg CLK_INFRA_SMI>;
clock-names = "apb", "smi", "async";
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
};
pwrap: pwrap@1000d000 {
compatible = "mediatek,mt7623-pwrap",
"mediatek,mt2701-pwrap";
@ -317,6 +329,17 @@ sysirq: interrupt-controller@10200100 {
reg = <0 0x10200100 0 0x1c>;
};
iommu: mmsys_iommu@10205000 {
compatible = "mediatek,mt7623-m4u",
"mediatek,mt2701-m4u";
reg = <0 0x10205000 0 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
mediatek,larbs = <&larb0 &larb1 &larb2>;
#iommu-cells = <1>;
};
efuse: efuse@10206000 {
compatible = "mediatek,mt7623-efuse",
"mediatek,mt8173-efuse";
@ -709,6 +732,18 @@ mmsys: syscon@14000000 {
#clock-cells = <1>;
};
larb0: larb@14010000 {
compatible = "mediatek,mt7623-smi-larb",
"mediatek,mt2701-smi-larb";
reg = <0 0x14010000 0 0x1000>;
mediatek,smi = <&smi_common>;
mediatek,larb-id = <0>;
clocks = <&mmsys CLK_MM_SMI_LARB0>,
<&mmsys CLK_MM_SMI_LARB0>;
clock-names = "apb", "smi";
power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
};
imgsys: syscon@15000000 {
compatible = "mediatek,mt7623-imgsys",
"mediatek,mt2701-imgsys",
@ -717,6 +752,18 @@ imgsys: syscon@15000000 {
#clock-cells = <1>;
};
larb2: larb@15001000 {
compatible = "mediatek,mt7623-smi-larb",
"mediatek,mt2701-smi-larb";
reg = <0 0x15001000 0 0x1000>;
mediatek,smi = <&smi_common>;
mediatek,larb-id = <2>;
clocks = <&imgsys CLK_IMG_SMI_COMM>,
<&imgsys CLK_IMG_SMI_COMM>;
clock-names = "apb", "smi";
power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
};
vdecsys: syscon@16000000 {
compatible = "mediatek,mt7623-vdecsys",
"mediatek,mt2701-vdecsys",
@ -725,6 +772,18 @@ vdecsys: syscon@16000000 {
#clock-cells = <1>;
};
larb1: larb@16010000 {
compatible = "mediatek,mt7623-smi-larb",
"mediatek,mt2701-smi-larb";
reg = <0 0x16010000 0 0x1000>;
mediatek,smi = <&smi_common>;
mediatek,larb-id = <1>;
clocks = <&vdecsys CLK_VDEC_CKGEN>,
<&vdecsys CLK_VDEC_LARB>;
clock-names = "apb", "smi";
power-domains = <&scpsys MT2701_POWER_DOMAIN_VDEC>;
};
hifsys: syscon@1a000000 {
compatible = "mediatek,mt7623-hifsys",
"mediatek,mt2701-hifsys",