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i2c: designware-baytrail: Add support for cherrytrail
The cherrytrail punit has the pmic i2c bus access semaphore at a different register address. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Tested-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170210102802.20898-9-hdegoede@redhat.com
This commit is contained in:
parent
519e23a7f5
commit
fd476fa22a
4 changed files with 37 additions and 12 deletions
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@ -24,17 +24,27 @@
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#define SEMAPHORE_TIMEOUT 100
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#define PUNIT_SEMAPHORE 0x7
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#define PUNIT_SEMAPHORE_CHT 0x10e
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#define PUNIT_SEMAPHORE_BIT BIT(0)
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#define PUNIT_SEMAPHORE_ACQUIRE BIT(1)
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static unsigned long acquired;
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static u32 get_sem_addr(struct dw_i2c_dev *dev)
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{
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if (dev->flags & MODEL_CHERRYTRAIL)
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return PUNIT_SEMAPHORE_CHT;
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else
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return PUNIT_SEMAPHORE;
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}
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static int get_sem(struct dw_i2c_dev *dev, u32 *sem)
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{
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u32 addr = get_sem_addr(dev);
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u32 data;
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int ret;
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ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &data);
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ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, addr, &data);
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if (ret) {
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dev_err(dev->dev, "iosf failed to read punit semaphore\n");
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return ret;
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@ -47,7 +57,7 @@ static int get_sem(struct dw_i2c_dev *dev, u32 *sem)
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static void reset_semaphore(struct dw_i2c_dev *dev)
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{
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if (iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE,
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if (iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, get_sem_addr(dev),
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0, PUNIT_SEMAPHORE_BIT))
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dev_err(dev->dev, "iosf failed to reset punit semaphore during write\n");
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@ -56,6 +66,7 @@ static void reset_semaphore(struct dw_i2c_dev *dev)
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static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
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{
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u32 addr = get_sem_addr(dev);
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u32 sem = PUNIT_SEMAPHORE_ACQUIRE;
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int ret;
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unsigned long start, end;
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@ -76,7 +87,7 @@ static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
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pm_qos_update_request(&dev->pm_qos, 0);
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/* host driver writes to side band semaphore register */
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ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, PUNIT_SEMAPHORE, sem);
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ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, addr, sem);
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if (ret) {
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dev_err(dev->dev, "iosf punit semaphore request failed\n");
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goto out;
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@ -101,7 +112,7 @@ static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
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out:
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reset_semaphore(dev);
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ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, PUNIT_SEMAPHORE, &sem);
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ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, addr, &sem);
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if (ret)
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dev_err(dev->dev, "iosf failed to read punit semaphore\n");
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else
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@ -135,6 +135,8 @@ struct dw_i2c_dev {
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#define ACCESS_16BIT 0x00000002
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#define ACCESS_INTR_MASK 0x00000004
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#define MODEL_CHERRYTRAIL 0x00000100
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extern int i2c_dw_init(struct dw_i2c_dev *dev);
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extern void i2c_dw_disable(struct dw_i2c_dev *dev);
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extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
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@ -45,6 +45,7 @@ enum dw_pci_ctl_id_t {
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medfield,
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merrifield,
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baytrail,
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cherrytrail,
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haswell,
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};
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@ -63,6 +64,7 @@ struct dw_pci_controller {
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u32 rx_fifo_depth;
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u32 clk_khz;
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u32 functionality;
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u32 flags;
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struct dw_scl_sda_cfg *scl_sda_cfg;
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int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
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};
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@ -170,6 +172,15 @@ static struct dw_pci_controller dw_pci_controllers[] = {
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.functionality = I2C_FUNC_10BIT_ADDR,
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.scl_sda_cfg = &hsw_config,
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},
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[cherrytrail] = {
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.bus_num = -1,
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.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
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.tx_fifo_depth = 32,
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.rx_fifo_depth = 32,
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.functionality = I2C_FUNC_10BIT_ADDR,
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.flags = MODEL_CHERRYTRAIL,
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.scl_sda_cfg = &byt_config,
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},
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};
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#ifdef CONFIG_PM
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@ -237,6 +248,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
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dev->base = pcim_iomap_table(pdev)[0];
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dev->dev = &pdev->dev;
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dev->irq = pdev->irq;
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dev->flags |= controller->flags;
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if (controller->setup) {
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r = controller->setup(pdev, controller);
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@ -317,13 +329,13 @@ static const struct pci_device_id i2_designware_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x9c61), haswell },
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{ PCI_VDEVICE(INTEL, 0x9c62), haswell },
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/* Braswell / Cherrytrail */
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{ PCI_VDEVICE(INTEL, 0x22C1), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C2), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C3), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C4), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C5), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C6), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C7), baytrail },
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{ PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
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{ 0,}
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};
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MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
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@ -123,7 +123,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = {
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{ "INT3432", 0 },
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{ "INT3433", 0 },
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{ "80860F41", 0 },
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{ "808622C1", 0 },
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{ "808622C1", MODEL_CHERRYTRAIL },
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{ "AMD0010", ACCESS_INTR_MASK },
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{ "AMDI0010", ACCESS_INTR_MASK },
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{ "AMDI0510", 0 },
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