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drm/i915: Extract intel_modeset_calc_cdclk()
Exfiltrate the cdclk code from intel_modeset_checks() into intel_modeset_calc_cdclk(). Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190913193157.9556-4-ville.syrjala@linux.intel.com
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76c36a4391
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3 changed files with 135 additions and 129 deletions
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@ -21,6 +21,7 @@
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "intel_atomic.h"
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#include "intel_cdclk.h"
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#include "intel_display_types.h"
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#include "intel_sideband.h"
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@ -1772,9 +1773,9 @@ bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,
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* Returns:
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* True if the CDCLK states require just a cd2x divider update, false if not.
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*/
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bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,
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const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b)
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static bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,
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const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b)
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{
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/* Older hw doesn't have the capability */
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if (INTEL_GEN(dev_priv) < 10 && !IS_GEN9_LP(dev_priv))
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@ -1793,8 +1794,8 @@ bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,
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* Returns:
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* True if the CDCLK states don't match, false if they do.
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*/
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bool intel_cdclk_changed(const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b)
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static bool intel_cdclk_changed(const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b)
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{
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return intel_cdclk_needs_modeset(a, b) ||
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a->voltage_level != b->voltage_level;
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@ -2220,6 +2221,130 @@ static int bxt_modeset_calc_cdclk(struct intel_atomic_state *state)
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return 0;
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}
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static int intel_lock_all_pipes(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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struct intel_crtc *crtc;
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/* Add all pipes to the state */
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for_each_intel_crtc(&dev_priv->drm, crtc) {
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struct intel_crtc_state *crtc_state;
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crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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}
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return 0;
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}
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static int intel_modeset_all_pipes(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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struct intel_crtc *crtc;
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/*
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* Add all pipes to the state, and force
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* a modeset on all the active ones.
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*/
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for_each_intel_crtc(&dev_priv->drm, crtc) {
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struct intel_crtc_state *crtc_state;
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int ret;
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crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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if (!crtc_state->base.active ||
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drm_atomic_crtc_needs_modeset(&crtc_state->base))
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continue;
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crtc_state->base.mode_changed = true;
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ret = drm_atomic_add_affected_connectors(&state->base,
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&crtc->base);
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if (ret)
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return ret;
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ret = drm_atomic_add_affected_planes(&state->base,
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&crtc->base);
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if (ret)
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return ret;
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crtc_state->update_planes |= crtc_state->active_planes;
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}
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return 0;
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}
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int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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enum pipe pipe;
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int ret;
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if (!dev_priv->display.modeset_calc_cdclk)
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return 0;
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ret = dev_priv->display.modeset_calc_cdclk(state);
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if (ret)
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return ret;
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/*
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* Writes to dev_priv->cdclk.logical must protected by
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* holding all the crtc locks, even if we don't end up
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* touching the hardware
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*/
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if (intel_cdclk_changed(&dev_priv->cdclk.logical,
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&state->cdclk.logical)) {
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ret = intel_lock_all_pipes(state);
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if (ret < 0)
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return ret;
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}
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if (is_power_of_2(state->active_pipes)) {
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struct intel_crtc *crtc;
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struct intel_crtc_state *crtc_state;
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pipe = ilog2(state->active_pipes);
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crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
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crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
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if (crtc_state &&
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drm_atomic_crtc_needs_modeset(&crtc_state->base))
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pipe = INVALID_PIPE;
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} else {
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pipe = INVALID_PIPE;
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}
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/* All pipes must be switched off while we change the cdclk. */
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if (pipe != INVALID_PIPE &&
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intel_cdclk_needs_cd2x_update(dev_priv,
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&dev_priv->cdclk.actual,
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&state->cdclk.actual)) {
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ret = intel_lock_all_pipes(state);
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if (ret)
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return ret;
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state->cdclk.pipe = pipe;
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} else if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual,
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&state->cdclk.actual)) {
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ret = intel_modeset_all_pipes(state);
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if (ret)
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return ret;
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state->cdclk.pipe = INVALID_PIPE;
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}
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DRM_DEBUG_KMS("New cdclk calculated to be logical %u kHz, actual %u kHz\n",
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state->cdclk.logical.cdclk,
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state->cdclk.actual.cdclk);
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DRM_DEBUG_KMS("New voltage level calculated to be logical %u, actual %u\n",
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state->cdclk.logical.voltage_level,
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state->cdclk.actual.voltage_level);
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return 0;
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}
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static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)
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{
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int max_cdclk_freq = dev_priv->max_cdclk_freq;
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@ -29,13 +29,8 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv);
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void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
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void intel_update_cdclk(struct drm_i915_private *dev_priv);
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void intel_update_rawclk(struct drm_i915_private *dev_priv);
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bool intel_cdclk_needs_cd2x_update(struct drm_i915_private *dev_priv,
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const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b);
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bool intel_cdclk_needs_modeset(const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b);
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bool intel_cdclk_changed(const struct intel_cdclk_state *a,
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const struct intel_cdclk_state *b);
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void intel_cdclk_swap_state(struct intel_atomic_state *state);
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void
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intel_set_cdclk_pre_plane_update(struct drm_i915_private *dev_priv,
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@ -49,5 +44,6 @@ intel_set_cdclk_post_plane_update(struct drm_i915_private *dev_priv,
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enum pipe pipe);
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void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
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const char *context);
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int intel_modeset_calc_cdclk(struct intel_atomic_state *state);
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#endif /* __INTEL_CDCLK_H__ */
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@ -13433,65 +13433,12 @@ static int haswell_mode_set_planes_workaround(struct intel_atomic_state *state)
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return 0;
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}
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static int intel_lock_all_pipes(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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struct intel_crtc *crtc;
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/* Add all pipes to the state */
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for_each_intel_crtc(&dev_priv->drm, crtc) {
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struct intel_crtc_state *crtc_state;
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crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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}
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return 0;
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}
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static int intel_modeset_all_pipes(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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struct intel_crtc *crtc;
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/*
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* Add all pipes to the state, and force
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* a modeset on all the active ones.
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*/
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for_each_intel_crtc(&dev_priv->drm, crtc) {
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struct intel_crtc_state *crtc_state;
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int ret;
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crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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if (!crtc_state->base.active || needs_modeset(crtc_state))
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continue;
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crtc_state->base.mode_changed = true;
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ret = drm_atomic_add_affected_connectors(&state->base,
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&crtc->base);
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if (ret)
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return ret;
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ret = drm_atomic_add_affected_planes(&state->base,
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&crtc->base);
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if (ret)
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return ret;
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}
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return 0;
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}
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static int intel_modeset_checks(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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struct intel_crtc_state *old_crtc_state, *new_crtc_state;
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struct intel_crtc *crtc;
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int ret = 0, i;
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int ret, i;
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if (!check_digital_port_conflicts(state)) {
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DRM_DEBUG_KMS("rejecting conflicting digital port configuration\n");
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@ -13519,71 +13466,9 @@ static int intel_modeset_checks(struct intel_atomic_state *state)
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state->active_pipe_changes |= BIT(crtc->pipe);
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}
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/*
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* See if the config requires any additional preparation, e.g.
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* to adjust global state with pipes off. We need to do this
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* here so we can get the modeset_pipe updated config for the new
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* mode set on this crtc. For other crtcs we need to use the
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* adjusted_mode bits in the crtc directly.
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*/
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if (dev_priv->display.modeset_calc_cdclk) {
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enum pipe pipe;
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ret = dev_priv->display.modeset_calc_cdclk(state);
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if (ret < 0)
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return ret;
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/*
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* Writes to dev_priv->cdclk.logical must protected by
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* holding all the crtc locks, even if we don't end up
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* touching the hardware
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*/
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if (intel_cdclk_changed(&dev_priv->cdclk.logical,
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&state->cdclk.logical)) {
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ret = intel_lock_all_pipes(state);
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if (ret < 0)
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return ret;
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}
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if (is_power_of_2(state->active_pipes)) {
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struct intel_crtc *crtc;
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struct intel_crtc_state *crtc_state;
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pipe = ilog2(state->active_pipes);
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crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
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crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
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if (crtc_state && needs_modeset(crtc_state))
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pipe = INVALID_PIPE;
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} else {
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pipe = INVALID_PIPE;
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}
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/* All pipes must be switched off while we change the cdclk. */
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if (pipe != INVALID_PIPE &&
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intel_cdclk_needs_cd2x_update(dev_priv,
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&dev_priv->cdclk.actual,
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&state->cdclk.actual)) {
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ret = intel_lock_all_pipes(state);
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if (ret < 0)
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return ret;
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state->cdclk.pipe = pipe;
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} else if (intel_cdclk_needs_modeset(&dev_priv->cdclk.actual,
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&state->cdclk.actual)) {
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ret = intel_modeset_all_pipes(state);
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if (ret < 0)
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return ret;
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state->cdclk.pipe = INVALID_PIPE;
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}
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DRM_DEBUG_KMS("New cdclk calculated to be logical %u kHz, actual %u kHz\n",
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state->cdclk.logical.cdclk,
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state->cdclk.actual.cdclk);
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DRM_DEBUG_KMS("New voltage level calculated to be logical %u, actual %u\n",
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state->cdclk.logical.voltage_level,
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state->cdclk.actual.voltage_level);
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}
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ret = intel_modeset_calc_cdclk(state);
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if (ret)
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return ret;
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intel_modeset_clear_plls(state);
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