arm64: dts: qcom: sm6375: Add ADSP&CDSP
Add ADSP & CDSP remote processors. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221114105913.37044-3-konrad.dybcio@linaro.org
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@ -1155,6 +1155,79 @@
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};
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};
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remoteproc_adsp: remoteproc@a400000 {
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compatible = "qcom,sm6375-adsp-pas";
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reg = <0 0x0a400000 0 0x100>;
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interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
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<&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack";
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "xo";
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power-domains = <&rpmpd SM6375_VDD_LPI_CX>,
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<&rpmpd SM6375_VDD_LPI_MX>;
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power-domain-names = "lcx", "lmx";
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memory-region = <&pil_adsp_mem>;
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qcom,smem-states = <&smp2p_adsp_out 0>;
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qcom,smem-state-names = "stop";
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status = "disabled";
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glink-edge {
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interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_GLINK_QMP>;
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label = "lpass";
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qcom,remote-pid = <2>;
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};
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};
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remoteproc_cdsp: remoteproc@b000000 {
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compatible = "qcom,sm6375-cdsp-pas";
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reg = <0x0 0x0b000000 0x0 0x100000>;
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interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 0 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 2 IRQ_TYPE_EDGE_RISING>,
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<&smp2p_cdsp_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack";
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "xo";
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power-domains = <&rpmpd SM6375_VDDCX>;
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memory-region = <&pil_cdsp_mem>;
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qcom,smem-states = <&smp2p_cdsp_out 0>;
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qcom,smem-state-names = "stop";
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status = "disabled";
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glink-edge {
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interrupts-extended = <&ipcc IPCC_CLIENT_CDSP
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_CDSP
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IPCC_MPROC_SIGNAL_GLINK_QMP>;
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label = "cdsp";
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qcom,remote-pid = <5>;
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};
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};
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apps_smmu: iommu@c600000 {
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compatible = "qcom,sm6375-smmu-500", "arm,mmu-500";
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reg = <0 0x0c600000 0 0x100000>;
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