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chelsio: cxgb: Replace the workqueue with threaded interrupt
The external interrupt (F_PL_INTR_EXT) needs to be handled in a process context and this is accomplished by utilizing a workqueue. The process context can also be provided by a threaded interrupt instead of a workqueue. The threaded interrupt can be used later for other interrupt related processing which require non-atomic context without using yet another workqueue. free_irq() also ensures that the thread is done which is currently missing (the worker could continue after the module has been removed). Save pending flags in pending_thread_intr. Use the same mechanism to disable F_PL_INTR_EXT as interrupt source like it is used before the worker is scheduled. Enable the interrupt again once t1_elmer0_ext_intr_handler() is done. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
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462e99a18b
commit
fec7fa0a75
5 changed files with 55 additions and 54 deletions
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@ -238,7 +238,6 @@ struct adapter {
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int msg_enable;
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int msg_enable;
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u32 mmio_len;
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u32 mmio_len;
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struct work_struct ext_intr_handler_task;
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struct adapter_params params;
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struct adapter_params params;
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/* Terminator modules. */
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/* Terminator modules. */
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@ -257,6 +256,7 @@ struct adapter {
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/* guards async operations */
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/* guards async operations */
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spinlock_t async_lock ____cacheline_aligned;
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spinlock_t async_lock ____cacheline_aligned;
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u32 pending_thread_intr;
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u32 slow_intr_mask;
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u32 slow_intr_mask;
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int t1powersave;
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int t1powersave;
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};
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};
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@ -334,8 +334,7 @@ void t1_interrupts_enable(adapter_t *adapter);
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void t1_interrupts_disable(adapter_t *adapter);
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void t1_interrupts_disable(adapter_t *adapter);
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void t1_interrupts_clear(adapter_t *adapter);
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void t1_interrupts_clear(adapter_t *adapter);
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int t1_elmer0_ext_intr_handler(adapter_t *adapter);
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int t1_elmer0_ext_intr_handler(adapter_t *adapter);
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void t1_elmer0_ext_intr(adapter_t *adapter);
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irqreturn_t t1_slow_intr_handler(adapter_t *adapter);
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int t1_slow_intr_handler(adapter_t *adapter);
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int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
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int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
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const struct board_info *t1_get_board_info(unsigned int board_id);
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const struct board_info *t1_get_board_info(unsigned int board_id);
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@ -211,9 +211,10 @@ static int cxgb_up(struct adapter *adapter)
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t1_interrupts_clear(adapter);
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t1_interrupts_clear(adapter);
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adapter->params.has_msi = !disable_msi && !pci_enable_msi(adapter->pdev);
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adapter->params.has_msi = !disable_msi && !pci_enable_msi(adapter->pdev);
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err = request_irq(adapter->pdev->irq, t1_interrupt,
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err = request_threaded_irq(adapter->pdev->irq, t1_interrupt,
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adapter->params.has_msi ? 0 : IRQF_SHARED,
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t1_interrupt_thread,
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adapter->name, adapter);
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adapter->params.has_msi ? 0 : IRQF_SHARED,
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adapter->name, adapter);
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if (err) {
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if (err) {
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if (adapter->params.has_msi)
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if (adapter->params.has_msi)
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pci_disable_msi(adapter->pdev);
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pci_disable_msi(adapter->pdev);
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@ -916,41 +917,6 @@ static void mac_stats_task(struct work_struct *work)
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spin_unlock(&adapter->work_lock);
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spin_unlock(&adapter->work_lock);
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}
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}
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/*
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* Processes elmer0 external interrupts in process context.
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*/
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static void ext_intr_task(struct work_struct *work)
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{
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struct adapter *adapter =
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container_of(work, struct adapter, ext_intr_handler_task);
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t1_elmer0_ext_intr_handler(adapter);
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/* Now reenable external interrupts */
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spin_lock_irq(&adapter->async_lock);
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adapter->slow_intr_mask |= F_PL_INTR_EXT;
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writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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spin_unlock_irq(&adapter->async_lock);
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}
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/*
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* Interrupt-context handler for elmer0 external interrupts.
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*/
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void t1_elmer0_ext_intr(struct adapter *adapter)
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{
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/*
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* Schedule a task to handle external interrupts as we require
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* a process context. We disable EXT interrupts in the interim
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* and let the task reenable them when it's done.
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*/
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adapter->slow_intr_mask &= ~F_PL_INTR_EXT;
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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schedule_work(&adapter->ext_intr_handler_task);
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}
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void t1_fatal_err(struct adapter *adapter)
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void t1_fatal_err(struct adapter *adapter)
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{
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{
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if (adapter->flags & FULL_INIT_DONE) {
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if (adapter->flags & FULL_INIT_DONE) {
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@ -1062,8 +1028,6 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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spin_lock_init(&adapter->async_lock);
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spin_lock_init(&adapter->async_lock);
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spin_lock_init(&adapter->mac_lock);
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spin_lock_init(&adapter->mac_lock);
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INIT_WORK(&adapter->ext_intr_handler_task,
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ext_intr_task);
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INIT_DELAYED_WORK(&adapter->stats_update_task,
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INIT_DELAYED_WORK(&adapter->stats_update_task,
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mac_stats_task);
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mac_stats_task);
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@ -1619,11 +1619,38 @@ int t1_poll(struct napi_struct *napi, int budget)
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return work_done;
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return work_done;
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}
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}
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irqreturn_t t1_interrupt_thread(int irq, void *data)
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{
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struct adapter *adapter = data;
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u32 pending_thread_intr;
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spin_lock_irq(&adapter->async_lock);
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pending_thread_intr = adapter->pending_thread_intr;
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adapter->pending_thread_intr = 0;
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spin_unlock_irq(&adapter->async_lock);
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if (!pending_thread_intr)
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return IRQ_NONE;
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if (pending_thread_intr & F_PL_INTR_EXT)
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t1_elmer0_ext_intr_handler(adapter);
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spin_lock_irq(&adapter->async_lock);
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adapter->slow_intr_mask |= F_PL_INTR_EXT;
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writel(F_PL_INTR_EXT, adapter->regs + A_PL_CAUSE);
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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spin_unlock_irq(&adapter->async_lock);
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return IRQ_HANDLED;
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}
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irqreturn_t t1_interrupt(int irq, void *data)
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irqreturn_t t1_interrupt(int irq, void *data)
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{
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{
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struct adapter *adapter = data;
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struct adapter *adapter = data;
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struct sge *sge = adapter->sge;
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struct sge *sge = adapter->sge;
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int handled;
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irqreturn_t handled;
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if (likely(responses_pending(adapter))) {
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if (likely(responses_pending(adapter))) {
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writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
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writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE);
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@ -1645,10 +1672,10 @@ irqreturn_t t1_interrupt(int irq, void *data)
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handled = t1_slow_intr_handler(adapter);
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handled = t1_slow_intr_handler(adapter);
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spin_unlock(&adapter->async_lock);
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spin_unlock(&adapter->async_lock);
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if (!handled)
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if (handled == IRQ_NONE)
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sge->stats.unhandled_irqs++;
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sge->stats.unhandled_irqs++;
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return IRQ_RETVAL(handled != 0);
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return handled;
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}
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}
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/*
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/*
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@ -74,6 +74,7 @@ struct sge *t1_sge_create(struct adapter *, struct sge_params *);
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int t1_sge_configure(struct sge *, struct sge_params *);
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int t1_sge_configure(struct sge *, struct sge_params *);
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int t1_sge_set_coalesce_params(struct sge *, struct sge_params *);
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int t1_sge_set_coalesce_params(struct sge *, struct sge_params *);
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void t1_sge_destroy(struct sge *);
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void t1_sge_destroy(struct sge *);
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irqreturn_t t1_interrupt_thread(int irq, void *data);
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irqreturn_t t1_interrupt(int irq, void *cookie);
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irqreturn_t t1_interrupt(int irq, void *cookie);
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int t1_poll(struct napi_struct *, int);
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int t1_poll(struct napi_struct *, int);
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@ -210,7 +210,7 @@ static int fpga_phy_intr_handler(adapter_t *adapter)
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/*
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/*
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* Slow path interrupt handler for FPGAs.
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* Slow path interrupt handler for FPGAs.
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*/
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*/
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static int fpga_slow_intr(adapter_t *adapter)
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static irqreturn_t fpga_slow_intr(adapter_t *adapter)
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{
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{
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u32 cause = readl(adapter->regs + A_PL_CAUSE);
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u32 cause = readl(adapter->regs + A_PL_CAUSE);
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@ -238,7 +238,7 @@ static int fpga_slow_intr(adapter_t *adapter)
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if (cause)
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if (cause)
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writel(cause, adapter->regs + A_PL_CAUSE);
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writel(cause, adapter->regs + A_PL_CAUSE);
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return cause != 0;
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return cause == 0 ? IRQ_NONE : IRQ_HANDLED;
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}
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}
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#endif
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#endif
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@ -842,13 +842,14 @@ void t1_interrupts_clear(adapter_t* adapter)
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/*
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/*
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* Slow path interrupt handler for ASICs.
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* Slow path interrupt handler for ASICs.
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*/
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*/
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static int asic_slow_intr(adapter_t *adapter)
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static irqreturn_t asic_slow_intr(adapter_t *adapter)
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{
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{
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u32 cause = readl(adapter->regs + A_PL_CAUSE);
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u32 cause = readl(adapter->regs + A_PL_CAUSE);
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irqreturn_t ret = IRQ_HANDLED;
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cause &= adapter->slow_intr_mask;
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cause &= adapter->slow_intr_mask;
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if (!cause)
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if (!cause)
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return 0;
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return IRQ_NONE;
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if (cause & F_PL_INTR_SGE_ERR)
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if (cause & F_PL_INTR_SGE_ERR)
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t1_sge_intr_error_handler(adapter->sge);
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t1_sge_intr_error_handler(adapter->sge);
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if (cause & F_PL_INTR_TP)
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if (cause & F_PL_INTR_TP)
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@ -857,16 +858,25 @@ static int asic_slow_intr(adapter_t *adapter)
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t1_espi_intr_handler(adapter->espi);
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t1_espi_intr_handler(adapter->espi);
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if (cause & F_PL_INTR_PCIX)
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if (cause & F_PL_INTR_PCIX)
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t1_pci_intr_handler(adapter);
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t1_pci_intr_handler(adapter);
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if (cause & F_PL_INTR_EXT)
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if (cause & F_PL_INTR_EXT) {
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t1_elmer0_ext_intr(adapter);
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/* Wake the threaded interrupt to handle external interrupts as
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* we require a process context. We disable EXT interrupts in
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* the interim and let the thread reenable them when it's done.
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*/
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adapter->pending_thread_intr |= F_PL_INTR_EXT;
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adapter->slow_intr_mask &= ~F_PL_INTR_EXT;
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writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA,
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adapter->regs + A_PL_ENABLE);
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ret = IRQ_WAKE_THREAD;
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}
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/* Clear the interrupts just processed. */
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/* Clear the interrupts just processed. */
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writel(cause, adapter->regs + A_PL_CAUSE);
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writel(cause, adapter->regs + A_PL_CAUSE);
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readl(adapter->regs + A_PL_CAUSE); /* flush writes */
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readl(adapter->regs + A_PL_CAUSE); /* flush writes */
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return 1;
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return ret;
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}
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}
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int t1_slow_intr_handler(adapter_t *adapter)
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irqreturn_t t1_slow_intr_handler(adapter_t *adapter)
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{
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{
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#ifdef CONFIG_CHELSIO_T1_1G
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#ifdef CONFIG_CHELSIO_T1_1G
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if (!t1_is_asic(adapter))
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if (!t1_is_asic(adapter))
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