mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-28 13:22:57 +00:00
Code Issues Releases Wiki Activity

x86/mce/amd, EDAC/mce_amd: Move long names to decoder module

Browse source 
The long names of the SMCA banks are only used by the MCE decoder
module.

Move them out of the arch code and into the decoder module.

  [ bp: Name the long names array "smca_long_names", drop local ptr in
    decode_smca_error(), constify arrays. ]

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231118193248.1296798-5-yazen.ghannam@amd.com
This commit is contained in:
Yazen Ghannam 2023-11-18 13:32:32 -06:00 committed by Borislav Petkov (AMD)
parent 6175b40775
commit ff03ff328f
3 changed files with 72 additions and 49 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
arch/x86/include/asm/mce.h
View file

@ -333,7 +333,6 @@ enum smca_bank_types {
N_SMCA_BANK_TYPES
};
extern const char *smca_get_long_name(enum smca_bank_types t);
extern bool amd_mce_is_memory_error(struct mce *m);
extern int mce_threshold_create_device(unsigned int cpu);

74
arch/x86/kernel/cpu/mce/amd.c
View file

@ -87,42 +87,37 @@ struct smca_bank {
static DEFINE_PER_CPU_READ_MOSTLY(struct smca_bank[MAX_NR_BANKS], smca_banks);
static DEFINE_PER_CPU_READ_MOSTLY(u8[N_SMCA_BANK_TYPES], smca_bank_counts);
struct smca_bank_name {
const char *name; /* Short name for sysfs */
const char *long_name; /* Long name for pretty-printing */
};
static struct smca_bank_name smca_names[] = {
[SMCA_LS ... SMCA_LS_V2] = { "load_store", "Load Store Unit" },
[SMCA_IF] = { "insn_fetch", "Instruction Fetch Unit" },
[SMCA_L2_CACHE] = { "l2_cache", "L2 Cache" },
[SMCA_DE] = { "decode_unit", "Decode Unit" },
[SMCA_RESERVED] = { "reserved", "Reserved" },
[SMCA_EX] = { "execution_unit", "Execution Unit" },
[SMCA_FP] = { "floating_point", "Floating Point Unit" },
[SMCA_L3_CACHE] = { "l3_cache", "L3 Cache" },
[SMCA_CS ... SMCA_CS_V2] = { "coherent_slave", "Coherent Slave" },
[SMCA_PIE] = { "pie", "Power, Interrupts, etc." },
static const char * const smca_names[] = {
[SMCA_LS ... SMCA_LS_V2] = "load_store",
[SMCA_IF] = "insn_fetch",
[SMCA_L2_CACHE] = "l2_cache",
[SMCA_DE] = "decode_unit",
[SMCA_RESERVED] = "reserved",
[SMCA_EX] = "execution_unit",
[SMCA_FP] = "floating_point",
[SMCA_L3_CACHE] = "l3_cache",
[SMCA_CS ... SMCA_CS_V2] = "coherent_slave",
[SMCA_PIE] = "pie",
/* UMC v2 is separate because both of them can exist in a single system. */
[SMCA_UMC] = { "umc", "Unified Memory Controller" },
[SMCA_UMC_V2] = { "umc_v2", "Unified Memory Controller v2" },
[SMCA_PB] = { "param_block", "Parameter Block" },
[SMCA_PSP ... SMCA_PSP_V2] = { "psp", "Platform Security Processor" },
[SMCA_SMU ... SMCA_SMU_V2] = { "smu", "System Management Unit" },
[SMCA_MP5] = { "mp5", "Microprocessor 5 Unit" },
[SMCA_MPDMA] = { "mpdma", "MPDMA Unit" },
[SMCA_NBIO] = { "nbio", "Northbridge IO Unit" },
[SMCA_PCIE ... SMCA_PCIE_V2] = { "pcie", "PCI Express Unit" },
[SMCA_XGMI_PCS] = { "xgmi_pcs", "Ext Global Memory Interconnect PCS Unit" },
[SMCA_NBIF] = { "nbif", "NBIF Unit" },
[SMCA_SHUB] = { "shub", "System Hub Unit" },
[SMCA_SATA] = { "sata", "SATA Unit" },
[SMCA_USB] = { "usb", "USB Unit" },
[SMCA_GMI_PCS] = { "gmi_pcs", "Global Memory Interconnect PCS Unit" },
[SMCA_XGMI_PHY] = { "xgmi_phy", "Ext Global Memory Interconnect PHY Unit" },
[SMCA_WAFL_PHY] = { "wafl_phy", "WAFL PHY Unit" },
[SMCA_GMI_PHY] = { "gmi_phy", "Global Memory Interconnect PHY Unit" },
[SMCA_UMC] = "umc",
[SMCA_UMC_V2] = "umc_v2",
[SMCA_PB] = "param_block",
[SMCA_PSP ... SMCA_PSP_V2] = "psp",
[SMCA_SMU ... SMCA_SMU_V2] = "smu",
[SMCA_MP5] = "mp5",
[SMCA_MPDMA] = "mpdma",
[SMCA_NBIO] = "nbio",
[SMCA_PCIE ... SMCA_PCIE_V2] = "pcie",
[SMCA_XGMI_PCS] = "xgmi_pcs",
[SMCA_NBIF] = "nbif",
[SMCA_SHUB] = "shub",
[SMCA_SATA] = "sata",
[SMCA_USB] = "usb",
[SMCA_GMI_PCS] = "gmi_pcs",
[SMCA_XGMI_PHY] = "xgmi_phy",
[SMCA_WAFL_PHY] = "wafl_phy",
[SMCA_GMI_PHY] = "gmi_phy",
};
static const char *smca_get_name(enum smca_bank_types t)
@ -130,18 +125,9 @@ static const char *smca_get_name(enum smca_bank_types t)
if (t >= N_SMCA_BANK_TYPES)
return NULL;
return smca_names[t].name;
return smca_names[t];
}
const char *smca_get_long_name(enum smca_bank_types t)
{
if (t >= N_SMCA_BANK_TYPES)
return NULL;
return smca_names[t].long_name;
}
EXPORT_SYMBOL_GPL(smca_get_long_name);
enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank)
{
struct smca_bank *b;

46
drivers/edac/mce_amd.c
View file

@ -1163,11 +1163,51 @@ static void decode_mc6_mce(struct mce *m)
pr_emerg(HW_ERR "Corrupted MC6 MCE info?\n");
}
static const char * const smca_long_names[] = {
[SMCA_LS ... SMCA_LS_V2] = "Load Store Unit",
[SMCA_IF] = "Instruction Fetch Unit",
[SMCA_L2_CACHE] = "L2 Cache",
[SMCA_DE] = "Decode Unit",
[SMCA_RESERVED] = "Reserved",
[SMCA_EX] = "Execution Unit",
[SMCA_FP] = "Floating Point Unit",
[SMCA_L3_CACHE] = "L3 Cache",
[SMCA_CS ... SMCA_CS_V2] = "Coherent Slave",
[SMCA_PIE] = "Power, Interrupts, etc.",
/* UMC v2 is separate because both of them can exist in a single system. */
[SMCA_UMC] = "Unified Memory Controller",
[SMCA_UMC_V2] = "Unified Memory Controller v2",
[SMCA_PB] = "Parameter Block",
[SMCA_PSP ... SMCA_PSP_V2] = "Platform Security Processor",
[SMCA_SMU ... SMCA_SMU_V2] = "System Management Unit",
[SMCA_MP5] = "Microprocessor 5 Unit",
[SMCA_MPDMA] = "MPDMA Unit",
[SMCA_NBIO] = "Northbridge IO Unit",
[SMCA_PCIE ... SMCA_PCIE_V2] = "PCI Express Unit",
[SMCA_XGMI_PCS] = "Ext Global Memory Interconnect PCS Unit",
[SMCA_NBIF] = "NBIF Unit",
[SMCA_SHUB] = "System Hub Unit",
[SMCA_SATA] = "SATA Unit",
[SMCA_USB] = "USB Unit",
[SMCA_GMI_PCS] = "Global Memory Interconnect PCS Unit",
[SMCA_XGMI_PHY] = "Ext Global Memory Interconnect PHY Unit",
[SMCA_WAFL_PHY] = "WAFL PHY Unit",
[SMCA_GMI_PHY] = "Global Memory Interconnect PHY Unit",
};
static const char *smca_get_long_name(enum smca_bank_types t)
{
if (t >= N_SMCA_BANK_TYPES)
return NULL;
return smca_long_names[t];
}
/* Decode errors according to Scalable MCA specification */
static void decode_smca_error(struct mce *m)
{
enum smca_bank_types bank_type = smca_get_bank_type(m->extcpu, m->bank);
const char *ip_name;
u8 xec = XEC(m->status, xec_mask);
if (bank_type >= N_SMCA_BANK_TYPES)
@ -1178,9 +1218,7 @@ static void decode_smca_error(struct mce *m)
return;
}
ip_name = smca_get_long_name(bank_type);
pr_emerg(HW_ERR "%s Ext. Error Code: %d", ip_name, xec);
pr_emerg(HW_ERR "%s Ext. Error Code: %d", smca_get_long_name(bank_type), xec);
/* Only print the decode of valid error codes */
if (xec < smca_mce_descs[bank_type].num_descs)