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281 commits
Author | SHA1 | Message | Date | |
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Linus Torvalds
|
50d602d81f |
- qcom: add support for MSM8976
- mtk: enable mt8186 add ADSP controller driver - ti: use poll mode during suspend - tegra: fix tx channel flush - imx: add i.MX8 SECO MU support prepare for, and add iMX93 support -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6EwehDt/SOnwFyTyf9lkf8eYP5UFAmItTzIACgkQf9lkf8eY P5WZdw/9HsyFdS3n478i0Iut8TgRgke88/ZrhiWekSNJfSrGmKiMbSn1QdDLpqMV A113m4rnduz4n4upe+SxWzBA76BbKePUpjW+Fsvu3OtxZ/6LwNmkKsa7z91+CF7n RQh+JXmmiO0rLwl10zIsYSXr3zjSz85mKNJUZFtdNFqaj0RZhJPWSVm2OUz36ONk WviDiDeWJuqJBtfRXIbqkqGv1YbWHa4CwsxYBA8R91OQOrb9Wd9A7roeUJjR2yvH PISGcGycMnDrfowNU3IU1rTVzNq/ojeNX3EfhR489MiKoLVvv5+O8Thr5UODf7TW ZtbdVANCywGO0KVpgbQb60TCJi1mzjmyw0UietDw/zz7d8TNKc3CbyR5I3CRMqSU epxpjpywAppdd3AZAKe/x44ctlefiSnzzCFqq3eNk2HnQr+p/mKnFW+JwnN8qEVK hTAq7L7kkBqQbWRdwPAkE4nAjT2PhdLL0CegOjygP2WBAVU43QdeDoutZMJFeBNZ AJUMGLSzbxDNM4Nxaq2xUbn6Sm7MoPRFPrUDIkuW+NFH7XqAYetTIgiNvhv/qGMS Qpwn0ZVEZAxEj+wQKBUID84zj2FTCgcCMqkm8PADahjDzjCDEPKOMmTYxiqjSwXa VM7Np5+cCSYIVyz6/uYQ3AYcBgfxt0M+rB4qGGEgBFGLT/SEFcQ= =mmKG -----END PGP SIGNATURE----- Merge tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: "qcom: - add support for MSM8976 mtk: - enable mt8186 - add ADSP controller driver ti: - use poll mode during suspend tegra: - fix tx channel flush imx: - add i.MX8 SECO MU support - prepare for, and add iMX93 support" * tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: add definition for mt8186 mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend mailbox: ti-msgmgr: Refactor message read during interrupt handler mailbox: imx: support i.MX93 S401 MU mailbox: imx: support dual interrupts mailbox: imx: extend irq to an array dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support dt-bindings: mailbox: imx-mu: add i.MX93 MU mailbox: imx: add i.MX8 SECO MU support mailbox: imx: introduce rxdb callback dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support mailbox: imx: enlarge timeout while reading/writing messages to SCFW mailbox: imx: fix crash in resume on i.mx8ulp mailbox: imx: fix wakeup failure from freeze mode mailbox: mediatek: add support for adsp mailbox controller dt-bindings: mailbox: mtk,adsp-mbox: add mtk adsp-mbox document mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC dt-bindings: mailbox: Add compatible for the MSM8976 mailbox: tegra-hsp: Flush whole channel |
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Linus Torvalds
|
b4bc93bd76 |
ARM driver updates for 5.18
There are a few separately maintained driver subsystems that we merge through the SoC tree, notable changes are: - Memory controller updates, mainly for Tegra and Mediatek SoCs, and clarifications for the memory controller DT bindings - SCMI firmware interface updates, in particular a new transport based on OPTEE and support for atomic operations. - Cleanups to the TEE subsystem, refactoring its memory management For SoC specific drivers without a separate subsystem, changes include - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP Layerscape SoCs. - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L, and Qualcomm SM8450. - Better power management on Mediatek MT81xx, NXP i.MX8MQ and older NVIDIA Tegra chips -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmI4nOUACgkQmmx57+YA GNlNNhAApPQw+FKQ6yVj2EZYcaAgik8PJAJoNQWYED52iQfm5uXgjt3aQewvrPNW nkKx5Mx+fPUfaKx5mkVOFMhME5Bw9tYbXHm2/RpRp+n8jOdUlQpAhzIPOyWPHOJS QX6qu4t+agrQzjbOCGouAJXgyxhTJFUMviM2EgVHbQHXPtdF8i2kyanfCP7Rw8cx sVtLwpvhbLm849+deYRXuv2Xw9I3M1Np7018s5QciimI2eLLEb+lJ/C5XWz5pMYn M1nZ7uwCLKPCewpMETTuhKOv0ioOXyY9C1ghyiGZFhHQfoCYTu94Hrx9t8x5gQmL qWDinXWXVk8LBegyrs8Bp4wcjtmvMMLnfWtsGSfT5uq24JOGg22OmtUNhNJbS9+p VjEvBgkXYD7UEl5npI9v9/KQWr3/UDir0zvkuV40gJyeBWNEZ/PB8olXAxgL7wZv cXRYSaUYYt3DKQf1k5I4GUyQtkP/4RaBy6AqvH5Sx0lCwuY6G6ISK+kCPaaSRKnX WR+nFw84dKCu7miehmW9qSzMQ4kiSCKIDqk7ilHcwv0J2oXDrlqVPKGGGTzZjUc8 +feqM/eSoYvDDEDemuXNSnl3hc1Zlvm7Apd5AN6kdTaNgoACDYdyvGuJ3CvzcA+K 1gBHUBvGS/ODA25KnYabr7wCMgxYqf7dXfkyKIBwFHwxOnRHtgs= =Cfbk -----END PGP SIGNATURE----- Merge tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "There are a few separately maintained driver subsystems that we merge through the SoC tree, notable changes are: - Memory controller updates, mainly for Tegra and Mediatek SoCs, and clarifications for the memory controller DT bindings - SCMI firmware interface updates, in particular a new transport based on OPTEE and support for atomic operations. - Cleanups to the TEE subsystem, refactoring its memory management For SoC specific drivers without a separate subsystem, changes include - Smaller updates and fixes for TI, AT91/SAMA5, Qualcomm and NXP Layerscape SoCs. - Driver support for Microchip SAMA5D29, Tesla FSD, Renesas RZ/G2L, and Qualcomm SM8450. - Better power management on Mediatek MT81xx, NXP i.MX8MQ and older NVIDIA Tegra chips" * tag 'arm-drivers-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (154 commits) ARM: spear: fix typos in comments soc/microchip: fix invalid free in mpfs_sys_controller_delete soc: s4: Add support for power domains controller dt-bindings: power: add Amlogic s4 power domains bindings ARM: at91: add support in soc driver for new SAMA5D29 soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC memory: emif: check the pointer temp in get_device_details() memory: emif: Add check for setup_interrupts dt-bindings: arm: mediatek: mmsys: add support for MT8186 dt-bindings: mediatek: add compatible for MT8186 pwrap soc: mediatek: pwrap: add pwrap driver for MT8186 SoC soc: mediatek: mmsys: add mmsys reset control for MT8186 soc: mediatek: mtk-infracfg: Disable ACP on MT8192 soc: ti: k3-socinfo: Add AM62x JTAG ID soc: mediatek: add MTK mutex support for MT8186 soc: mediatek: mmsys: add mt8186 mmsys routing table soc: mediatek: pm-domains: Add support for mt8186 dt-bindings: power: Add MT8186 power domains soc: mediatek: pm-domains: Add support for mt8195 ... |
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Dave Gerlach
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df227dc8a6 |
mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend
During the system suspend path we must set all queues to operate in polled mode as it is possible for any protocol built using this mailbox, such as TISCI, to require communication during the no irq phase of suspend, and we cannot rely on interrupts there. Polled mode is implemented by allowing the mailbox user to define an RX channel as part of the message that is sent which is what gets polled for a response. If polled mode is enabled, this will immediately be polled for a response at the end of the mailbox send_data op before returning success for the data send or timing out if no response is received. Finally, to ensure polled mode is always enabled during system suspend, iterate through all queues to set RX queues to polled mode during system suspend and disable polled mode for all in the resume handler. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
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Arnd Bergmann
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4d558d4d88 |
Qualcomm driver updates for v5.18
This refactors the Qualcomm mdt file loader, to partially decouple it from the SCM peripheral-authentication-service. This is needed as newer platforms, such as the Qualcomm SM8450, require the metadata to remain accessible to TrustZone during a longer time. This is followed by the introduction of remoteproc drivers for SM8450 (Snapdragon 8 Gen 1). It changes the way hardware version differences are handled in the LLCC driver and introduces support for Qualcomm SM8450. While updating the dt binding for LLCC it also introduces the missing SM8350 compatible. The ocmem and aoss drivers gains missing put_device() calls and rpmpd gains a missing check for kcalloc() failure. The SPM driver is updated to avoid instantiating the SPM cpuidle devices if the CPUs aren't controlled by SPM, such as when Snapdragon 8916 operates in 32-bit mode without PSCI. The RPM power-domain driver gains MSM8226 support. Lastly the socinfo driver gains knowledge about a few new SoCs and PMICs. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmIdnvAbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FFMIQAL8yVzMuonz7yiuxZaC6 nvCGWVIbsfjloLWjpE79orSoEx77DlhYaUDHdYqHMEV9ytdryaSaU5A5LGfzVugC D6TSvJh1SDV6hJ79xRZIDO72fJn/Xo62JCtTC4u+iBgoehhMrOQHm7HlBhLXJ2lq RiHDjzCHMaRTrPf1GCY8a1VK0nIa8KfaAbk+GzZ5Y+0I4oh7ea43DwUSYAIvZAKi N5CRXRFeoGpEnY9FzYYfkTPXu28hvj3NtGaEX8SIyzmgLBxCqLpFfxVj3xUsDGbX TFqr5YWO31/5oQN4Ex0IrD4NOyOtVyPCtd6iSmlW3t+LxcQsgfW4cCfzT9vQp8dV LLkhvKQCAMyIIzZtoHQRN2J0L4tQ8kW1lxW01XMbEjm0lOoALGisE8KouSPlAFn8 zgX6bPWUmsuictfG8gmqgqKsloV6E5IU37Htcm+sdw89ZVks6UJG40D3DiOcpAXX eEKRMW8UHhR/u2AQRlaBcSTQVI/zfXWFk408zHxfD6fphrfnSPRBl+CEZmqrySWi eqsL1PJblZg1Uhg5Q8XRokAzB59RYVbs6jSiLKGTUvwTrBMUy+SK1UOG9V3pXsOv TSW92RXKZFS8smNcKm/2k1bhopW+2h2BB0z1OYBynl+VUOtCadf7DHciGmAn/Hxd eyL2HBVqS4LtdLHSL2TAj3oM =okza -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmIeZNUACgkQmmx57+YA GNmKBBAAwpweTveDkEmeT6nTckDaRYBo0LthJr6TmgndjKq5QChknEOFSMvs6JzP Ftheb+J7NcrQ20vN+wv8ic2k6hP8UCRrxyt7IJSJ3iDsqjODxW0K/qoetpFL1BoY zCdo0+C7R9iK4QbEA7HjbG5SCVMe8eOLGJLWXkbAO/DInU/WZfSmbbieDSNIjHIp nBoX5iBPKHMxj8Cbi12ezK+NHgwXkPdc+H0YNnwbBX6cr470bq5AarJCuWS4W0XP xUTC86mR9NUDMu4MkIjbtTZUgKOSXuQoioH4uJKNTDObD+i1GDUNWTm1nvxrQMe1 DZctGN2ISHKjzcS2okcYwZ4CX8SEB3QK07YydyBknsNINxvwm1fB23VtCikP4k2r Zqo6ewT1Y1imrb2MmjWyTesXO1u+JDz5d0A3O9O93Yvfn6Zz/wiGQV6HSmbU6RpQ JyJWUOokCydqKXMLlb79Ln2Sx8q84aoZGekEQGfTqvIObntuYx0VWdMJuisP0z4+ CqZTnIc60IaG8WkB/xx/vzzKa8XmKTfalSxZV5ThTruVmiHAqd1rW8N/mR4ZE2bM YQ0AxQcaZHyUawPuaqOY/u9lADE0ROW/3loC5CWU8LLTSR3OM610YgQOKNC8yi2n FlEYdhupJEGcx4fLY+SPWGgYFhIZgqxlL7WNtzg7uEFiBpayLxA= =vkG6 -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.18 This refactors the Qualcomm mdt file loader, to partially decouple it from the SCM peripheral-authentication-service. This is needed as newer platforms, such as the Qualcomm SM8450, require the metadata to remain accessible to TrustZone during a longer time. This is followed by the introduction of remoteproc drivers for SM8450 (Snapdragon 8 Gen 1). It changes the way hardware version differences are handled in the LLCC driver and introduces support for Qualcomm SM8450. While updating the dt binding for LLCC it also introduces the missing SM8350 compatible. The ocmem and aoss drivers gains missing put_device() calls and rpmpd gains a missing check for kcalloc() failure. The SPM driver is updated to avoid instantiating the SPM cpuidle devices if the CPUs aren't controlled by SPM, such as when Snapdragon 8916 operates in 32-bit mode without PSCI. The RPM power-domain driver gains MSM8226 support. Lastly the socinfo driver gains knowledge about a few new SoCs and PMICs. * tag 'qcom-drivers-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (37 commits) soc: qcom: rpmpd: Add MSM8226 support dt-bindings: power: rpmpd: Add MSM8226 to rpmpd binding soc: qcom: mdt_loader: Fix split-firmware condition dt-bindings: arm: msm: Add LLCC compatible for SM8450 dt-bindings: arm: msm: Add LLCC compatible for SM8350 soc: qcom: llcc: Add configuration data for SM8450 SoC soc: qcom: llcc: Update register offsets for newer LLCC HW soc: qcom: llcc: Add missing llcc configuration data soc: qcom: llcc: Add write-cache cacheable support soc: qcom: llcc: Update the logic for version info extraction soc: qcom: llcc: Add support for 16 ways of allocation soc: qcom: socinfo: Add some more PMICs and SoCs firmware: qcom: scm: Add support for MC boot address API firmware: qcom: scm: Drop cpumask parameter from set_boot_addr() firmware: qcom: scm: Simplify set_cold/warm_boot_addr() cpuidle: qcom-spm: Check if any CPU is managed by SPM remoteproc: qcom: pas: Add SM8450 remoteproc support dt-bindings: remoteproc: qcom: pas: Add SM8450 PAS compatibles remoteproc: qcom: pas: Carry PAS metadata context soc: qcom: mdt_loader: Extract PAS operations ... Link: https://lore.kernel.org/r/20220301042055.1804859-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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16e769e2ae |
- add power domains support for mt8195
- disable ACP on mt8192 mt8186: - add support for power domains - add mmsys and mutex support needed for DRM - add reset control based on mmsys subsystem - add pmic wrapper -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmId5EgXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH4gEg/+LL7XjcWZlD8GwTfJEeZjgk3c 06rne1kKh0mm9+VEIHOp0RsMf4IdbHwCbAt3xMMcdOqAxh4oaKchCE0fPS2d+mdA 2qZaysEBxG6RTs/wY9fS1/diGge3OroW3CuS0cv6mKh7acY9tLW5/VRvvgcOzSrT eJYGQqpXg4VfUJ41e7otIhj32Npltby9lBlo8Z5kF3Vy7yYAUEZvNrGrp0pmwkvM UJRlCZFoSGAfoijJfpH38vixi+qWYOiAhulweT01VhtIVYHjh+BmoQc4jZ8A7fhW ttzlrbYPELRD0eu6/zfdokXWVwZjkqB5HoumN7IaYW+ZUEY6iYhy9J+Ir9qpG82D Z4cbk4JMc6uEAjTdu6njdzlBukw80oXOo6nCyPa+xvniNWPoYTHN5JZaNWig4taC 5i9diVBuwkOdYARKSFqxk1FuvvSDh+8QP9hNiomXZrPUjZgilXDQ2CncKFr70CNM iCQqCiHNpzaVEMxBkve2aU9kKc5qVixrLAqh/VOwpUln66aE1Ug51zzdAAkalyQv di6iZMRFy+pL3oNPFWAKv0Z0yowBj/QDFBZiOc/SqXrrNpHNDfMVPcSdZVtjSBXD DqPxPFRHaqV/+eFHc9xyvgKMMbg2xYsZXVrleyQWiXck0x2mshw3hIcghGpkPGDB w+b5BPpeewE49tamKJs= =KUFa -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmId8OYACgkQmmx57+YA GNlaoA//cdGz81n8HG8zy1DpprypmbUCJv6SruIF1XE2ewOgZ486IiA0H1yYdSD5 kDmok9SDjFM+WmqxoGUQl5hcNH67ThD/5rxgKgrIpi4kpfhgjbhYLJ9PGjZSAc4v 9zW+l48WDYxHmq7xhsCgsC6BoimM3MHwJTA3crMzXqtG3PecrLtnMS6EAaX/Uoub Vw7HW8v7PAeO9xx4tBV+c65jYDmmcBm21iv9EptEUOgK06OhjyH6KoQjFwGpg/tb uEDehYDK5pULc9U2322sfRJ0b0LpD/+yJMREITe9XYuHX+4akqVEscEVvnwh/j+1 PXwwtGOnVMk/5TLaLUQy181x4soXG+8uBVbitHpZVCfmRvel6fAbnfgAxyf7sYy/ Kdbp1apVnQ7nDeW/rhR7glNrJSUN+R2uBbfmXPyU+MOoPG+1Ckz6YR4VrjKx0M/N K7qkqwJxp7TkuFJXzqWi58apyHqBdM9LzsyroRjk8FqeDC60T6RQDhJXuXDpDp58 na4WDaS5expzgWpGiJwrm2MfT0rbI9X7pyGRcCPY6kVwtnLX84npVal6ZbS8jCwp KRO13i/ZzZj9ZNlOhANgYodedW4dO/tyW39xMIzYrQ+5QjQ8IvD+DFnv50F1DzON 5IbTBTDS1B07dIikIb9FFLrGZL/bqEtafg9kGsYfypmXfVPf3FY= =G//M -----END PGP SIGNATURE----- Merge tag 'v5.17-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers - add power domains support for mt8195 - disable ACP on mt8192 mt8186: - add support for power domains - add mmsys and mutex support needed for DRM - add reset control based on mmsys subsystem - add pmic wrapper * tag 'v5.17-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: arm: mediatek: mmsys: add support for MT8186 dt-bindings: mediatek: add compatible for MT8186 pwrap soc: mediatek: pwrap: add pwrap driver for MT8186 SoC soc: mediatek: mmsys: add mmsys reset control for MT8186 soc: mediatek: mtk-infracfg: Disable ACP on MT8192 soc: mediatek: add MTK mutex support for MT8186 soc: mediatek: mmsys: add mt8186 mmsys routing table soc: mediatek: pm-domains: Add support for mt8186 dt-bindings: power: Add MT8186 power domains soc: mediatek: pm-domains: Add support for mt8195 soc: mediatek: pm-domains: Move power status offset to power domain data soc: mediatek: pm-domains: Remove unused macro soc: mediatek: pm-domains: Add wakeup capacity support in power domain dt-bindings: power: Add MT8195 power domains Link: https://lore.kernel.org/r/16a53482-5a8c-e95e-8cd4-b8304f110987@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Alyssa Rosenzweig
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dcfd519256 |
soc: mediatek: mtk-infracfg: Disable ACP on MT8192
MT8192 contains an experimental Accelerator Coherency Port implementation, which does not work correctly but was unintentionally enabled by default. For correct operation of the GPU, we must set a chicken bit disabling ACP on MT8192. Adapted from the following downstream change to the out-of-tree, legacy Mali GPU driver: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2781271/5 Note this change is required for both Panfrost and the legacy kernel driver. Co-developed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Cc: Nick Fan <Nick.Fan@mediatek.com> Cc: Nicolas Boichat <drinkcat@chromium.org> Cc: Chen-Yu Tsai <wenst@chromium.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220215184651.12168-1-alyssa.rosenzweig@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Chun-Jie Chen
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88590cbc17 |
soc: mediatek: pm-domains: Add support for mt8186
Add power domain control data in mt8186. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Link: https://lore.kernel.org/r/20220215104917.5726-3-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Chun-Jie Chen
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342479c86d |
soc: mediatek: pm-domains: Add support for mt8195
Add domain control data including bus protection data size change due to more protection steps in mt8195. Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220130012104.5292-6-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Linus Walleij
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3059dfa52c |
ARM: ixp4xx: Remove feature bit accessors
We switched users of the accessors over to using syscon to inspect the bits, or removed the need for checking them. Delete these accessors. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220211223238.648934-11-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Linus Walleij
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8754a7e61c |
soc: ixp4xx-npe: Access syscon regs using regmap
If we access the syscon (expansion bus config registers) using the syscon regmap instead of relying on direct accessor functions, we do not need to call this static code in the machine (arch/arm/mach-ixp4xx/common.c) which makes things less dependent on custom machine-dependent code. Look up the syscon regmap and handle the error: this will make deferred probe work with relation to the syscon. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220211223238.648934-8-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Linus Walleij
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b50113cbdd |
soc: ixp4xx: Add features from regmap helper
If we want to read the CFG2 register on the expansion bus and apply the inversion and check for some hardcoded versions this helper comes in handy. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220211223238.648934-7-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Sai Prakash Ranjan
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a6e9d7ef25 |
soc: qcom: llcc: Add configuration data for SM8450 SoC
Add LLCC configuration data for SM8450 SoC. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/fec944cb8f2a4a70785903c6bfec629c6f31b6a4.1643355594.git.quic_saipraka@quicinc.com |
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Sai Prakash Ranjan
|
8008e7902f |
soc: qcom: llcc: Update the logic for version info extraction
LLCC HW version info is made up of major, branch, minor and echo version bits each of which are 8bits. Several features in newer LLCC HW are based on the full version rather than just major or minor versions such as write-subcache enable which is applicable for versions v2.0.0.0 and later, also upcoming write-subcache cacheable for SM8450 SoC which is only present in versions v2.1.0.0 and later, so it makes it easier and cleaner to just directly compare with the full version than adding additional major/branch/ minor/echo version checks. So remove the earlier major version check and add full version check for those features. Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> Tested-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/a82d7c32348c51fcc2b63e220d91b318bf706c83.1643355594.git.quic_saipraka@quicinc.com |
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Bjorn Andersson
|
f4e526ff7e |
soc: qcom: mdt_loader: Extract PAS operations
Rather than passing a boolean to indicate if the PAS operations should be performed from within __mdt_load(), extract them to their own helper function. This will allow clients to invoke this directly, with some qcom_scm_pas_metadata context that they later needs to release, without further having to complicate the prototype of qcom_mdt_load(). Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-9-bjorn.andersson@linaro.org |
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Bjorn Andersson
|
8bd42e2341 |
soc: qcom: mdt_loader: Allow hash segment to be split out
It's been observed that some firmware found in a Qualcomm SM8450 device has the hash table in a separate .bNN file. Use the newly extracted helper function to load this segment from the separate file, if it's determined that the hashes are not part of the already loaded firmware. In order to do this, the function needs access to the firmware basename and to provide more useful error messages a struct device to associate the errors with. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-4-bjorn.andersson@linaro.org |
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Christophe JAILLET
|
043cfff99a |
firmware: ti_sci: Fix compilation failure when CONFIG_TI_SCI_PROTOCOL is not defined
Remove an extra ";" which breaks compilation.
Fixes:
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Linus Torvalds
|
feb7a43de5 |
Rework of the MSI interrupt infrastructure:
Treewide cleanup and consolidation of MSI interrupt handling in preparation for further changes in this area which are necessary to: - address existing shortcomings in the VFIO area - support the upcoming Interrupt Message Store functionality which decouples the message store from the PCI config/MMIO space -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmHf+SETHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYobzGD/wNEFl5qQo5mNZ9thP6JSJFOItm7zMc 2QgzCYOqNwAv4jL6Dqo+EHtbShYqDyWzKdKccgqNjmdIqgW8q7/fubN1OPzRsClV CZG997AsXDGXYlQcE3tXZjkeCWnWEE2AGLnygSkFV1K/r9ALAtFfTBJAWB+UD+Zc 1P8Kxo0q0Jg+DQAMAA5bWfSSjo/Pmpr/1AFjY7+GA8BBeJJgWOyW7H1S+GYEWVOE RaQP81Sbd6x1JkopxkNqSJ/lbNJfnPJxi2higB56Y0OYn5CuSarYbZUM7oQ2V61t jN7pcEEvTpjLd6SJ93ry8WOcJVMTbccCklVfD0AfEwwGUGw2VM6fSyNrZfnrosUN tGBEO8eflBJzGTAwSkz1EhiGKna4o1NBDWpr0sH2iUiZC5G6V2hUDbM+0PQJhDa8 bICwguZElcUUPOprwjS0HXhymnxghTmNHyoEP1yxGoKLTrwIqkH/9KGustWkcBmM hNtOCwQNqxcOHg/r3MN0KxttTASgoXgNnmFliAWA7XwseRpLWc95XPQFa5sptRhc EzwumEz17EW1iI5/NyZQcY+jcZ9BdgCqgZ9ECjZkyN4U+9G6iACUkxVaHUUs77jl a0ISSEHEvJisFOsOMYyFfeWkpIKGIKP/bpLOJEJ6kAdrUWFvlRGF3qlav3JldXQl ypFjPapDeB5guw== =vKzd -----END PGP SIGNATURE----- Merge tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull MSI irq updates from Thomas Gleixner: "Rework of the MSI interrupt infrastructure. This is a treewide cleanup and consolidation of MSI interrupt handling in preparation for further changes in this area which are necessary to: - address existing shortcomings in the VFIO area - support the upcoming Interrupt Message Store functionality which decouples the message store from the PCI config/MMIO space" * tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (94 commits) genirq/msi: Populate sysfs entry only once PCI/MSI: Unbreak pci_irq_get_affinity() genirq/msi: Convert storage to xarray genirq/msi: Simplify sysfs handling genirq/msi: Add abuse prevention comment to msi header genirq/msi: Mop up old interfaces genirq/msi: Convert to new functions genirq/msi: Make interrupt allocation less convoluted platform-msi: Simplify platform device MSI code platform-msi: Let core code handle MSI descriptors bus: fsl-mc-msi: Simplify MSI descriptor handling soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs() soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation NTB/msi: Convert to msi_on_each_desc() PCI: hv: Rework MSI handling powerpc/mpic_u3msi: Use msi_for_each-desc() powerpc/fsl_msi: Use msi_for_each_desc() powerpc/pasemi/msi: Convert to msi_on_each_dec() powerpc/cell/axon_msi: Convert to msi_on_each_desc() powerpc/4xx/hsta: Rework MSI handling ... |
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Arnd Bergmann
|
13ee75c7b5 |
Qualcomm driver updates for v5.17
This introduces RPM power-domain support for the SM8450, SM6125 and QCM2290 platforms. It them clean up the platform-based naming of the resources definitions throughout the RPMh PD driver. The last-level cache controller driver gains SM8350 support. The RPM sleep stats driver gains support for several older systems that had a slightly different memory layout for this information. The socinfo gains SM8450, SM6350 and SM7227 definitions. In addition to the DeviceTree binding updates related to these changes new compatibles was added to describe the SM8450 and the Kryo 780 CPU. Lastly a few typo and style fixes are introduced. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmHBUg4bHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FObUQAOCTBSbL/US0wCCUEHPq MScjFtPDAV88bJi9uRzi5lalwPd/3yPZu+XLcCV/CjRj6nlGAbua2EcogvMsM1Lj rgHZopKnnDOHEFII2ZZ3lyJN4EntvSGHtnm/i2Jd7n3nB52zBkuRpgn3mi32QWoL QmGECClAPFBlQi9P33yHDZ/XC8ZK1y982G+Pb8SD6guxmtGxXCm4SaZ4qwVya53s euBl+nT/snARPEwaqRoGIsvs+fH2BcoJbug19MLQ+3Q4K9ycxQkWalzcMsLM/EjT H1JGjoaHbTpNhyMmKDqN2jS0CkvoLiYOIvhAbqw6l2HluRkn8QhcDOJJ9RHl2oB/ EqYkK457F7smA0Z9vViuaEZJWfyPNt0z2c7zcpf73Iuk8cBM+48MUQ1UOwyvQh3c 8AeyyAkgyYBWv58h5rLDS2fqD+tWx4hz6tqxyYojsxYjQkyWRDU6540tGSDeVAt+ SUQ9qFXWyG7R5Z3GBVHi7ztXnkl6vYZUF05fhZrkpw9YrGlmu3wK/3Rcg9ZIECOg Q0UA/GQsqQtCqmzkRQsur/ljEbCrmtiB6JvG+7cnQIWPwcN/4Ho3wyfXvtzNvNki dMIpd+7NKkTaj1HUaH5qEnyO4szUpMoFfOrtqzlucH5dGG6fppY3svVWzuxLcbDy 8+b+/aDuWa7HUXpBbPaK7H7U =ovup -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHBy8wACgkQmmx57+YA GNmS3xAAhIPIdMWF76Gb7eQu0UWrbuACSl0Nkt5SRbRyjX0BHectf+ssXUzR6r2/ l8Uf2fkBYP5UWVUbWXlKPlmwmdQo/lAGYeHvi/lx3W4ORvIe6CRTeIS0q0DLPwSV H7iH8lnoFozIITt+6N+LhN9VME/Zpo8E/t2Wt47mkSkV/2hP6Adrgh5f4pz4KMcl hHQcAhi0/3DTEoGjczBDcTXMIt8nUPSwTnd1ktOaD0avRgKgiiLslvzjTxLMXRuw aDInx8uIMBswbEE0ZtG1aFrYZ54Y3DAm65n4aZfOPo3OlLjiosOqT1pvKWkpF/u1 OYcQzVEdUnEwZKB9BYzkTFVtK3ptE/5nNFg4HkclZATrqvEfQ6I3EbM9tvtY6GV+ BUUjxOthWq0Rnazd3BkOJvsepSndB1dOfxAunBk6m/r44shWWjLKGRI3jd+0QgW2 UVd0hy5pC28OZelGgSAU0PVQyHYl/82pRu7UCpHVaOg9mvuwgURChr7ddGi9XWVG cMChFAumH/hvnQrRavONPUqaTjP62hRkOqjA/bvc3jFuAgFWqvSrc+z1AvqKw4Uz 0ks+tjoHrQ839EZB0g/LDk7K8MDe8llvOk16gzqNxplQJe2WYaRZ9S0GD+3MC1Wz sSIyMsFLhfZJ2Z7TNOqLTPPW3jfoU3ntNzHUY8gCpTSh8DVkbtQ= =NlpZ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.17 This introduces RPM power-domain support for the SM8450, SM6125 and QCM2290 platforms. It them clean up the platform-based naming of the resources definitions throughout the RPMh PD driver. The last-level cache controller driver gains SM8350 support. The RPM sleep stats driver gains support for several older systems that had a slightly different memory layout for this information. The socinfo gains SM8450, SM6350 and SM7227 definitions. In addition to the DeviceTree binding updates related to these changes new compatibles was added to describe the SM8450 and the Kryo 780 CPU. Lastly a few typo and style fixes are introduced. * tag 'qcom-drivers-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits) soc: qcom: rpmh-rsc: Fix typo in a comment soc: qcom: socinfo: Add SM6350 and SM7225 dt-bindings: arm: msm: Don't mark LLCC interrupt as required dt-bindings: firmware: scm: Add SM6350 compatible dt-bindings: arm: msm: Add LLCC for SM6350 soc: qcom: rpmhpd: Sort power-domain definitions and lists soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280 soc: qcom: rpmhpd: Rename rpmhpd struct names soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao soc: qcom: socinfo: add SM8450 ID soc: qcom: rpmhpd: Add SM8450 power domains dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding soc: qcom: smem: Update max processor count dt-bindings: arm: qcom: Document SM8450 SoC and boards dt-bindings: firmware: scm: Add SM8450 compatible dt-bindings: arm: cpus: Add kryo780 compatible soc: qcom: rpmpd: Add support for sm6125 dt-bindings: qcom-rpmpd: Add sm6125 power domains soc: qcom: aoss: constify static struct thermal_cooling_device_ops PM: AVS: qcom-cpr: Use div64_ul instead of do_div ... Link: https://lore.kernel.org/r/20211221040452.3620633-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Konrad Dybcio
|
6fc61c39ee |
soc: qcom: llcc: Add configuration data for SM8350
Add LLCC configuration data for SM8350 SoC. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211121002050.36977-2-konrad.dybcio@somainline.org |
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Thomas Gleixner
|
7ad321a5ea |
soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()
The function has no users and is pointless now that the core frees the MSI descriptors, which means potential users can just use msi_domain_free_irqs(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20211206210748.793119155@linutronix.de |
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Thomas Gleixner
|
89e0032ec2 |
soc: ti: ti_sci_inta_msi: Get rid of ti_sci_inta_msi_get_virq()
Just use the core function msi_get_virq(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20211210221815.269468319@linutronix.de |
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Julien Massot
|
4c7924fb90 |
soc: renesas: rcar-rst: Add support to set rproc boot address
R-Car Gen3 SoC series has a realtime processor, the boot address of this processor can be set thanks to CR7BAR register of the reset module. Export this function so that it's possible to set the boot address from a remoteproc driver. Also drop the __initdata qualifier on rcar_rst_base, since we will use this address later than init time. Signed-off-by: Julien Massot <julien.massot@iot.bzh> Link: https://lore.kernel.org/r/20211022122101.66998-1-julien.massot@iot.bzh Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Linus Torvalds
|
7ddb58cb0e |
The usual collection of clk driver updates and new driver additions. In
terms of lines it's mainly Qualcomm and Mediatek code, supporting various SoCs and their multitude of clk controllers. New Drivers: - GCC and RPMcc support for Qualcomm QCM2290 SoCs - GCC support for Qualcomm MSM8994/MSM8992 SoCs - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs - Support for Mediatek MT8195 SoCs - Initial clock driver for the Exynos850 SoC - Add i.MX8ULP clock driver and related bindings Updates: - Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able to use cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while changing the frequency via DVFS - Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - Make Mediatek clk drivers tristate - Refactoring of the CPU clock code and conversion of Samsung Exynos5433 CPU clock driver to the platform driver - A few conversions to devm_platform_ioremap_resource() - Updates of the Samsung Kconfig help text - Update video path realted clocks for Amlogic meson8 - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N - Remove unused helpers from i.MX specific clock header - Rework all i.MX clk based helpers to use clk_hw based ones - Rework i.MX gate/mux/divider wrappers - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers - Update i.MX pllv4 and composite clocks to support i.MX8ULP - Disable i.MX7ULP composite clock during initialization - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite - Disable the i.MX pfd when set pfdv2 clock rate - Add support for i.MX8ULP in pfdv2 - Add the pcc reset controller support on i.MX8ULP - Fix the build break when clk-imx8ulp is built as module - Move csi_sel mux to correct base register in i.MX6UL clock drivr - Fix csi clk gate register in i.MX6UL clock driver - Fix build bug making CLK_IMX8ULP select MXC_CLK - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U - Add Ethernet clocks on Renesas RZ/G2L - Move Rockchip to use module_platform_probe - Enable usage of Coresight related clocks on Rockchip rk3399 -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmGDLIwRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSWasBAA2TTYnSNm/vaNHYPrKRhv5OgALOX5T8yy rylvO8qcGrmzX3lVRiO4Bp34jZxQQMG7d2eJn6OMbGEN+9GcsZGA3p4zA8wZaXkN yAnddCUEyFl2zMrikXLijhjJ87bmsKUaHHN+zGrGAxC9/VBMwDUPjp9Gy4kdmUFj 0fq2yhWULulm7UgDTLzwow22wCYYx9/SaNbhnDj7s/eV5N2oexXOrwfIlDHtXnMZ 4zbJtZ4GKmdicUUMIVzO7wrdEHcWgbPrY2S8UuUbM5PPMzsX7OZ4k/w94p18iT40 kaJnvEgwZomsYkBMMTrxRjlI/AU3r9omyquKEPX2UXUsTqGHOXZqFXVDPS/6tnvU +sqP1V59NMmN9t3HomZ+gr+VKyjakYXuz7QlZZ5kuZRM0aWDfCaq8UEAjyU1WQ+J NI4BKzok7+JqEZ25MjcpEV6UBrzNnJ3SMGGiiEUxL6Fl4BE9anVUn06E16v3b5Vb k36eosnT3gCBvhNI6gV5zIUyavwb4ga4QJyRQJBeHE7qSVegeoauS8qTFvV04tud fWZwAqdLUU/fVse8iuolciZBMAkiuI/R0N8/rZ3MHLe3VB0D/Q/XWGcIheyVpALK KAWQ/OA96mM9qf1VBkeItdciSQ+rwAcivmcJTvVIUiwlNk36CYzRsja+sgcNphPH WV1CLOIrOgQ= =Is+O -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The usual collection of clk driver updates and new driver additions. In terms of lines it's mainly Qualcomm and Mediatek code, supporting various SoCs and their multitude of clk controllers. New Drivers: - GCC and RPMcc support for Qualcomm QCM2290 SoCs - GCC support for Qualcomm MSM8994/MSM8992 SoCs - LPASSCC and CAMCC support for Qualcomm SC7280 SoCs - Support for Mediatek MT8195 SoCs - Initial clock driver for the Exynos850 SoC - Add i.MX8ULP clock driver and related bindings Updates: - Clock power management for new SAMA7G5 SoC - Updates to the master clock driver and sam9x60-pll to be able to use cpufreq-dt driver and avoid overclocking of CPU and MCK0 domains while changing the frequency via DVFS - Use ARRAY_SIZE in qcom clk drivers - Remove some impractical fallback parent names in qcom clk drivers - Make Mediatek clk drivers tristate - Refactoring of the CPU clock code and conversion of Samsung Exynos5433 CPU clock driver to the platform driver - A few conversions to devm_platform_ioremap_resource() - Updates of the Samsung Kconfig help text - Update video path realted clocks for Amlogic meson8 - Add SPI Multi I/O Bus and SDHI clocks and resets on Renesas RZ/G2L - Add SPI Multi I/O Bus (RPC) clocks on Renesas R-Car V3U - Add MediaLB clocks on Renesas R-Car H3, M3-W/W+, and M3-N - Remove unused helpers from i.MX specific clock header - Rework all i.MX clk based helpers to use clk_hw based ones - Rework i.MX gate/mux/divider wrappers - Rework imx_clk_hw_composite and imx_clk_hw_pll14xx wrappers - Update i.MX pllv4 and composite clocks to support i.MX8ULP - Disable i.MX7ULP composite clock during initialization - Add CLK_SET_RATE_NO_REPARENT flag to the i.MX7ULP composite - Disable the i.MX pfd when set pfdv2 clock rate - Add support for i.MX8ULP in pfdv2 - Add the pcc reset controller support on i.MX8ULP - Fix the build break when clk-imx8ulp is built as module - Move csi_sel mux to correct base register in i.MX6UL clock drivr - Fix csi clk gate register in i.MX6UL clock driver - Fix build bug making CLK_IMX8ULP select MXC_CLK - Add TPU (PWM), and Z (Cortex-A76) clocks on Renesas R-Car V3U - Add Ethernet clocks on Renesas RZ/G2L - Move Rockchip to use module_platform_probe - Enable usage of Coresight related clocks on Rockchip rk3399" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (170 commits) clk: use clk_core_get_rate_recalc() in clk_rate_get() clk: at91: sama7g5: set low limit for mck0 at 32KHz clk: at91: sama7g5: remove prescaler part of master clock clk: at91: clk-master: add notifier for divider clk: at91: clk-sam9x60-pll: add notifier for div part of PLL clk: at91: clk-master: fix prescaler logic clk: at91: clk-master: mask mckr against layout->mask clk: at91: clk-master: check if div or pres is zero clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL clk: at91: pmc: add sama7g5 to the list of available pmcs clk: at91: clk-master: improve readability by using local variables clk: at91: clk-master: add register definition for sama7g5's master clock clk: at91: sama7g5: add securam's peripheral clock clk: at91: pmc: execute suspend/resume only for backup mode clk: at91: re-factor clocks suspend/resume clk: ux500: Add driver for the reset portions of PRCC dt-bindings: clock: u8500: Rewrite in YAML and extend clk: composite: Use rate_ops.determine_rate when also a mux is available clk: samsung: describe drivers in Kconfig clk: samsung: exynos5433: update apollo and atlas clock probing ... |
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Linus Torvalds
|
d461e96cd2 |
ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There are a couple of subsystems with individual maintainers picking up their patches here: - The reset controller subsystem add support for a few new SoC variants to existing drivers, along with other minor improvements - The OP-TEE subsystem gets a driver for the ARM FF-A transport - The memory controller subsystem has improvements for Tegra, Mediatek, Renesas, Freescale and Broadcom specific drivers. - The tegra cpuidle driver changes get merged through this tree this time. There are only minor changes, but they depend on other tegra driver updates here. - The ep93xx platform finally moves to using the drivers/clk/ subsystem, moving the code out of arch/arm in the process. This depends on a small sound driver change that is included here as well. - There are some minor updates for Qualcomm and Tegra specific firmware drivers. The other driver updates are mainly for drivers/soc, which contains a mixture of vendor specific drivers that don't really fit elsewhere: - Mediatek drivers gain more support for MT8192, with new support for hw-mutex and mmsys routing, plus support for reset lines in the mmsys driver. - Qualcomm gains a new "sleep stats" driver, and support for the "Generic Packet Router" in the APR driver. - There is a new user interface for routing the UARTS on ASpeed BMCs, something that apparently nobody else has needed so far. - More drivers can now be built as loadable modules, in particular for Broadcom and Samsung platforms. - Lots of improvements to the TI sysc driver for better suspend/resume support Finally, there are lots of minor cleanups and new device IDs for amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape, allwinner, broadcom, and omap. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGCvKgACgkQmmx57+YA GNnNfw/8DDTfMUycVvtaNslYlWri0/2O0nSqhNIIbTAcVuD/x5qo/McDhKuv+ldM BoTDMjRYZfQkrNXSEj3MaxB9E0o6Srva5SM8y4+Koe0VVtvEVovjYkXOhXqSEWWl aqVIe0S6Y1rF/KxJlvAfGxYHb5d+6aYqzdmhjURpXNGxqpSHb9/hqisY97Q9TpnD 6lQZOz9d1JNDq0eOh1qjcfuMjg1EHZHDZJyioCvyX38KIl2q7p3ll2z/eqrrDhQZ TrvL/YVosTXqBcAfi47Oz+n/CX2i0MrjVO8nfPSGOq5UL4Al3SZD4XYY96IOIQrH +XGFigGGAkV2LfKSEPNJWaq7g+SiQUr2jc3p8b4Zxde8/+5M127/gotiPddyG2LX 1OnFRnPskgRApGqHjGEcEzzJUTag7Hc+YVH82TMEHZhSDMq6i30k9UnyfXsziZDV 8CrkOpjuSg+YxFv/83bfa1pIoYtFfjGr16mq4muajodnX7+b7My9iv+2Oo2iQM9y DwRUKj7+eap23SEUpi4et6HlNpoF6yJMbt5Ae1k+gTK2DvQ4Cx6n4QJz/I7WC1Wp BdVhvSH8XVppVLtQqODud+VWvLgLerRxUpGRdbS8r5VsnNUJTvaS4YGMpm9616G7 TrgUSSvsyu1lLqbWMh+pOCk4l3r64vSUn581hrIw6jtioNGvMdE= =tUuj -----END PGP SIGNATURE----- Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "These are all the driver updates for SoC specific drivers. There are a couple of subsystems with individual maintainers picking up their patches here: - The reset controller subsystem add support for a few new SoC variants to existing drivers, along with other minor improvements - The OP-TEE subsystem gets a driver for the ARM FF-A transport - The memory controller subsystem has improvements for Tegra, Mediatek, Renesas, Freescale and Broadcom specific drivers. - The tegra cpuidle driver changes get merged through this tree this time. There are only minor changes, but they depend on other tegra driver updates here. - The ep93xx platform finally moves to using the drivers/clk/ subsystem, moving the code out of arch/arm in the process. This depends on a small sound driver change that is included here as well. - There are some minor updates for Qualcomm and Tegra specific firmware drivers. The other driver updates are mainly for drivers/soc, which contains a mixture of vendor specific drivers that don't really fit elsewhere: - Mediatek drivers gain more support for MT8192, with new support for hw-mutex and mmsys routing, plus support for reset lines in the mmsys driver. - Qualcomm gains a new "sleep stats" driver, and support for the "Generic Packet Router" in the APR driver. - There is a new user interface for routing the UARTS on ASpeed BMCs, something that apparently nobody else has needed so far. - More drivers can now be built as loadable modules, in particular for Broadcom and Samsung platforms. - Lots of improvements to the TI sysc driver for better suspend/resume support" Finally, there are lots of minor cleanups and new device IDs for amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape, allwinner, broadcom, and omap" * tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits) optee: Fix spelling mistake "reclain" -> "reclaim" Revert "firmware: qcom: scm: Add support for MC boot address API" qcom: spm: allow compile-testing firmware: arm_ffa: Remove unused 'compat_version' variable soc: samsung: exynos-chipid: add exynosautov9 SoC support firmware: qcom: scm: Don't break compile test on non-ARM platforms soc: qcom: smp2p: Add of_node_put() before goto soc: qcom: apr: Add of_node_put() before return soc: qcom: qcom_stats: Fix client votes offset soc: qcom: rpmhpd: fix sm8350_mxc's peer domain dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226 firmware: qcom: scm: Add support for MC boot address API soc: qcom: spm: Add 8916 SPM register data dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu soc: qcom: socinfo: Add PM8150C and SMB2351 models firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available() soc: aspeed: Add UART routing support soc: fsl: dpio: rename the enqueue descriptor variable soc: fsl: dpio: use an explicit NULL instead of 0 ... |
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Linus Torvalds
|
ff0700f036 |
sound updates for 5.16-rc1
Lots of code development have been see in ASoC side as usual, while the continued development on memalloc helper and USB-audio low- latency support are found in the rest. Note that a few changes in the unusual places like arch/sh are included, which are a part of ASoC DAI format cleanups. ALSA core: - Continued memallloc helper updates and cleanups, now supporting non-coherent and non-contiguous pages - Fixes for races in mixer OSS layer ASoC: - A new version of the audio graph card which supports a wider range of systems - Several conversions to YAML DT bindings - Continuing cleanups to the SOF and Intel code - Move of the Cirrus DSP framework into drivers/firmware to allow for future use by non-audio DSPs - An overhaul of the cs42l42 driver, correcting many problems - DAI format terminology conversions over many drivers for cleanups - Support for AMD Vangogh and Yelow Cap, Cirrus CS35L41, Maxim MAX98520 and MAX98360A, Mediatek MT8195, Nuvoton NAU8821, nVidia Tegra210, NXP i.MX8ULP, Qualcomm AudioReach, Realtek ALC5682I-VS, RT5682S, and RT9120 and Rockchip RV1126 and RK3568 USB-audio: - Continued improvements on low-latency playback - Quirks for Pioneer devices, Line6 HX-Stomp XL, Audient iD14 HD-audio: - Reduce excessive udelay() calls on Intel platforms; this should reduce the CPU load with PulseAudio - Quirks for HP and Clevo laptops FireWire: - Support for meter information on MOTU -----BEGIN PGP SIGNATURE----- iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAmGCYqkOHHRpd2FpQHN1 c2UuZGUACgkQLtJE4w1nLE9JDQ//bjjRIVH+JmvhNgLJgJdtdpidaplKUtimEsWk 8/bFJT0lqPjGMz43bALaj4UTvO2N39ZIW8FVmHDVGh54Xuw8Qu+M/NKiD3J2p4xO Pc2rljsiJr7G2VfcBEyDb74wF4fdiFqe6N8PsIT2EG7GxhZiZ6i4+7sdpKoXqmgv 9ltUzPrtIQQva8c0ER+xHNG1sYVX0bh9vzRIA1aEosYmCPqMIatFBocqwT6fM4Ls Ko3GK3GBOnlfVoN+O/ZOsR6Lv6XYApUyp2HqCSrnZK1KvVY4ptYP8XLVwPdEi3OX 5l0oilOvAch2KIj++K2yzk+xpoEQZ/MIO/1eehLN2ioWyayUNNbeHM0fl3dmdLUQ Gow8DbA9o63auERTt6qJs6ed7KOmXewKT9IKiSK6f991JaD0n7nCbcw6yRx1OqWA CafXVIVW1CsqTGJuMZzdzBvBZ2ex9OpdhpUw2v12vf2OXKQax9WsfJjVL+qmA0PC zbb6viwRKLhAYzoPh/pdHOLm2cvRvdJZstnW8w5+52g96LEF9v4bale7aPi4bqdi 0o5l/0VGjiXjicT2tf/x8WhuExqPSA64L21adshZ0vmSrPmaGJb6IX4j4zd9TW5L v3xUUyKRmq3j7fYN2fN2hGh2qGq+EcdcfNyWOj2XrJm+JFB50/Ac1hcYd5WIZKrh xn1luaw= =UBNY -----END PGP SIGNATURE----- Merge tag 'sound-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "Lots of code development have been see in ASoC side as usual, while the continued development on memalloc helper and USB-audio low- latency support are found in the rest. Note that a few changes in the unusual places like arch/sh are included, which are a part of ASoC DAI format cleanups. ALSA core: - Continued memalloc helper updates and cleanups, now supporting non-coherent and non-contiguous pages - Fixes for races in mixer OSS layer ASoC: - A new version of the audio graph card which supports a wider range of systems - Several conversions to YAML DT bindings - Continuing cleanups to the SOF and Intel code - Move of the Cirrus DSP framework into drivers/firmware to allow for future use by non-audio DSPs - An overhaul of the cs42l42 driver, correcting many problems - DAI format terminology conversions over many drivers for cleanups - Support for AMD Vangogh and Yelow Cap, Cirrus CS35L41, Maxim MAX98520 and MAX98360A, Mediatek MT8195, Nuvoton NAU8821, nVidia Tegra210, NXP i.MX8ULP, Qualcomm AudioReach, Realtek ALC5682I-VS, RT5682S, and RT9120 and Rockchip RV1126 and RK3568 USB-audio: - Continued improvements on low-latency playback - Quirks for Pioneer devices, Line6 HX-Stomp XL, Audient iD14 HD-audio: - Reduce excessive udelay() calls on Intel platforms; this should reduce the CPU load with PulseAudio - Quirks for HP and Clevo laptops FireWire: - Support for meter information on MOTU" * tag 'sound-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (513 commits) ALSA: usb-audio: Add quirk for Audient iD14 ALSA: hda/realtek: Add quirk for Clevo PC70HS ALSA: usb-audio: Line6 HX-Stomp XL USB_ID for 48k-fixed quirk ALSA: usb-audio: Add registration quirk for JBL Quantum 400 ASoC: rsnd: Fix an error handling path in 'rsnd_node_count()' ASoC: tlv320aic3x: Make aic3x_remove() return void ASoC: Intel: soc-acpi: use const for all uses of snd_soc_acpi_codecs ASoC: Intel: soc-acpi-cht: shrink tables using compatible IDs ASoC: Intel: soc-acpi-byt: shrink tables using compatible IDs ASoC: Intel: sof_rt5682: use comp_ids to enumerate rt5682s ASoC: Intel: sof_rt5682: detect codec variant in probe function ASoC: soc-acpi: add comp_ids field for machine driver matching ASoC: mediatek: mt8195: add mt8195-mt6359-rt1011-rt5682 bindings document ASoC: mediatek: mt8195: add machine driver with mt6359, rt1011 and rt5682 ASoC: Stop dummy from overriding hwparams ASoC: topology: Change topology device to card device ASoC: topology: Use correct device for prints ASoC: topology: Check for dapm widget completeness ASoC: topology: Add header payload_size verification ASoC: core: Remove invalid snd_soc_component_set_jack call ... |
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Arnd Bergmann
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64954d19e0 |
Samsung SoC drivers changes for v5.16
1. Convert Exynos ChipID and ASV driver to a module and make it a default, instead of selected. The driver is not essential, so it could be disabled, if needed. 2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV driver. 3. Get rid of HAVE_S3C_RTC because it was adding just another layer instead of direct dependencies. 4. Minor cleanups. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmF3zFcQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1wXED/9VSIwfegbhUkfa9yCetdt8dDrjINAUuZ89 FZsplj7BdFJVra7KxjZ6WSWqT5bBVF804mPQKi/filUvuZLr8oOVc/BCdARPMqxq 3rui2xiXvUgDWfJmqFEaVhTTChKAK2NKMgC+aGB0Ah3PK9QbO9fG+E1IcOBLIEUQ bQH77+GH4rG8/INWdrqmL7LrJUkOyUsCgK3IxGh08m6nRgn8Xfwk1Y0UPpeGgQTs 66CnmIgBiN3+w0MeFClHpLXokBnSSFwrtITrwLILffAO18EEFaaErSZhSyge4tdu WwH9no+mcp8gpV7mU/b4rAhNVqn6LIldGrk3O6H9Pm9RJj1ITsLYdTXEpUKErXma g3ZloSyQ/zMUAM3K6rMHYg92Z8pUTnbkbYI6hoCgPGmrHIIRIhIjbjafBHuFZuhL aeLUCcPxGv3tETjmDaSscHDJ+kVtCyArAoggDbPzWr8V7IO8OmMecxTfYJEKPelM CH0uvIBHgXRtSF091XbrJ8vXy/GZSWZJH5CrQmeY/HqE+iJFAYXGj53fohGlOu7m t0OsCnnX/eaCRFPtg6yUfGbiJ3xjdyTvA6ffn7c4Eel4tezy3HnGIaIjA/QI2KVa J18YWZDMGxeQpofuTo8wpCZiUZo/6zlVb3zh9vyRvf1gR06Ln8y5Kb+SAna+EvTj YDxiCGYwIg== =ZJb8 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmF4G7MACgkQmmx57+YA GNk7ug//Y69NRwLTxnZSY5mX88SegROm4oARW8+hZLA3XGmpZuZsNBzc709p/64B Ba/AKIILWKzY4kp5gdT+u02JYoPNVYGuq0SQ1F/Owj7ojAQkBKpwlvDARCIWIFN0 4HohEU6eO1XOm3aUqKYsGfZxk53ECnx3IP5vxSVkTUGOSQKNQAsqIKG+bfYM3J/4 AsMFwm7aMHxgBqAxk3ZTPeqAl2JLH5+7uIcZHRWqt9wCiPMWXLSVbKpW79xPHCHC eaRw6je+HI4MwZjNSqdmaiP/4WCnKGowiq0OGnkv9vcH4GykT9a6qS3pTL50rLom lHov9WbNXGP+wFYMWLn9f8fyLwFmdNmOFvkQT6IX2H4a6VlceMqx6HfAKzeAr6fX 6ck6/t8gjF/s9rXpR08sBDpefXLxp7nYZSsFMNesVRCD+h+JciC3pnUw+YgUpcRb GK4AoaxHbaIJy94OzARGECOP7fzXfVFBrMHgYucWOeVvX1W7JX0eyDKOAkWF4W+J R+af/7HIcNtB1bXFpxL6Njeyyf2B4a8qncMlLTtJ7r5DX5oU7T8KRngzD4kCvnkP gjkBzY1+41/K9RCII6L05miNc36ATf/07bQx4e1F2L9/1RzGnjIl8OxN5OVs89y0 CvplsgtlYgnGccNbpChO0r4IaR7UWYTDPulXkEdNE+jJxuTYvwI= =y2Ab -----END PGP SIGNATURE----- Merge tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers Samsung SoC drivers changes for v5.16 1. Convert Exynos ChipID and ASV driver to a module and make it a default, instead of selected. The driver is not essential, so it could be disabled, if needed. 2. Add support for Exynos850 and Exynos Auto v9 to Exynos ChipID and ASV driver. 3. Get rid of HAVE_S3C_RTC because it was adding just another layer instead of direct dependencies. 4. Minor cleanups. * tag 'samsung-drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: soc: samsung: exynos-chipid: add exynosautov9 SoC support rtc: s3c: remove HAVE_S3C_RTC in favor of direct dependencies soc: samsung: exynos-chipid: Add Exynos850 support dt-bindings: samsung: exynos-chipid: Document Exynos850 compatible soc: samsung: exynos-chipid: Pass revision reg offsets soc: samsung: pm_domains: drop unused is_off field arm64: exynos: don't have ARCH_EXYNOS select EXYNOS_CHIPID soc: samsung: exynos-chipid: do not enforce built-in soc: samsung: exynos-chipid: convert to a module soc: samsung: exynos-chipid: avoid soc_device_to_device() soc: samsung: exynos-pmu: Fix compilation when nothing selects CONFIG_MFD_CORE Link: https://lore.kernel.org/r/20211026094709.75692-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Sam Protsenko
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c072c4ef7e |
soc: samsung: exynos-chipid: Pass revision reg offsets
Old Exynos SoCs have both Product ID and Revision ID in one single register, while new SoCs tend to have two separate registers for those IDs. Implement handling of both cases by passing Revision ID register offsets in driver data. Previously existing macros for Exynos4210 (removed in this patch) were incorrect: #define EXYNOS_SUBREV_MASK (0xf << 4) #define EXYNOS_MAINREV_MASK (0xf << 0) Actual format of PRO_ID register in Exynos4210 (offset 0x0): [31:12] Product ID [9:8] Package information [7:4] Main Revision Number [3:0] Sub Revision Number This patch doesn't change the behavior on existing platforms, so '/sys/devices/soc0/revision' will show the same string as before. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Henrik Grimler <henrik@grimler.se> Link: https://lore.kernel.org/r/20211014133508.1210-1-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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Shawn Guo
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78b727d028 |
clk: qcom: smd-rpm: Add QCM2290 RPM clock support
Add support for RPM-managed clocks on the QCM2290 platform. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Link: https://lore.kernel.org/r/20210917030434.19859-4-shawn.guo@linaro.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Arnd Bergmann
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936fc53f3d |
Qualcomm driver updates for v5.16
This drops the use of power-domains for exposing the load_state from the QMP driver to clients, to avoid issues related to system suspend. SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up Linux from suspend to perform recovery. It adds RPM power-domain support for SM6350 and MSM8953 and base RPM support for MSM8953 and QCM2290. It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which will enable the introduction of proper voltage scaling of the CPU subsystem. Support for releasing secondary CPUs on MSM8226 is introduced. The Asynchronous Packet Router (APR) driver is extended to support the new Generic Packet Router (GPR) variant, which is used to communicate with the firmware in the new AudioReach audio driver. Lastly it transitions a number of drivers to safer string functions, as well as switching things to use devm_platform_ioremap_resource(). -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFlxugbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F3A0P/ixLiu0XktPOyFZ+3Ag/ 5KKan6wlH8JO0AfxbOolk0MkC1/8uk1V+Kuw4b/22jTO4w/9Illi9jSmV0wR3IBh 26sWpyxNK7N+7uAnBDqlZekQYTg5xKqJGn69kxe0oIm8yAogGkxZnlIWt7JGtWS0 NcyLLe9gS/B/q6ppTkxlYhSMB3Qp6bU/lRjBWTcHlxaNxGyNbGw4zp5ncze8ui9R s0JdFhJ/T1ptuWuIhrEWXEVapQtf0pgPvYSWxRYoBRU4N1F4HcRcLVpUU6eSvFEg BKxN11dCW4o0njLBpdPtg3u7AL31A95OPFiVwpWEb6Wov1DAdQYfYSoc7r2uqKvL QgvE/Fq1uPNPsFH2AgJjmku7nb2S0UP2msIhsZjugwxCQXtHgv2uPdYSN/MOudEZ MdjbbAHKW9+TR4gTVzA7b7OVzB73+tjHo/4hUjy8J5RlRKujbzHHXLRjvpNAILqn y457eUFqYxR1C3CKy2GrgR/PvNcBdDVq0ikuv4elYZEIaPL/Wxg6V7RJSHzgAgU/ 7XArrGvCXdLXy/e07KJ4Su74OBOsXnqLLr+Xsw5+h42XCnDfmI3caQlQjTXxJxN4 EifHOoPCa8JNtXzWKSBSO7Pb5teSYh5XlAQs8nGVbrKMhly/MDLeNzSL+uu8DGNw B9Cf/mM9bhs3Q69Z37WgOdK0 =FE4j -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFnQuMACgkQmmx57+YA GNk90g/9F5Sh8wfMQ3WYZMu10L431dXYKkafccK8SFgNhTxTuJ7xPbJzXxFQW6Qp Ky0DAKcJB/tW/jCMh7L/d7pET4tedRncZd6Pk8kkn8uRC9qiTEFyPKP+4trADnhw Q/gf8xbEJz13aDzFbfW2Ko9Rx0HJQ/BSWVzZ5fpkUmoSSBnxm+rq9T3e10BNX1QT /Bg1M77zyYWtlPKexjxBEz7EZuQIEmN9gkCCriYTMw34hfVYszsNkIZnIGfe/wAa F6iSjIwVqf4DbM6QzabNoCUzZf50Ij4Vdlhvk5FUt3quPIvcULzIxQxI3o/J5sJ2 2mowPuiVjmqx4R8XFILod0+KU4NNUGcb2YFLZg+XjbopArfLZaa2OV40m2QDY/Ay /BHXBtxLDDcDqwOX6Y7NEfbNFUqLlFv00vuZEJ9KT/19ZfJgCw4qoxw44aldjQEo 3pvEACOHLKoI+FOeb6LHL0erfc1jz/qul37oWI361rDIfWsWsZtbyc+gItMDLGYa C1qUHoP5vMmse0tILT6AJNR23aGJFapKkzTNWB6j5Pi/0sdv3zGbhxubf+TxMRtx 5BhEP2N5pHdKVopxVSG2JVOtT12jE68tV0E00erEoPIG35C+DyADn5i9lg4g20Ix MwxwtgAC0cws8tpwsDvFOCj8SPn9HDtEGMJMejo5xuEIxqjAb2E= =LLU7 -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.16 This drops the use of power-domains for exposing the load_state from the QMP driver to clients, to avoid issues related to system suspend. SMP2P becomes wakeup capable, to allow dying remoteprocs to wake up Linux from suspend to perform recovery. It adds RPM power-domain support for SM6350 and MSM8953 and base RPM support for MSM8953 and QCM2290. It adds support for MSM8996, SDM630 and SDM660 in the SPM driver, which will enable the introduction of proper voltage scaling of the CPU subsystem. Support for releasing secondary CPUs on MSM8226 is introduced. The Asynchronous Packet Router (APR) driver is extended to support the new Generic Packet Router (GPR) variant, which is used to communicate with the firmware in the new AudioReach audio driver. Lastly it transitions a number of drivers to safer string functions, as well as switching things to use devm_platform_ioremap_resource(). * tag 'qcom-drivers-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (40 commits) soc: qcom: apr: Add GPR support soc: dt-bindings: qcom: add gpr bindings soc: qcom: apr: make code more reuseable soc: dt-bindings: qcom: apr: deprecate qcom,apr-domain property soc: dt-bindings: qcom: apr: convert to yaml dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions dt-bindings: msm/dp: Remove aoss-qmp header soc: qcom: aoss: Drop power domain support dt-bindings: soc: qcom: aoss: Drop the load state power-domain soc: qcom: smp2p: Add wakeup capability to SMP2P IRQ dt-bindings: power: rpmpd: Add SM6350 to rpmpd binding dt-bindings: soc: qcom: aoss: Add SM6350 compatible soc: qcom: llcc: Disable MMUHWT retention soc: qcom: smd-rpm: Add QCM2290 compatible dt-bindings: soc: qcom: smd-rpm: Add QCM2290 compatible firmware: qcom_scm: Add compatible for MSM8953 SoC dt-bindings: firmware: qcom-scm: Document msm8953 bindings soc: qcom: pdr: Prefer strscpy over strcpy soc: qcom: rpmh-rsc: Make use of the helper function devm_platform_ioremap_resource_byname() soc: qcom: gsbi: Make use of the helper function devm_platform_ioremap_resource() ... Link: https://lore.kernel.org/r/20211012173442.1017010-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Anders Roxell
|
6312d52838 |
marvell: octeontx2: build error: unknown type name 'u64'
Building an allmodconfig kernel arm64 kernel, the following build error
shows up:
In file included from drivers/crypto/marvell/octeontx2/cn10k_cpt.c:4:
include/linux/soc/marvell/octeontx2/asm.h:38:15: error: unknown type name 'u64'
38 | static inline u64 otx2_atomic64_fetch_add(u64 incr, u64 *ptr)
| ^~~
Include linux/types.h in asm.h so the compiler knows what the type
'u64' are.
Fixes:
|
||
Geetha sowjanya
|
af3826db74 |
octeontx2-pf: Use hardware register for CQE count
Current driver uses software CQ head pointer to poll on CQE header in memory to determine if CQE is valid. Software needs to make sure, that the reads of the CQE do not get re-ordered so much that it ends up with an inconsistent view of the CQE. To ensure that DMB barrier after read to first CQE cacheline and before reading of the rest of the CQE is needed. But having barrier for every CQE read will impact the performance, instead use hardware CQ head and tail pointers to find the valid number of CQEs. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
||
Bjorn Andersson
|
f27591125a |
v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org
This immutable branch is based on v5.15-rc1 and contains the following patches extending the existig APR driver to also implement GPR: 20210927135559.738-2-srinivas.kandagatla@linaro.org 20210927135559.738-3-srinivas.kandagatla@linaro.org 20210927135559.738-4-srinivas.kandagatla@linaro.org 20210927135559.738-5-srinivas.kandagatla@linaro.org 20210927135559.738-6-srinivas.kandagatla@linaro.org -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFSiE4bHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNV0P/1R/t0Dfj+vJg8SarPPg u/2LbLBAhFfn0WoVJgdYmpW3lG3kxG+z7I4s5gDdKCrKeyj//jJReRVwkgG4QxNs NgSAd24o/afb4/jcNTlmbhIyo+k9gsU5rxw7AynwRkLOyfNG71sytEH/1LvzBj1F X5AVQlzEnTsclVlwK3n9ZSm3cKiwgyFnqBLZs+e199FVjJgFGk6WDPplWPo50+hz pYImAVPGRbwSGH6cR2M4JSwpU/GJzFAAZf5Y8GrEBQVyhiQeKvYV7UNPjbNt15tv qI8Xfa5xbgAFunRC6GsjpaffTmCzHJKYgikchbIKre906IYBLwDHTnxvtXXDgBVe Zrd0jFQIrtuHseLQkvaEiVuuzmFibm/atdMUWCyncdunl2fuwTS60hCG+mRd7Pz2 B85HmcAfS7LTu+dkn4doG4zVHO/JVpYr2eZExb1wxY0Kyz+5KDsESqUCB+7c6wya rGqsC+LX8l0MjunxSJbZUcuQLLcaFN9AXJTB6a0gPk+VLZH7EutkG98SonYU07w/ Wff0bwVQWk3I4QHf0NaS5Ikbcx8KAv1ZaqcUaL2pPYNtIamkiyJdH6f+4C0q+K6n aMcLNLzaRcVayHO88SG3XpDLNc+cR2f/rehAkghxXJ8jhdtV5HSb5HLKgu+Lf8q4 hEBzBQLYeRFJM1TuaZL02aXw =r7vf -----END PGP SIGNATURE----- Merge tag '20210927135559.738-6-srinivas.kandagatla@linaro.org' into drivers-for-5.16 v5.15-rc1 + 20210927135559.738-[23456]-srinivas.kandagatla@linaro.org This immutable branch is based on v5.15-rc1 and contains the following patches extending the existig APR driver to also implement GPR: 20210927135559.738-2-srinivas.kandagatla@linaro.org 20210927135559.738-3-srinivas.kandagatla@linaro.org 20210927135559.738-4-srinivas.kandagatla@linaro.org 20210927135559.738-5-srinivas.kandagatla@linaro.org 20210927135559.738-6-srinivas.kandagatla@linaro.org |
||
Srinivas Kandagatla
|
ec1471a898 |
soc: qcom: apr: Add GPR support
Qualcomm Generic Packet router aka GPR is the IPC mechanism found in AudioReach next generation signal processing framework to perform command and response messages between various processors. GPR has concepts of static and dynamic port, all static services like APM (Audio Processing Manager), PRM (Proxy resource manager) have fixed port numbers where as dynamic services like graphs have dynamic port numbers which are allocated at runtime. All GPR packet messages will have source and destination domain and port along with opcode and payload. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210927135559.738-6-srinivas.kandagatla@linaro.org |
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Srinivas Kandagatla
|
99139b80c1 |
soc: qcom: apr: make code more reuseable
APR and other packet routers like GPR are pretty much same and interact with other drivers in similar way. Ex: GPR ports can be considered as APR services, only difference is they are allocated dynamically. Other difference is packet layout, which should not matter with the apis abstracted. Apart from this the rest of the functionality is pretty much identical across APR and GPR. Make the apr code more reusable by abstracting it service level, rather than device level so that we do not need to write new drivers for other new packet routers like GPR. This patch is in preparation to add GPR support to this driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210927135559.738-4-srinivas.kandagatla@linaro.org |
||
Deepak Kumar Singh
|
8c75d585b9 |
soc: qcom: aoss: Expose send for generic usecase
Not all upcoming usecases will have an interface to allow the aoss driver to hook onto. Expose the send api and create a get function to enable drivers to send their own messages to aoss. Signed-off-by: Chris Lew <clew@codeaurora.org> Signed-off-by: Deepak Kumar Singh <deesin@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1630420228-31075-2-git-send-email-deesin@codeaurora.org |
||
Yongqiang Niu
|
cb19c10797 |
soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4
This patch add some more ddp component OVL_2L2 is ovl which include 2 layers overlay POSTMASK control round corner for display frame RDMA4 read dma buffer Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/1627894773-23872-2-git-send-email-yongqiang.niu@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
||
Linus Torvalds
|
626bf91a29 |
Networking stragglers and fixes for 5.15-rc1, including changes from netfilter,
wireless and can. Current release - regressions: - qrtr: revert check in qrtr_endpoint_post(), fixes audio and wifi - ip_gre: validate csum_start only on pull - bnxt_en: fix 64-bit doorbell operation on 32-bit kernels - ionic: fix double use of queue-lock, fix a sleeping in atomic - can: c_can: fix null-ptr-deref on ioctl() - cs89x0: disable compile testing on powerpc Current release - new code bugs: - bridge: mcast: fix vlan port router deadlock, consistently disable BH Previous releases - regressions: - dsa: tag_rtl4_a: fix egress tags, only port 0 was working - mptcp: fix possible divide by zero - netfilter: nft_ct: protect nft_ct_pcpu_template_refcnt with mutex - netfilter: socket: icmp6: fix use-after-scope - stmmac: fix MAC not working when system resume back with WoL active Previous releases - always broken: - ip/ip6_gre: use the same logic as SIT interfaces when computing v6LL address - seg6: set fc_nlinfo in nh_create_ipv4, nh_create_ipv6 - mptcp: only send extra TCP acks in eligible socket states - dsa: lantiq_gswip: fix maximum frame length - stmmac: fix overall budget calculation for rxtx_napi - bnxt_en: fix firmware version reporting via devlink - renesas: sh_eth: add missing barrier to fix freeing wrong tx descriptor Stragglers: - netfilter: conntrack: switch to siphash - netfilter: refuse insertion if chain has grown too large - ncsi: add get MAC address command to get Intel i210 MAC address Signed-off-by: Jakub Kicinski <kuba@kernel.org> -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE6jPA+I1ugmIBA4hXMUZtbf5SIrsFAmE3uicACgkQMUZtbf5S IrtJVA//XdE8qAmw1JukjyYC87JH2ale20eoZ6ERn7/09e4tdv3M6dOTI4YfrM6+ CMNP5MP2qit3IzY+lN0+yt9AAFH7k85z3MA8zLxsXN4z63OJcZvFv/G/OWy4Wp/0 vOo/DH+rF3LR+fZZvjJI+8Xi9/orsRpD12cwGmjGRxybh+XcnHKI/GvK2RgE6oBR 015RfBbbQBpzFQvESLnSwDzabN1XFEL1x/bz7N8ek3okfO/tab+f3E1tb6eYtTy+ jyDyOWpayd4xDttKNMUuxwS1q+/oAWOAq8PzkaF/ZG2sBH1Z4yZN9ZtsLNZmPG8N 5L1FEem/Nmgr54T9v/FhfiryhhGGysVfVgtQcCBkKRmVn1Kk2L6dFvtuanPtFFd3 llbi5PvCDJy3rbMmxKmyoM3T4jpMwWxQRZKsosw+k/WQfb8/SUOjgpY713V1Wx/P S+2uadU4l9Ql9sF6X0IqZABnnt+j/BuDo6C6vVq7vyj0iQ9hEX9YxC0ybrAHOYpH suHWKndodRfTxxVOg8xRNYwXyRLNbm1AP6LMDNKBlFUjwNSZ362qFX7W7DuXoRup Rrnb8V1QFvM+pyFb2a0qNtBS68IXbjCdVQX5e8a5ELaAUnDPefNrfPN+/rrTLEtV LnusmBF+02llVSYdr88t1e+LmzqS/aqXFy2ry4y6owjq20ld2O0= =Zvuz -----END PGP SIGNATURE----- Merge tag 'net-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes and stragglers from Jakub Kicinski: "Networking stragglers and fixes, including changes from netfilter, wireless and can. Current release - regressions: - qrtr: revert check in qrtr_endpoint_post(), fixes audio and wifi - ip_gre: validate csum_start only on pull - bnxt_en: fix 64-bit doorbell operation on 32-bit kernels - ionic: fix double use of queue-lock, fix a sleeping in atomic - can: c_can: fix null-ptr-deref on ioctl() - cs89x0: disable compile testing on powerpc Current release - new code bugs: - bridge: mcast: fix vlan port router deadlock, consistently disable BH Previous releases - regressions: - dsa: tag_rtl4_a: fix egress tags, only port 0 was working - mptcp: fix possible divide by zero - netfilter: nft_ct: protect nft_ct_pcpu_template_refcnt with mutex - netfilter: socket: icmp6: fix use-after-scope - stmmac: fix MAC not working when system resume back with WoL active Previous releases - always broken: - ip/ip6_gre: use the same logic as SIT interfaces when computing v6LL address - seg6: set fc_nlinfo in nh_create_ipv4, nh_create_ipv6 - mptcp: only send extra TCP acks in eligible socket states - dsa: lantiq_gswip: fix maximum frame length - stmmac: fix overall budget calculation for rxtx_napi - bnxt_en: fix firmware version reporting via devlink - renesas: sh_eth: add missing barrier to fix freeing wrong tx descriptor Stragglers: - netfilter: conntrack: switch to siphash - netfilter: refuse insertion if chain has grown too large - ncsi: add get MAC address command to get Intel i210 MAC address" * tag 'net-5.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (76 commits) ieee802154: Remove redundant initialization of variable ret net: stmmac: fix MAC not working when system resume back with WoL active net: phylink: add suspend/resume support net: renesas: sh_eth: Fix freeing wrong tx descriptor bonding: 3ad: pass parameter bond_params by reference cxgb3: fix oops on module removal can: c_can: fix null-ptr-deref on ioctl() can: rcar_canfd: add __maybe_unused annotation to silence warning net: wwan: iosm: Unify IO accessors used in the driver net: wwan: iosm: Replace io.*64_lo_hi() with regular accessors net: qcom/emac: Replace strlcpy with strscpy ip6_gre: Revert "ip6_gre: add validation for csum_start" net: hns3: make hclgevf_cmd_caps_bit_map0 and hclge_cmd_caps_bit_map0 static selftests/bpf: Test XDP bonding nest and unwind bonding: Fix negative jump label count on nested bonding MAINTAINERS: add VM SOCKETS (AF_VSOCK) entry stmmac: dwmac-loongson:Fix missing return value iwlwifi: fix printk format warnings in uefi.c net: create netdev->dev_addr assignment helpers bnxt_en: Fix possible unintended driver initiated error recovery ... |
||
Geetha sowjanya
|
ef6c8da71e |
octeontx2-pf: cn10K: Reserve LMTST lines per core
This patch reserves the LMTST lines per cpu instead of separate LMTST lines for NPA(buffer free) and NIX(sqe flush). LMTST line of the core on which SQ or RQ is processed is used for LMTST operation. This patch also replace STEOR with STEORL release semantics and updates driver name in ethtool file. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
||
Martin Botka
|
edeb2ca747 |
clk: qcom: smd: Add support for SM6125 rpm clocks
Add rpm smd clocks, PMIC and bus clocks which are required on SM6125 for clients to vote on. Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210730215924.733350-2-martin.botka@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
||
Linus Torvalds
|
6e207b8821 |
ARM: SoC changes for 5.14
A few SoC (code) changes have queued up this cycle, mostly for minor changes and some refactoring and cleanup of legacy platforms. This branch also contains a few of the fixes that weren't sent in by the end of the release (all fairly minor). - Adding an additional maintainer for the TEE subsystem (Sumit Garg) - Quite a significant modernization of the IXP4xx platforms by Linus Walleij, revisiting with a new PCI host driver/binding, removing legacy mach/* include dependencies and moving platform detection/config to drivers/soc. Also some updates/cleanup of platform data. - Core power domain support for Tegra platforms, and some improvements in build test coverage by adding stubs for compile test targets. - A handful of updates to i.MX platforms, adding legacy (non-PSCI) SMP support on i.MX7D, SoC ID setup for i.MX50, removal of platform data and board fixups for iMX6/7. ... and a few smaller changes and fixes for Samsung, OMAP, Allwinner, Rockchip. -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDojiQPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3Z+kQAJofM2XXE3eHoIGINp+XuYZHCAdTxpIJfhsQ KPt4dzaxq0eBhrD8PICelJ2ymWz4c3sO2z+v79zQfOJdutnFKWTCRstqW8qdq9cE vzYh5pDJy0VmLkYSX/PzvfTLUQDM+Cx0sH/8e2gRwCC/F5tXolLA8lcqWQg9LnlC 5joLOm2WL2uHDgPFZLR6Y1m0KabvUMMpYx6ji9EUx4qtc0VgRMRTSZkRZK4E1PU+ ls175pPZxQfmTyFuHGc1L6KrfnHry8+YX/61sMlBfi96itMnBi05PcxljH8hMkQ8 IVfqPYVnI2vX37f8MhcX4Wec8pKQ9SZqT9mbADGEG23XfZppT5cp7pJUACoZ/wJ5 MMXn99hsEI0NO/gswKr2ZCCskydWrwOqhzubxZrYQtyFt38Sgs+mMLYxyQJKztbZ Laz+JBYKsvIlRctt+fArLp79EJx+CpSUpcha5Q0dQUmz3GWApPpS/6nMiNkq1Myv aByG9HXjOpRI5IiaOi7Fv/m/i+TsO43boNFerUIqPYi2AxmM9D8M2sJcyWHVwQRK glSAjISbp0GHAzVPM5JzhGIrCu4xC5Hf09Q+0OP6c3YVylwKNMurJCjCCql+ft8I Z41WVglS4xO5Y/qiWi+5pzg7/+VESBcsFn6PA5AJAAsDGgU5WHHXhI5kO7eUFAK9 nuIbtqUS =b6Jo -----END PGP SIGNATURE----- Merge tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Olof Johansson: "A few SoC (code) changes have queued up this cycle, mostly for minor changes and some refactoring and cleanup of legacy platforms. This branch also contains a few of the fixes that weren't sent in by the end of the release (all fairly minor). - Adding an additional maintainer for the TEE subsystem (Sumit Garg) - Quite a significant modernization of the IXP4xx platforms by Linus Walleij, revisiting with a new PCI host driver/binding, removing legacy mach/* include dependencies and moving platform detection/config to drivers/soc. Also some updates/cleanup of platform data. - Core power domain support for Tegra platforms, and some improvements in build test coverage by adding stubs for compile test targets. - A handful of updates to i.MX platforms, adding legacy (non-PSCI) SMP support on i.MX7D, SoC ID setup for i.MX50, removal of platform data and board fixups for iMX6/7. ... and a few smaller changes and fixes for Samsung, OMAP, Allwinner, Rockchip" * tag 'arm-soc-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (53 commits) MAINTAINERS: Add myself as TEE subsystem reviewer ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device" hw_random: ixp4xx: Add OF support hw_random: ixp4xx: Add DT bindings hw_random: ixp4xx: Turn into a module hw_random: ixp4xx: Use SPDX license tag hw_random: ixp4xx: enable compile-testing pata: ixp4xx: split platform data to its own header soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h PCI: ixp4xx: Add a new driver for IXP4xx PCI: ixp4xx: Add device tree bindings for IXP4xx ARM/ixp4xx: Make NEED_MACH_IO_H optional ARM/ixp4xx: Move the virtual IObases MAINTAINERS: ARM/MStar/Sigmastar SoCs: Add a link to the MStar tree ARM: debug: add UART early console support for MSTAR SoCs ARM: dts: ux500: Fix LED probing ARM: imx: add smp support for imx7d ARM: imx6q: drop of_platform_default_populate() from init_machine arm64: dts: rockchip: Update RK3399 PCI host bridge window to 32-bit address memory soc/tegra: fuse: Fix Tegra234-only builds ... |
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Olof Johansson
|
95ef715236 |
This is a major chunk of IXP4xx modernization:
- Fist we move some registers around to make room for the predetermined PCI I/O space. - Then we add some Kconfig options to make it possible to use the old PCI driver in parallell with the new shiny one. - Then we add the new PCI driver and some bindings for it. - On top of this we add an (ages old) patch from Arnd that centralize the CPU/SoC detection in drivers/soc and make the header a standard Linux header to avoid the <mach/*> business in drivers. - Then we split out and modernize some platform data headers for pata, and hwrandom, and top it up with DT bindings and support for hwrandom. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmDMWhIACgkQQRCzN7AZ XXMCeA/8C3EquNZgRZkzrEUvX2Einr0djZvu/vQZkn1cybusNQxeRTupyZH2eQYG DzvDq+lGe/1gK72fnBSlaNRr4RunBCGDEt7pmbYPnSIuQk9YckhCtvWX6ZVjzEe/ lY/H+zW7vWO+kajNffjRs8/Ovhlku+1VgN4+EpkHiW1UfYzdWAVRBn2s3JY5O4ht 1ONMJu7/myy5yE+fyNfGt5iBCE4Tj2VNuOVFdyijv07GwupndZ+xbnDqTlFmdbw0 qLaoumWSvSAhOlJHDINqfdeNJ3NXVrHejcrLERvDSn+UbqNV6+NYhAncDb+JV5Nn oZS5masrAOTbZHv9MGfVt3baQukDixYCvx7f/Qg3BUODkOJcUZWT8+ShRuLMrFfL d4uC/QKWkTbO1XOGzn3I/6Co25jC0FjLPk87AZ25i7q410gralHQwad9BmJWE1ZH vvQVvbE5ZELyFF13nGkk/m4cY3u07BGnLV24MbByZpUCyEE5M1X2jujBFtofacPC MxcJDVgewrlsgAeZVjrMW2XCFhYgU6fKLQyc80L2BHWMBI/6t7BcaaK3g+s9thOI 19X2smU4QRXLmC8fa7IkiQv0q8J288xTBbP+N9RgZF/9FUT4BPXQNTgRueMZjfm3 HcbKh+lsG1wtGqxHlK+7L4VCx+MjyQAFUVLHSKt0uu2q6vElFSQ= =k/Rp -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAmDT5DwPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3fJ0P/3R3Eyxo7W+sUZzDDkVuHIGQ+D2Yj2SLsNF+ hCoXlADnD37Zgjw4hEp3nW3ZuoRDH2MqhU//oMFfUScXh0giHbjaSsQRQextoo3u kqReKRrhU7r9KSuAloml8YXTCiBCYkHEQQ7BtMuInyJRYmIlBSUV9GpiMXGY4MOO Z4orN5OGio4S9VZ3hvN5efKJnqjbKvKzgXDGaHuXqEHFXpXX9gH8g/eulxOcUZ8f tfTdW026isqBpW1pGpEqKcyyT4TJmCs1JDx19DHjbaeVAV9vOvS2UF7xC+6nYGEA 7PQwRMxZGMdSP/YZ8HsbHKoAHh3/3rwc0BpjlnQcnW/2l52sQM4hrbsd0vjL7zap S7qTIlPWEK0glbFQccXVtwmfDauE7G6GxuuAe4+zO4zNeiJyxH9UwXiNvKsRGzSi E1sWSAEy8h8HOvxg4D0am7n/57QYdJLtfvOxgBtmmyx5FnVj64LYtKXSb4k345cn qAbYb/vKJauze046Hll8dxK6JsRuzpjUy/10Q3UnXw580GeNFcHRRGBzDNFKZynZ YlTfd/njEr+qjQA2hE9LxshA/R6M+OyskHuNvGCZ9bPFhbJzTBxfdAPwVqjs6G0h BEL90S6KiURnyEsnYzmHV6nVn5reggIXCdcmPtcCHan+jw4pJ5e/op/dZPytf2Uf Z0iZ4QiN =NWGE -----END PGP SIGNATURE----- Merge tag 'ixp4xx-arm-soc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc This is a major chunk of IXP4xx modernization: - Fist we move some registers around to make room for the predetermined PCI I/O space. - Then we add some Kconfig options to make it possible to use the old PCI driver in parallell with the new shiny one. - Then we add the new PCI driver and some bindings for it. - On top of this we add an (ages old) patch from Arnd that centralize the CPU/SoC detection in drivers/soc and make the header a standard Linux header to avoid the <mach/*> business in drivers. - Then we split out and modernize some platform data headers for pata, and hwrandom, and top it up with DT bindings and support for hwrandom. * tag 'ixp4xx-arm-soc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device" hw_random: ixp4xx: Add OF support hw_random: ixp4xx: Add DT bindings hw_random: ixp4xx: Turn into a module hw_random: ixp4xx: Use SPDX license tag hw_random: ixp4xx: enable compile-testing pata: ixp4xx: split platform data to its own header soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h PCI: ixp4xx: Add a new driver for IXP4xx PCI: ixp4xx: Add device tree bindings for IXP4xx ARM/ixp4xx: Make NEED_MACH_IO_H optional ARM/ixp4xx: Move the virtual IObases Link: https://lore.kernel.org/r/CACRpkdbw6HSpp7k6q1FYGmtafLmdAu8bFnpHQOdfBDYYsdLbkw@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net> |
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Stephan Gerhold
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61d1961adf |
soc: qcom: smem_state: Add devm_qcom_smem_state_get()
It is easy to forget to call qcom_smem_state_put() after a qcom_smem_state_get(). Introduce a devm_qcom_smem_state_get() helper function that automates this so that qcom_smem_state_put() is automatically called when a device is removed. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210618111556.53416-1-stephan@gerhold.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Arnd Bergmann
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09aa9aabdc |
soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h
Generic drivers are unable to use the feature macros from mach/cpu.h or the feature bits from mach/hardware.h, so move these into a global header file along with some dummy helpers that list these features as disabled elsewhere. Cc: David S. Miller <davem@davemloft.net> Cc: Jakub Kicinski <kuba@kernel.org> Cc: netdev@vger.kernel.org Cc: Zoltan HERPAI <wigyori@uid0.hu> Cc: Raylynn Knight <rayknight@me.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Krzysztof Kozlowski
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16b79a1e08 |
soc: samsung: pmu: drop EXYNOS_CENTRAL_SEQ_OPTION defines
The defines for Exynos5 CENTRAL_SEQ_OPTION (e.g. EXYNOS5_USE_STANDBYWFI_ARM_CORE1) are not used. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20210525184716.119663-1-krzysztof.kozlowski@canonical.com |
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Lukas Bulwahn
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8058dfa05a |
soc: qcom: address kernel-doc warnings
The command: find ./include/linux/soc/qcom/ | xargs ./scripts/kernel-doc -none reports: ./include/linux/soc/qcom/qmi.h:26: warning: cannot understand function prototype: 'struct qmi_header ' ./include/linux/soc/qcom/qmi.h:101: warning: cannot understand function prototype: 'struct qmi_response_type_v01 ' ./include/linux/soc/qcom/irq.h:19: warning: expecting prototype for QCOM specific IRQ domain flags that distinguishes the handling of wakeup(). Prototype was for IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP() instead ./include/linux/soc/qcom/apr.h:126: warning: Function parameter or member '__apr_driver' not described in 'module_apr_driver' ./include/linux/soc/qcom/apr.h:126: warning: Excess function parameter '__aprbus_driver' description in 'module_apr_driver' ./include/linux/soc/qcom/llcc-qcom.h:43: warning: cannot understand function prototype: 'struct llcc_slice_desc ' ./include/linux/soc/qcom/llcc-qcom.h:60: warning: cannot understand function prototype: 'struct llcc_edac_reg_data ' ./include/linux/soc/qcom/llcc-qcom.h:86: warning: cannot understand function prototype: 'struct llcc_drv_data ' Address all those warnings by: - prefixing kernel-doc descriptions for structs with the keyword 'struct', - turning a kernel-doc comment that does not follow the kernel-doc syntax into a normal comment, and - correcting a parameter name in a kernel-doc comment. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Link: https://lore.kernel.org/r/20210327065642.11969-3-lukas.bulwahn@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Linus Torvalds
|
d99676af54 |
drm pull for 5.12-rc1
docs: - lots of updated docs core: - require crtc to have unique primary plane - fourcc macro fix - PCI bar quirk for bar resizing - don't sent hotplug on error - move vm code to legacy - nuke hose only used on old oboslete alpha dma-buf: - kernel doc updates - improved lock tracking dp/hdmi: - DP-HDMI2.1 protocol converter support ttm: - bo size handling cleanup - release a pinned bo warning - cleanup lru handler - avoid using pages with drm_prime_sg_to_page_addr_arrays cma-helper: - prime/mmap fixes bridge: - add DP support gma500: - remove gma3600 support i915: - try eDP fast/narrow link again with fallback - Intel eDP backlight control - replace display register read/write macros - refactor intel_display.c - display power improvements - HPD code cleanup - Rocketlake display fixes - Power/backlight/RPM fixes - DG1 display fix - IVB/BYT clear residuals security fix again - make i915 mitigations options via parameter - HSW GT1 GPU hangs fixes - DG1 workaround hang fixes - TGL DMAR hang avoidance - Lots of GT fixes - follow on fixes for residuals clear - gen7 per-engine-reset support - HDCP2.2 + HDCP1.4 GEN12 DP MST support - TGL clear color support - backlight refactoring - VRR/Adaptive sync enabling on DP/EDP for TGL+ - async flips for all ilk+ amdgpu: - rework IH ring handling (Vega/Navi) - rework HDP handling (Vega/Navi) - swSMU updates for renoir/vangogh - Sienna Cichild overdrive support - FP16 on DCE8-11 support - GPU reset on navy flounder/vangogh - SMU profile fixes for APU - SR-IOV fixes - Vangogh SMU fixes - fan speed control fixes amdkfd: - config handling fix - buffer free fix - recursive lock warnings fix nouveau: - Turing MMU fault recovery fixes - mDP connectors reporting fix - audio locking fixes - rework engines/instances code to support new scheme tegra: - VIC newer firmware support - display/gr2d fixes for older tegra - pm reference leak fix mediatek: - SOC MT8183 support - decouple sub driver + share mtk mutex driver radeon: - PCI resource fix for some platforms ingenic: - pm support - 8-bit delta RGB panels vmwgfx: - managed driver helpers vc4: - BCM2711 DSI1 support - converted to atomic helpers - enable 10/12 bpc outputs - gem prime mmap helpers - CEC fix omap: - use degamma table - CTM support - rework DSI support imx: - stack usage fixes - drm managed support - imx-tve clock provider leak fix - rcar-du: - default mode fixes - conversion to managed API hisilicon: - use simple encoder vkms: - writeback connector support d3: - BT2020 support -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJgL1RCAAoJEAx081l5xIa+BxoP/325goULPaGBwUKgVkSl6mTT Ror0r8U3ifQHrqPk57C5b4GfvNuJ8vJZC13GYiiwooPn/+sifbl8haMRQWKyH4fz PThm9vroIQZ8VC+fqixgrOwFKEwkKqucZ3f7dEj8paBVVcO9DcBIaSeO4QW2EAR/ n2r7nHtFxVHYEwiOnJvIeWIh1dAmudr/U6pHyB6PnuofVgqveXHT5+mmkY51pJqF sn2Y+Ye3tP5+FDlKkueg8JUteyFRTGz1g7JQThxSI//b/+p4MmmRX03qcWvIIkOX XiNlP73Ssh7PPMcUgwFmvKbMfm9sfpwf7yX3nqzaAQAHZGufznxX0k50BRkxWyYL eMVxRs5/Vl5JAn3vhspAUZhc4BgOcJm9L4zazb7YqDghwpohSnXk/riunUevqFCf Dgsc8N63nft8WEBk3aB6loRpDDpo5rm8gVpl5LKk1YXT92o9x4eP+/B1+kf2RepM 52H3CKD1GLK3ayJlRNa/ljE2qXaQru+PmjCxORgDPEZ7SXdb8q5bfH0MjCB4vEBp YIybWYIDQzRBKglN5qMQ3XNIgv95oqrxXKaDFFtp8lMEjVG0v+y2antzFHftXS2g Cj0aeyBx4PC3pNbZe54npEhFwVIs7NFXX9brpQnnLJvQj/Qp+GEhf8uqiCUJNnYA AF7qRRL0bBGTeiJGt4nM =TeKl -----END PGP SIGNATURE----- Merge tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "A pretty normal tree, lots of refactoring across the board, ttm, i915, nouveau, and bunch of features in various drivers. docs: - lots of updated docs core: - require crtc to have unique primary plane - fourcc macro fix - PCI bar quirk for bar resizing - don't sent hotplug on error - move vm code to legacy - nuke hose only used on old oboslete alpha dma-buf: - kernel doc updates - improved lock tracking dp/hdmi: - DP-HDMI2.1 protocol converter support ttm: - bo size handling cleanup - release a pinned bo warning - cleanup lru handler - avoid using pages with drm_prime_sg_to_page_addr_arrays cma-helper: - prime/mmap fixes bridge: - add DP support gma500: - remove gma3600 support i915: - try eDP fast/narrow link again with fallback - Intel eDP backlight control - replace display register read/write macros - refactor intel_display.c - display power improvements - HPD code cleanup - Rocketlake display fixes - Power/backlight/RPM fixes - DG1 display fix - IVB/BYT clear residuals security fix again - make i915 mitigations options via parameter - HSW GT1 GPU hangs fixes - DG1 workaround hang fixes - TGL DMAR hang avoidance - Lots of GT fixes - follow on fixes for residuals clear - gen7 per-engine-reset support - HDCP2.2 + HDCP1.4 GEN12 DP MST support - TGL clear color support - backlight refactoring - VRR/Adaptive sync enabling on DP/EDP for TGL+ - async flips for all ilk+ amdgpu: - rework IH ring handling (Vega/Navi) - rework HDP handling (Vega/Navi) - swSMU updates for renoir/vangogh - Sienna Cichild overdrive support - FP16 on DCE8-11 support - GPU reset on navy flounder/vangogh - SMU profile fixes for APU - SR-IOV fixes - Vangogh SMU fixes - fan speed control fixes amdkfd: - config handling fix - buffer free fix - recursive lock warnings fix nouveau: - Turing MMU fault recovery fixes - mDP connectors reporting fix - audio locking fixes - rework engines/instances code to support new scheme tegra: - VIC newer firmware support - display/gr2d fixes for older tegra - pm reference leak fix mediatek: - SOC MT8183 support - decouple sub driver + share mtk mutex driver radeon: - PCI resource fix for some platforms ingenic: - pm support - 8-bit delta RGB panels vmwgfx: - managed driver helpers vc4: - BCM2711 DSI1 support - converted to atomic helpers - enable 10/12 bpc outputs - gem prime mmap helpers - CEC fix omap: - use degamma table - CTM support - rework DSI support imx: - stack usage fixes - drm managed support - imx-tve clock provider leak fix - rcar-du: - default mode fixes - conversion to managed API hisilicon: - use simple encoder vkms: - writeback connector support d3: - BT2020 support" * tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits) drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2) drm/radeon: OLAND boards don't have VCE drm/amdkfd: Fix recursive lock warnings drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth() drm/amd/display: Fix potential integer overflow drm/amdgpu/display: remove hdcp_srm sysfs on device removal drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3 drm/i915/gt: Correct surface base address for renderclear drm/i915: Disallow plane x+w>stride on ilk+ with X-tiling drm/nouveau/top/ga100: initial support drm/nouveau/top: add ioctrl/nvjpg drm/nouveau/privring: rename from ibus drm/nouveau/nvkm: remove nvkm_subdev.index drm/nouveau/nvkm: determine subdev id/order from layout drm/nouveau/vic: switch to instanced constructor drm/nouveau/sw: switch to instanced constructor drm/nouveau/sec2: switch to instanced constructor drm/nouveau/sec: switch to instanced constructor drm/nouveau/pm: switch to instanced constructor drm/nouveau/nvenc: switch to instanced constructor ... |
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Linus Torvalds
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e767b3530a |
ARM: SoC drivers for v5.12
Updates for SoC specific drivers include a few subsystems that have their own maintainers but send them through the soc tree: SCMI firmware: - add support for a completion interrupt Reset controllers: - new driver for BCM4908 - new devm_reset_control_get_optional_exclusive_released() function Memory controllers: - Renesas RZ/G2 support - Tegra124 interconnect support - Allow more drivers to be loadable modules TEE/optee firmware: - minor code cleanup The other half of this is SoC specific drivers that do not belong into any other subsystem, most of them living in drivers/soc: - Allwinner/sunxi power management work - Allwinner H616 support - ASpeed AST2600 system identification support - AT91 SAMA7G5 SoC ID driver - AT91 SoC driver cleanups - Broadcom BCM4908 power management bus support - Marvell mbus cleanups - Mediatek MT8167 power domain support - Qualcomm socinfo driver support for PMIC - Qualcomm SoC identification for many more products - TI Keystone driver cleanups for PRUSS and elsewhere Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmApjS8ACgkQYKtH/8kJ UidDyw/6ArE2RWN1qk3GJbQKdCYQdqH4Ig/Nc9LA977ul2BX/BohYoEGCoveH5cG 16FaYK8tYDCSoTfS0+w1Y8r6TgZKcV6GCM0xLSVtaihk2CO81sUfDFBIppJd614a 2lGx9DW7205ql4vGcQsK31ncr0hVviHG2e8lOEbFc9SkQpmYuLF1dxW2JK9oWGe2 rLXHKb20N7AvgN8Y6V0YAOGNpu9MOnx0TbTGn6SMgzIKMkpYaSs/oZY11d9jrn7Y m/iIahRWzLFR/lYdrD7Jowpy2A/lcwPdQlRkOiuF1s6FFCqxe1yQsrpcbt/7fXes UzOyE494GZFtO0zjFuwglsmiAZDMwO/fQVrIzSGV0SXF8LJpiYYTG1b3Yv5SY5Hr r7EF4A7GlmNmd6K1HrXTYJz9tr4oxLDw+9LZGx74JV8x0iK3cd1hRTXb1SbspA6h S/KRQsuEjpAyQ6xXWVp2fp6VxZkrjIpPavbcQw2RsoBnbNdrcXahTk96JfpWYGjH iyJkEKmCF6/w/s5+xQfy+DYepxFDO0YsPbM7kL5qhaY83KBMOHKJFCUZVWj7md5w QIVTeeiSewIlT5bG9XyjIfmsImq1acqTW+QCaxCnvMSsZDBbdhTMK48GwyN9U9+x jdQCPQye3TKL2WU6U40FPNIr08QcNy4vmJp4fMqwK5xO3+P+Zhs= =I2Zn -----END PGP SIGNATURE----- Merge tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "Updates for SoC specific drivers include a few subsystems that have their own maintainers but send them through the soc tree: SCMI firmware: - add support for a completion interrupt Reset controllers: - new driver for BCM4908 - new devm_reset_control_get_optional_exclusive_released() function Memory controllers: - Renesas RZ/G2 support - Tegra124 interconnect support - Allow more drivers to be loadable modules TEE/optee firmware: - minor code cleanup The other half of this is SoC specific drivers that do not belong into any other subsystem, most of them living in drivers/soc: - Allwinner/sunxi power management work - Allwinner H616 support - ASpeed AST2600 system identification support - AT91 SAMA7G5 SoC ID driver - AT91 SoC driver cleanups - Broadcom BCM4908 power management bus support - Marvell mbus cleanups - Mediatek MT8167 power domain support - Qualcomm socinfo driver support for PMIC - Qualcomm SoC identification for many more products - TI Keystone driver cleanups for PRUSS and elsewhere" * tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits) soc: aspeed: socinfo: Add new systems soc: aspeed: snoop: Add clock control logic memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE memory: samsung: exynos5422-dmc: Correct function names in kerneldoc memory: ti-emif-pm: Drop of_match_ptr from of_device_id table optee: simplify i2c access drivers: soc: atmel: fix type for same7 tee: optee: remove need_resched() before cond_resched() soc: qcom: ocmem: don't return NULL in of_get_ocmem optee: sync OP-TEE headers tee: optee: fix 'physical' typos drivers: optee: use flexible-array member instead of zero-length array tee: fix some comment typos in header files soc: ti: k3-ringacc: Use of_device_get_match_data() soc: ti: pruss: Refactor the CFG sub-module init soc: mediatek: pm-domains: Don't print an error if child domain is deferred soc: mediatek: pm-domains: Add domain regulator supply dt-bindings: power: Add domain regulator supply soc: mediatek: cmdq: Remove cmdq_pkt_flush() soc: mediatek: pm-domains: Add support for mt8167 ... |
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Geetha sowjanya
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4c236d5dc8 |
octeontx2-pf: cn10k: Use LMTST lines for NPA/NIX operations
This patch adds support to use new LMTST lines for NPA batch free and burst SQE flush. Adds new dev_hw_ops structure to hold platform specific functions and create new files cn10k.c and cn10k.h. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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Arnd Bergmann
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ce8ccf21c0 |
Qualcomm driver updates for 5.12
The socinfo driver gains support for dumping information about the platform's PMICs, as well as new definitions for a number of platforms. The LLCC driver gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains support for MSM8994 power domains. In addition to this it contains a few minor fixes in the ocmem, rpmh and llcc drivers. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmAbg1wbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FYYEP/R2zxLPj1ntJmyLV/MWX bioEGJWXKk60b2k5lAai2nwD/iswPqMyRtI3eXub7YVoYPRVMDHVl7nuGE83hHES r3OUCTisiM5VCOIYjzs9ZJJx4ceGzicsXoV2eEZUabQ4pg2/VHzdbh3DmH+Yh7hL PTgEiAYqQRSpRlFTf7ByccuqjAMyhs1GJ3Ajrl9dACsXIrT8ktPqk1UZ6JDl7w+3 iox86p6EzpcnzgMY1APNgAoMDqHNOMbZky5zvgWEdMXGnpBZGjY8l1XXzIG9ZjE2 o9u9DnxnCyBJoaxqbsBeHmFux2QCNTggQc4k5fd4BI0vFLR5X4sTyhcG2rEy12st LUaSKP9hb4M4JTkbMCvKAgae1FrMArLXAExhsoXopa2QwV0JwbtlE1onaOE4hsGT 9YmBuJD6auegplIroGbOEihoNrOhPWEiNCX8N9I0daPewY/ulzxqn57Blq1RVXmV xs3ifBVyiFTbTD/cFvyDKnLDbgPuaT1bUReG6QHZYzOO/vzshe6JkduNY/RRgRd/ l/ENBkZ70yQRvImIcbzRgmq767u7zGa7VWrwTmLOe8+5VxxosxZD1sYBioO9N2uL pZ5kfAeEAfhn70SX+12SMYIMKxNuvVSCesQNNoBHyMAQX6Y0pbuAyEEyrRdcgodO lT1qpN+V2lkjlmzWEiokI3V0 =rWBX -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for 5.12 The socinfo driver gains support for dumping information about the platform's PMICs, as well as new definitions for a number of platforms. The LLCC driver gains SM8250 support, AOSS QMP gains SM8350 support and the RPMPD driver gains support for MSM8994 power domains. In addition to this it contains a few minor fixes in the ocmem, rpmh and llcc drivers. * tag 'qcom-drivers-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: soc: qcom: ocmem: don't return NULL in of_get_ocmem soc: qcom: socinfo: Remove unwanted le32_to_cpu() soc: qcom: aoss: Add SM8350 compatible drivers: soc: qcom: rpmpd: Add msm8994 RPM Power Domains soc: qcom: socinfo: Fix an off by one in qcom_show_pmic_model() soc: qcom: socinfo: Fix off-by-one array index bounds check soc: qcom: socinfo: Add MDM9607 IDs soc: qcom: socinfo: Add SoC IDs for APQ/MSM8998 soc: qcom: socinfo: Add SoC IDs for 630 family soc: qcom: socinfo: Open read access to all for debugfs soc: qcom: socinfo: add info from PMIC models array soc: qcom: socinfo: add several PMIC IDs soc: qcom: socinfo: add qrb5165 SoC ID soc: qcom: rpmh: Remove serialization of TCS commands soc: qcom: smem: use %*ph to print small buffer dt-bindings: soc: qcom: convert qcom,smem bindings to yaml drivers: qcom: rpmh-rsc: Do not read back the register write on trigger soc: qcom: llcc-qcom: Add support for SM8250 SoC soc: qcom: llcc-qcom: Extract major hardware version dt-bindings: msm: Add LLCC for SM8250 Link: https://lore.kernel.org/r/20210204052258.388890-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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CK Hu
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e1e4f7fea3 |
soc / drm: mediatek: Move mtk mutex driver to soc folder
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific, so move it to soc folder. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> |