150MHz is a fundamental limitation of RK3328 Soc, w/o this limitation,
eMMC, for instance, will run into 200MHz clock rate in HS200 mode, which
makes the RK3328 boards not always boot properly. By adding it in
rk3328.dtsi would also obviate the worry of missing it when adding new
boards.
Fixes: 52e02d377a ("arm64: dts: rockchip: add core dtsi file for RK3328 SoCs")
Cc: stable@vger.kernel.org
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Liang Chen <cl@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
According to rock64 schemetic V2 and V3, the VCC_HOST_5V output is
controlled by USB_20_HOST_DRV, which is the same as VCC_HOST1_5V.
V1 hardware was never sold and only V2/V3 is with customers,
so there is no need to keep a seaprate v1 version around.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
P710 is a RK3399 based SBC, designed by Leez [0].
Specification
- Rockchip RK3399
- 4/2GB LPDDR4
- TF sd scard slot
- eMMC
- M.2 B-Key for 4G LTE
- AP6256 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1
- TYPE-C Power supply
[0]https://leez.lenovo.com
Signed-off-by: Andy Yan <andyshrk@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rockpro64 contains a nor-flash chip connected to spi1.
Signed-off-by: Andrius Štikonas <andrius@stikonas.eu>
[a number of cleanups]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
RockPro64 has a dedicated circuit for driving a 12V fan from PWM1.
At the moment this makes fan spin at full speed. fancontrol can be used
to control fan speed. E.g. the following config file works well:
INTERVAL=10
DEVPATH=hwmon0=devices/platform/pwm-fan
DEVNAME=hwmon0=pwmfan
FCTEMPS=hwmon0/device/pwm1=../thermal/thermal_zone0/temp
MINTEMP=hwmon0/device/pwm1=40
MAXTEMP=hwmon0/device/pwm1=60
MINSTART=hwmon0/device/pwm1=100
MINSTOP=hwmon0/device/pwm1=70
In the future it would be nice to define trip points in dts file,
so that kernel could adjust fan speed itself.
Signed-off-by: Andrius Štikonas <andrius@stikonas.eu>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds an override mode for kevin devices. The mode increases
both back porches to allow a pixel clock of 26666kHz as opposed to the
'typical' value of 252750kHz. This is needed to avoid interference with
the touch digitizer on these laptops.
Cc: Doug Anderson <dianders@chromium.org>
Cc: Eric Anholt <eric@anholt.net>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Jeffy Chen <jeffy.chen@rock-chips.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Before this patch, the Type-C port on the Sapphire board is dead.
If setting the 'regulator-always-on' property to 'vcc5v0_typec0'
then the port works for about 4 seconds at start-up. This is a
sample trace with a memory stick plugged in:
1.- The memory stick LED lights on and kernel reports:
[ 4.782999] scsi 0:0:0:0: Direct-Access USB DISK PMAP PQ: 0 ANSI: 4
[ 5.904580] sd 0:0:0:0: [sdb] 3913344 512-byte logical blocks: (2.00 GB/1.87 GiB)
[ 5.906860] sd 0:0:0:0: [sdb] Write Protect is off
[ 5.908973] sd 0:0:0:0: [sdb] Mode Sense: 23 00 00 00
[ 5.909122] sd 0:0:0:0: [sdb] No Caching mode page found
[ 5.911214] sd 0:0:0:0: [sdb] Assuming drive cache: write through
[ 5.951585] sdb: sdb1
[ 5.954816] sd 0:0:0:0: [sdb] Attached SCSI removable disk
2.- 4 seconds later the memory stick LED lights off and kernel reports:
[ 9.082822] phy phy-ff770000.syscon:usb2-phy@e450.2: charger = USB_DCP_CHARGER
3.- After a minute the kernel reports:
[ 71.666761] usb 5-1: USB disconnect, device number 2
It has been checked that, although the LED is off, VBUS is present.
If, instead, the dr_mode is changed to host and the phy-supply changed
accordingly, then it works. It has only been tested in host mode.
Signed-off-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As per binding documentation [1], the DWC3 core should have the "ref",
"bus_early" and "suspend" clocks. As explained in the binding, those
clocks are required for new platforms but not for existing platforms
before commit fe8abf332b ("usb: dwc3: support clocks and resets for
DWC3 core").
However, as those clocks are really treated as required, this ends with
having some annoying messages when the "rockchip,rk3399-dwc3" is used:
[ 1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
[ 1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
[ 2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2
[ 2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2
In order to remove those annoying messages, update the DWC3 hardware
module node and add all the required clocks. With this change, both, the
glue node and the DWC3 core node, have the clocks defined, but that's
not really a problem and there isn't a side effect on do this. So, we
can get rid of the annoying get clk error messages.
[1] Documentation/devicetree/bindings/usb/dwc3.txt
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the missing clock property for the watchdog on rk3328.
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
[set wdt node to always enabled, as it is not board-specific]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add devicetree support for Hugsun X99 TV Box based on RK3399 SoC
Tested with LibreElec running kernel v5.1.2.
Following peripherals tested and work:
Peripheral works:
- UART2 debug
- eMMC
- USB 3.0 port
- USB 2.0 port
- sdio, sd-card
- HDMI
- Ethernet
- WiFi/BT
Not tested:
- Type-C port
- OPTICAL
- IR
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently the default thermal values for the rk3399-rock960 board is
inherited from the generic definition in rk3399.dtsi.
In order to ensure the rock960 has more room for througput before
being capped by the thermal framework and is correctly supported by
the IPA governor, let's define the power values and the right trip
points for better performances:
- sustainable power is tested to be 1550mW
- increase the first mitigation point to 75°C in order to get better
performances
- the first trip point is 65°C in order to let the IPA to collect
enough data for the PID regulation when it reaches 75°C
- restrict the cooling device to the big CPUs as the little CPUs
contribution to the heating effect can be considered negligible
The intelligent power allocator PID coefficient to be set in sysfs
are:
k_d: 0
k_po: 79
k_i: 10
k_pu: 50
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently the common thermal zones definitions for the rk3399 assumes
multiple thermal zones are supported by the governors. This is not the
case and each thermal zone has its own governor instance acting
individually without collaboration with other governors.
As the cooling device for the CPU and the GPU thermal zones is the
same, each governors take different decisions for the same cooling
device leading to conflicting instructions and an erratic behavior.
As the cooling-maps is about to become an optional property, let's
remove the cpu cooling device map from the GPU thermal zone.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds core dtsi file for Rockchip RK3399Pro SoCs,
include rk3399.dtsi. Also enable pciei0/pcie_phy for AP to
talk to NPU part inside SoC.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently the rk3328-roc-cc ethernet is enabled using "snps,force_thresh_dma_mode".
While this works, the performance leaves a lot to be desired.
A previous attempt to improve performance used "snps,txpbl = <0x4>".
This also allowed networking to function, but performance varied between boards.
This patch takes that one step further.
Set txpbl and rxpbl to 0x4.
This can also be accomplished with "snps,pbl =<0x4>" which affects both.
Also set "snps,aal" which forces address aligned DMA mode.
Fixes: 4bc4d6013b (arm64: dts: rockchip: fix rk3328-roc-cc gmac2io stability issues)
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Leonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add devicetree support for Khadas Edge/Edge-V/Captain boards.
Khadas Edge is an expandable Rockchip RK3399 board with goldfinger.
Khadas Captain is the carrier board for Khadas Edge.
Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board.
Signed-off-by: Nick Xie <nick@khadas.com>
[edge-captain and edge-v contain different components that are supposed
to get added in future patches, so should stay separate while looking
somewhat similar right now]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit enables the hdmi-sound device needed to have
audio over HDMI on the Rock Pi board.
Fixes: 1b5715c602 ("arm64: dts: rockchip: add ROCK Pi 4 DTS support")
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rock Pi 4 has a on board AP6256 WiFi/BT Module. enable wifi and bluetooth
support on Rock Pi 4 board.
Signed-off-by: Akash Gajjar <akash@openedev.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
isp iommu requires wrapper variants of the clocks.
noc variants are always on and using the wrapper variants will activate
{A,H}CLK_ISP{0,1} due to the hierarchy.
Tested using the pending isp patch set (which is not upstream
yet). Without this patch, streaming from the isp stalls.
Also add the respective power domain and remove the "disabled" status.
Refer:
RK3399 TRM v1.4 Fig. 2-4 RK3399 Clock Architecture Diagram
RK3399 TRM v1.4 Fig. 8-1 RK3399 Power Domain Partition
Signed-off-by: Helen Koike <helen.koike@collabora.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable SPI1 exposed on both Low and High speed expansion connectors
of Ficus. SPI1 has 3 different chip selects wired as below:
CS0 - Serial Flash (unpopulated)
CS1 - Low Speed expansion
CS2 - High Speed expansion
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable SPI0 and SPI4 exposed on the Low and High speed expansion
connectors of Rock960.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
for the rk3328-roc-cc and some minor fixes for rk3399 and rockpro64.
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Merge tag 'v5.2-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Bulk conversion of remaining gpios to the helper constants, new peripherals
for the rk3328-roc-cc and some minor fixes for rk3399 and rockpro64.
* tag 'v5.2-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: fix IO domain voltage setting of APIO5 on rockpro64
arm64: dts: rockchip: fix cts, rts pin assign of UART3 for rk3399
arm64: dts: rockchip: bulk convert gpios to their constant counterparts
arm64: dts: rockchip: enable display nodes on rk3328-roc-cc
arm64: dts: rockchip: eMMC additions for rk3328-roc-cc
Signed-off-by: Olof Johansson <olof@lixom.net>
The old "cooling-{min,max}-state" properties for thermal bindings were
ratified to "cooling-{min,max}-level" by commit eb168b70de ("of:
thermal: Fix inconsitency between cooling-*-state and cooling-*-level"),
which were later removed entirely by commit e04907dbc2 ("dt-bindings:
thermal: Remove "cooling-{min|max}-level" properties").
The pwm-fan binding, however, was apparently in-flight in parallel with
that ratification, and so managed to introduce an example of the old
properties which escaped the scope of the later cleanup and has thus
continued to be dutifully copied for new boards despite being useless.
Clean up these remaining undocumented anachronisms to minimise any
further confusion.
Acked-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes IO domain voltage setting that is related to
audio_gpio3d4a_ms (bit 1) of GRF_IO_VSEL.
This is because RockPro64 schematics P.16 says that regulator
supplies 3.0V power to APIO5_VDD. So audio_gpio3d4a_ms bit should
be clear (means 3.0V). Power domain map is saying different thing
(supplies 1.8V) but I believe P.16 is actual connectings.
Fixes: e4f3fb4909 ("arm64: dts: rockchip: add initial dts support for Rockpro64")
Cc: stable@vger.kernel.org
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch fixes pin assign of cts and rts signal of UART3.
Currently GPIO3_C2 and C3 pins are assigned but TRM says that
GPIO3_C0 and C1 are correct.
Refer:
RK3399 TRM v1.4 - Table 19-1 UART Interface Description
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable necessary nodes to get output on the hdmi port of the board.
This is a port of Heiko's patch for the rock64.
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The eMMC 5.x that Libre Computer provide for their boards supports HS200 mode.
The support is already included in the dts for their newest board:
La Frite (AML-S805X-AC)
dts: arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
That same eMMC is supported in the ROC-RK3328-CC:
https://www.loverpi.com/products/libre-computer-board-emmc-5-x-module
This increases the speed of the eMMC significantly.
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
[added supplies as suggested by Leonidas]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The RK3399-Q7 (Puma) requires 33 Ohm drive strength to ensure signal
integrity at HS-400 (200MHz clock, DDR signalling).
A repeated EMC testing run validates that this increase does not
negatively impact EMC compliance (emissions have ample distance to
the regulatory limits).
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A previous patch introduced the property 'drive-impedance-ohm'
for the RK3399's emmc phy node. This patch sets this value
explicitly to the default value of 50 Ohm.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
When using direct commands (DCMDs) on an RK3399, we get spurious
CQE completion interrupts for the DCMD transaction slot (#31):
[ 931.196520] ------------[ cut here ]------------
[ 931.201702] mmc1: cqhci: spurious TCN for tag 31
[ 931.206906] WARNING: CPU: 0 PID: 1433 at /usr/src/kernel/drivers/mmc/host/cqhci.c:725 cqhci_irq+0x2e4/0x490
[ 931.206909] Modules linked in:
[ 931.206918] CPU: 0 PID: 1433 Comm: irq/29-mmc1 Not tainted 4.19.8-rt6-funkadelic #1
[ 931.206920] Hardware name: Theobroma Systems RK3399-Q7 SoM (DT)
[ 931.206924] pstate: 40000005 (nZcv daif -PAN -UAO)
[ 931.206927] pc : cqhci_irq+0x2e4/0x490
[ 931.206931] lr : cqhci_irq+0x2e4/0x490
[ 931.206933] sp : ffff00000e54bc80
[ 931.206934] x29: ffff00000e54bc80 x28: 0000000000000000
[ 931.206939] x27: 0000000000000001 x26: ffff000008f217e8
[ 931.206944] x25: ffff8000f02ef030 x24: ffff0000091417b0
[ 931.206948] x23: ffff0000090aa000 x22: ffff8000f008b000
[ 931.206953] x21: 0000000000000002 x20: 000000000000001f
[ 931.206957] x19: ffff8000f02ef018 x18: ffffffffffffffff
[ 931.206961] x17: 0000000000000000 x16: 0000000000000000
[ 931.206966] x15: ffff0000090aa6c8 x14: 0720072007200720
[ 931.206970] x13: 0720072007200720 x12: 0720072007200720
[ 931.206975] x11: 0720072007200720 x10: 0720072007200720
[ 931.206980] x9 : 0720072007200720 x8 : 0720072007200720
[ 931.206984] x7 : 0720073107330720 x6 : 00000000000005a0
[ 931.206988] x5 : ffff00000860d4b0 x4 : 0000000000000000
[ 931.206993] x3 : 0000000000000001 x2 : 0000000000000001
[ 931.206997] x1 : 1bde3a91b0d4d900 x0 : 0000000000000000
[ 931.207001] Call trace:
[ 931.207005] cqhci_irq+0x2e4/0x490
[ 931.207009] sdhci_arasan_cqhci_irq+0x5c/0x90
[ 931.207013] sdhci_irq+0x98/0x930
[ 931.207019] irq_forced_thread_fn+0x2c/0xa0
[ 931.207023] irq_thread+0x114/0x1c0
[ 931.207027] kthread+0x128/0x130
[ 931.207032] ret_from_fork+0x10/0x20
[ 931.207035] ---[ end trace 0000000000000002 ]---
The driver shows this message only for the first spurious interrupt
by using WARN_ONCE(). Changing this to WARN() shows, that this is
happening quite frequently (up to once a second).
Since the eMMC 5.1 specification, where CQE and CQHCI are specified,
does not mention that spurious TCN interrupts for DCMDs can be simply
ignored, we must assume that using this feature is not working reliably.
The current implementation uses DCMD for REQ_OP_FLUSH only, and
I could not see any performance/power impact when disabling
this optional feature for RK3399.
Therefore this patch disables DCMDs for RK3399.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fixes: 84362d79f4 ("mmc: sdhci-of-arasan: Add CQHCI support for arasan,sdhci-5.1")
Cc: stable@vger.kernel.org
[the corresponding code changes are queued for 5.2 so doing that as well]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The nanopi4 boards have the INTB pin of the RTL8211E phy wired up, so we
can make use of that and avoid having to poll for line status changes.
Apparently RTL8211E only requires 30ms of post-reset delay, so we may as
well save a little bit of time there as well.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
NanoPC-T4 has a dedicated circuit for driving a 12V fan from PWM1,
so let's add that along with some rough empirically-derived thermal
settings for the benefit of anyone determined enough to hook one up.
The vendor does not currently offer a suitable fan, but this seems as
good a place as any to note that pre-terminated 3-pin JST GH connectors
are readily available online, and if you even have to ask, then splicing
one of those really will be orders of magnitude cheaper and simpler than
getting set up to crimp the teeny-tiny things by hand.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Also rename its regulator to match the schematic names.
Signed-off-by: Alexis Ballier <aballier@gentoo.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Despite this not being mentioned in the binding documentation, this
generates a log at boot about it being missing.
Signed-off-by: Alexis Ballier <aballier@gentoo.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
12V DCIN regulator is root source supply for the rest of regulators
in Rock960 power diagram.
Add support for it and attach same to supply vcc5v0_sys.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Akash Gajjar <akash@openedev.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
It is always better practice to follow regulator naming conventions
as per the schematics for future references.
So, rename vcc_sys into vcc5v0_sys as per rk3399 power diagram of
rock960 schematics.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Akash Gajjar <akash@openedev.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
FriendlyElec NanoPi NEO4 is known to be a revision 4 based
NanoPi4 series of boards.
Most of know peripherals are shared between Nanopi M4 vs NEO4, except
- 1GB DDR3
- USB Host ports
- Missing DSI port
- USB 2.0 Host with USB2PHY0 (no USB2PH1)
Add support for it, by reusing existing rk3399-nanopi4.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Akash Gajjar <akash@openedev.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rockpro64 has hdmi support. So this patch enables hdmi audio
feature that is defined in rk3399 devicetree.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds basic support for the Orange Pi RK3399 board.
What works:
- SD card / emmc.
- Debug UART
- Ethernet
- USB: Type C, internal USB3 for SATA, 4 USB 2.0 ports
- Sensors: All of them but the Hall sensor.
- Buttons
- Wifi, Bluetooth
- HDMI out
Signed-off-by: Alexis Ballier <aballier@gentoo.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
In line with the rock64 dts, specify the cpu-supply
for the other cpus as well
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Assign the LEDs to heartbeat and sdcard io, as in other RK boards.
f1affad5c7
Suggested-by: Juan Cano <j3cano@outlook.com>
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds #sound-dai-cells to use HDMI node as audio
codec from device tree of rk3328 boards.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add led nodes on Rock64.
Use heartbeat trigger for the red standby led and
use mmc0 trigger for the white power led.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
