[ Upstream commit 8cb10cba12 ]
When using usb-conn-gpio to control USB role and VBUS, the vbus-supply
property must be present in the usb-conn-gpio node. Additionally it
should not be present in the phy node as that isn't what controls vbus
and will upset the use count.
This resolves an issue where VBUS is enabled with OTG in peripheral
mode.
Fixes: ad9a12f7a5 ("arm64: dts: imx8mp-venice: Fix USB connector description")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Since commit 26c9d152eb ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for arm64
devicetrees:
The compatible property needs to contain the chip's name in addition to
the generic "tcg,tpm_tis-spi" and the nodename needs to be "tpm@0"
rather than "cr50@0":
tpm@1: compatible: ['tcg,tpm_tis-spi'] is too short
from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#
cr50@0: $nodename:0: 'cr50@0' does not match '^tpm(@[0-9a-f]+)?$'
from schema $id: http://devicetree.org/schemas/tpm/google,cr50.yaml#
Fix these schema violations.
phyGATE-Tauri uses an Infineon SLB9670:
https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/
Gateworks Venice uses an Atmel ATTPM20P:
https://trac.gateworks.com/wiki/tpm
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
The USB connector should not be placed under the dwc3 node.
Move the USB connector out of the SoC level and use port to describe
the connection to the dwc3 controller.
This fixes the following dt-schema warning:
imx8mp-venice-gw72xx-2x.dtb: usb@38100000: Unevaluated properties are not allowed ('connector' was unexpected)
from schema $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the TPM device found on the GW72xx revision F PCB.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to st,st-sensors.yaml, the 'interrupt-names' property is
not a valid one.
Remove it to fix the following schema warnings:
imx8mp-venice-gw73xx-2x.dtb: accelerometer@19: 'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/iio/st,st-sensors.yaml#
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Gateworks imx8mp-venice-gw72xx-2x consists of a SOM + baseboard.
The GW702x SOM contains the following:
- i.MX8M Plus SoC
- LPDDR4 memory
- eMMC Boot device
- Gateworks System Controller (GSC) with integrated EEPROM, button
controller, and ADC's
- PMIC
- SOM connector providing:
- eQoS GbE MII
- 1x SPI
- 2x I2C
- 4x UART
- 2x USB 3.0
- 1x PCI
- 1x SDIO (4-bit 3.3V)
- 1x SDIO (4-bit 3.3V/1.8V)
- GPIO
The GW72xx Baseboard contains the following:
- GPS
- microSD
- off-board I/O connector with SPI
- off-board I/O connector with I2C, and GPIO
- off-board I/O connector with MIPI DSI, MIPI CSI, I2C, and GPIO
- off-board I/O connector with RS232 and RS485
- EERPOM
- USB 3.0 HUB
- USB 3.0 TypeA socket
- USB 2.0 Micro-B OTG socket
- Accelerometer
- 1x GbE (eQoS)
- 1x GbE (PCI)
- PCIe clock generator
- PCIe switch
- 1x full-length miniPCIe socket with PCI and USB2.0
- 1x full-length miniPCIe socket with PCI/USB3 (via mux) SIM, and USB2.0
- 1x half-length miniPCIe socket with USB2.0 and USB3.0
- USB Type-C with USB PD Sink capability and peripheral support
- USB Type-C with USB 3.0 host support
- Wide range DC input supply
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Tim Harvey