Commit Graph

33 Commits

Author SHA1 Message Date
Steven L Kinney 30861ddc9c perf/x86/amd: Add IOMMU Performance Counter resource management
Add functionality to check the availability of the AMD IOMMU Performance
Counters and export this functionality to other core drivers, such as in this
case, a perf AMD IOMMU PMU.  This feature is not bound to any specific AMD
family/model other than the presence of the IOMMU with P-C enabled.

The AMD IOMMU P-C support static counting only at this time.

Signed-off-by: Steven Kinney <steven.kinney@amd.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1370466709-3212-2-git-send-email-suravee.suthikulpanit@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-06-19 13:04:52 +02:00
Linus Torvalds 99737982ca IOMMU Updates for Linux v3.10
The updates are mostly about the x86 IOMMUs this time. Exceptions are
 the groundwork for the PAMU IOMMU from Freescale (for a PPC platform)
 and an extension to the IOMMU group interface. On the x86 side this
 includes a workaround for VT-d to disable interrupt remapping on broken
 chipsets. On the AMD-Vi side the most important new feature is a kernel
 command-line interface to override broken information in IVRS ACPI
 tables and get interrupt remapping working this way. Besides that there
 are small fixes all over the place.
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Merge tag 'iommu-updates-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu

Pull IOMMU updates from Joerg Roedel:
 "The updates are mostly about the x86 IOMMUs this time.

  Exceptions are the groundwork for the PAMU IOMMU from Freescale (for a
  PPC platform) and an extension to the IOMMU group interface.

  On the x86 side this includes a workaround for VT-d to disable
  interrupt remapping on broken chipsets.  On the AMD-Vi side the most
  important new feature is a kernel command-line interface to override
  broken information in IVRS ACPI tables and get interrupt remapping
  working this way.

  Besides that there are small fixes all over the place."

* tag 'iommu-updates-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (24 commits)
  iommu/tegra: Fix printk formats for dma_addr_t
  iommu: Add a function to find an iommu group by id
  iommu/vt-d: Remove warning for HPET scope type
  iommu: Move swap_pci_ref function to drivers/iommu/pci.h.
  iommu/vt-d: Disable translation if already enabled
  iommu/amd: fix error return code in early_amd_iommu_init()
  iommu/AMD: Per-thread IOMMU Interrupt Handling
  iommu: Include linux/err.h
  iommu/amd: Workaround for ERBT1312
  iommu/amd: Document ivrs_ioapic and ivrs_hpet parameters
  iommu/amd: Don't report firmware bugs with cmd-line ivrs overrides
  iommu/amd: Add ioapic and hpet ivrs override
  iommu/amd: Add early maps for ioapic and hpet
  iommu/amd: Extend IVRS special device data structure
  iommu/amd: Move add_special_device() to __init
  iommu: Fix compile warnings with forward declarations
  iommu/amd: Properly initialize irq-table lock
  iommu/amd: Use AMD specific data structure for irq remapping
  iommu/amd: Remove map_sg_no_iommu()
  iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
  ...
2013-05-06 14:59:13 -07:00
Joerg Roedel 31cff67f6b iommu/amd: Extend IVRS special device data structure
This patch extends the devid_map data structure to allow
ioapic and hpet entries in ivrs to be overridden on the
kernel command line.

Reviewed-by: Shuah Khan <shuahkhan@gmail.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-19 20:48:43 +02:00
Suravee Suthikulpanit 925fe08bce iommu/amd: Re-enable IOMMU event log interrupt after handling.
Current driver does not clear the IOMMU event log interrupt bit
in the IOMMU status register after processing an interrupt.
This causes the IOMMU hardware to generate event log interrupt only once.
This has been observed in both IOMMU v1 and V2 hardware.
This patch clears the bit by writing 1 to bit 1 of the IOMMU
status register (MMIO Offset 2020h)

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Joerg Roedel <joro@8bytes.org>
2013-04-02 16:48:20 +02:00
Shuah Khan 6f2729bab2 iommu/amd: Remove calc_devid() and use PCI_DEVID() from PCI
Change to remove calc_devid() and use PCI_DEVID() from PCI instead.

Signed-off-by: Shuah Khan <shuah.khan@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joerg Roedel <joro@8bytes.org>
2013-03-26 16:21:58 -06:00
Shuah Khan c5081cd7a2 iommu/amd: Remove local PCI_BUS() define and use PCI_BUS_NUM() from PCI
Change to remove local PCI_BUS() define and use the new PCI_BUS_NUM()
interface from PCI.

Signed-off-by: Shuah Khan <shuah.khan@hp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Joerg Roedel <joro@8bytes.org>
2013-03-26 16:21:54 -06:00
Alex Williamson 78bfa9f395 iommu/amd: Properly account for virtual aliases in IOMMU groups
An alias doesn't always point to a physical device.  When this
happens we must first verify that the IOMMU group isn't rooted in
a device above the alias.  In this case the alias is effectively
just another quirk for the devices aliased to it.  Alternatively,
the virtual alias itself may be the root of the IOMMU group.  To
support this, allow a group to be hosted on the alias dev_data
for use by anything that might have the same alias.

Signed-off-by: Alex williamson <alex.williamson@redhat.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-10-24 17:30:22 +02:00
Joerg Roedel 0094872583 Merge branches 'dma-debug', 'iommu/fixes', 'arm/tegra', 'arm/exynos', 'x86/amd', 'x86/vt-d' and 'x86/amd-irq-remapping' into next
Conflicts:
	drivers/iommu/amd_iommu_init.c
2012-10-02 14:40:03 +02:00
Joerg Roedel 7ef2798deb iommu/amd: Add IRTE invalidation routine
Add routine to invalidate the IOMMU cache for interupt
translations. Also include the IRTE caches when flushing all
IOMMU caches.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28 17:41:22 +02:00
Joerg Roedel 0ea2c422bc iommu/amd: Allocate data structures to keep track of irq remapping tables
To easily map device ids to interrupt remapping table
entries a new lookup table is necessary.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28 17:30:04 +02:00
Joerg Roedel 05152a0494 iommu/amd: Add slab-cache for irq remapping tables
The irq remapping tables for the AMD IOMMU need to be
aligned on a 128 byte boundary. Create a seperate slab-cache
to guarantee this alignment.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-28 17:30:03 +02:00
Joerg Roedel 6efed63bec iommu/amd: Keep track of HPET and IOAPIC device ids
The IVRS ACPI table provides information about the IOAPICs
and the HPETs available in the system and which PCI device
ID they use in transactions. Save that information for later
usage in interrupt remapping.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2012-09-28 17:29:34 +02:00
Frank Arnold df805abb28 iommu/amd: Fix some typos
Fix some typos in comments and user-visible messages. No
functional changes.

Signed-off-by: Frank Arnold <frank.arnold@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-09-18 12:33:22 +02:00
Joerg Roedel 23c742db21 iommu/amd: Split out PCI related parts of IOMMU initialization
For interrupt remapping the relevant IOMMU initialization
needs to run earlier at boot when the PCI subsystem is not
yet initialized. To support that this patch splits the parts
of IOMMU initialization which need PCI accesses out of the
initial setup path so that this can be done later.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-07-17 12:14:57 +02:00
Joerg Roedel 98f1ad2582 iommu/amd: Fix sparse warnings
A few sparse warnings fire in drivers/iommu/amd_iommu_init.c.
Fix most of them with this patch. Also fix the sparse
warnings in drivers/iommu/irq_remapping.c while at it.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-07-17 12:14:55 +02:00
Dan Carpenter 3775d4818d iommu/amd: fix type bug in flush code
write_file_bool() modifies 32 bits of data, so "amd_iommu_unmap_flush"
needs to be 32 bits as well or we'll corrupt memory.  Fortunately it
looks like the data is aligned with a gap after the declaration so this
is harmless in production.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-07-02 12:11:40 +02:00
Joerg Roedel c1bf94ec1e iommu/amd: Cache pdev pointer to root-bridge
At some point pci_get_bus_and_slot started to enable
interrupts. Since this function is used in the
amd_iommu_resume path it will enable interrupts on resume
which causes a warning. The fix will use a cached pointer
to the root-bridge to re-enable the IOMMU in case the BIOS
is broken.

Cc: stable@vger.kernel.org
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2012-06-04 12:47:44 +02:00
Joerg Roedel 1456e9d2c4 iommu/amd: Set IOTLB invalidation timeout
To protect the command buffer from hanging when a device
does not respond to an IOTLB invalidation, set a timeout of
1s for outstanding IOTLB invalidations.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-22 14:56:56 +01:00
Joerg Roedel 6a113ddc03 iommu/amd: Add device errata handling
Add infrastructure for errata-handling and handle two known
erratas in the IOMMUv2 code.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:06 +01:00
Joerg Roedel f3572db823 iommu/amd: Add function to get IOMMUv2 domain for pdev
The AMD IOMMUv2 driver needs to get the IOMMUv2 domain
associated with a particular device. This patch adds a
function to get this information.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:05 +01:00
Joerg Roedel c99afa25b6 iommu/amd: Implement function to send PPR completions
To send completions for PPR requests this patch adds a
function which can be used by the IOMMUv2 driver.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:05 +01:00
Joerg Roedel b16137b11b iommu/amd: Implement functions to manage GCR3 table
This patch adds functions necessary to set and clear the
GCR3 values associated with a particular PASID in an IOMMUv2
domain.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:04 +01:00
Joerg Roedel 22e266c79b iommu/amd: Implement IOMMUv2 TLB flushing routines
The functions added with this patch allow to manage the
IOMMU and the device TLBs for all devices in an IOMMUv2
domain.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:19:03 +01:00
Joerg Roedel 52815b7568 iommu/amd: Add support for IOMMUv2 domain mode
This patch adds support for protection domains that
implement two-level paging for devices.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 15:18:57 +01:00
Joerg Roedel 72e1dcc419 iommu/amd: Implement notifier for PPR faults
Add a notifer at which a module can attach to get informed
about incoming PPR faults.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:55:04 +01:00
Joerg Roedel 5abcdba4fa iommu/amd: Put IOMMUv2 capable devices in pt_domain
If the device starts to use IOMMUv2 features the dma handles
need to stay valid. The only sane way to do this is to use a
identity mapping for the device and not translate it by the
iommu. This is implemented with this patch. Since this lifts
the device-isolation there is also a new kernel parameter
which allows to disable that feature.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:58 +01:00
Joerg Roedel 400a28a05f iommu/amd: Add iommuv2 flag to struct amd_iommu
In mixed IOMMU setups this flag inidicates whether an IOMMU
supports the v2 features or not. This patch also adds a
global flag together with a function to query that flag from
other code. The flag shows if at least one IOMMUv2 is in the
system.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:52 +01:00
Joerg Roedel cbc33a9085 iommu/amd: Enable GT mode when supported by IOMMU
This feature needs to be enabled before IOMMUv2 DTEs can be
set up.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:44 +01:00
Joerg Roedel 1a29ac014a iommu/amd: Setup PPR log when supported by IOMMU
Allocate and enable a log buffer for peripheral page faults
when the IOMMU supports this feature.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:37 +01:00
Joerg Roedel 62f71abbc6 iommu/amd: Get the maximum number of PASIDs supported
Read the number of PASIDs supported by each IOMMU in the
system and take the smallest number as the maximum value
supported by the IOMMU driver.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:30 +01:00
Joerg Roedel ee6c286845 iommu/amd: Convert dev_table_entry to u64
Convert the contents of 'struct dev_table_entry' to u64 to
allow updating the DTE wit 64bit writes as required by the
spec.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-12-12 14:54:23 +01:00
Joerg Roedel 801019d59d Merge branches 'amd/transparent-bridge' and 'core'
Conflicts:
	arch/x86/include/asm/amd_iommu_types.h
	arch/x86/kernel/amd_iommu.c

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-06-21 11:14:10 +02:00
Joerg Roedel 403f81d8ee iommu/amd: Move missing parts to drivers/iommu
A few parts of the driver were missing in drivers/iommu.
Move them there to have the complete driver in that
directory.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-06-21 10:49:31 +02:00