Commit graph

4113 commits

Author SHA1 Message Date
Tom St Denis
0dba3739a7 drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_fan_speed_percent()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:32:07 -04:00
Tom St Denis
0c69dd0a55 drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_default_mode()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:59 -04:00
Tom St Denis
893c3880e4 drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_static_mode()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:53 -04:00
Tom St Denis
8c755d9abc drm/amd/powerplay: Tidy up vega10_fan_ctrl_get_fan_speed_rpm()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:46 -04:00
Tom St Denis
f85a49bdb6 drm/amd/powerplay: Port vega10_thermal.c over to PP_CAP
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:39 -04:00
Tom St Denis
0f26b7b03c drm/amd/powerplay: Port vega10_powertune.c over to PP_CAP
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:32 -04:00
Tom St Denis
dd5a6fe2af drm/amd/powerplay: Port vega10_hwmgr.c over to PP_CAP
Replace and cleanup lengthy phm_cap_enabled() sequences
with PP_CAP.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:25 -04:00
Tom St Denis
583a888a77 drm/amd/powerplay: Add PP_CAP() macro
To replace common lengthy sequence that would create
really long lines all over.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:17 -04:00
Tom St Denis
7246187abf drm/amd/powerplay: Port vega10_didt_set_mask() to new macros
Start using new CGS bitmask macros.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:09 -04:00
Tom St Denis
38e40d9cc4 drm/amd/powerplay: Introduction of bitmask macros for registers
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:31:02 -04:00
Tom St Denis
06474d5665 drm/amd/powerplay: Simplify vega10_acg_disable()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:30:56 -04:00
Tom St Denis
9a5487ef56 drm/amd/powerplay: Simplify vega10_patch_voltage_dependency_tables_with_lookup_table()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:30:48 -04:00
Christian König
d5884513a3 drm/amdgpu: fix VM sync with always valid BOs v2
All users of a VM must always wait for updates with always
valid BOs to be completed.

v2: remove debugging leftovers, rename struct member

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:30:39 -04:00
Evan Quan
50811c71fa drm/amdgpu: enable raven to load firmwares by psp at default (v2)
- v2: share code with CHIP_VEGA10 case

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:30:30 -04:00
Evan Quan
bcd6eab837 drm/amdgpu: stop psp ring on suspend
Otherwise, the ring will fail to create on next resume.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:30:21 -04:00
Evan Quan
4ef7245331 drm/amdgpu: added api for stopping psp ring (v2)
- v2: reuse the ring stop api in ring destory

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:30:11 -04:00
Evan Quan
f1ac0fc2f2 drm/amdgpu: fixed raven psp cmd prepare and submit
- fw_size in psp_v10_0_prep_cmd_buf is wrongly set as 0
- fixed the wrong calculation of psp_write_ptr_reg in psp_v10_0_cmd_submit

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:29:48 -04:00
Christian König
9a18999640 drm/amdgpu: move MMU notifier related defines to amdgpu_mn.h
Just some cleanup.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:29:37 -04:00
Christian König
711becf0e6 drm/amdgpu: move amdgpu_ttm_tt_* declarations into amdgpu_ttm.h
Just some cleanup.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:28:06 -04:00
Christian König
1ed3d2567c drm/amdgpu: keep the MMU lock until the update ends v4
This is quite controversial because it adds another lock which is held during
page table updates, but I don't see much other option.

v2: allow multiple updates to be in flight at the same time
v3: simplify the patch, take the read side only once
v4: correctly fix rebase conflict

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:27:56 -04:00
Christian König
aebc5e6f50 drm/amdgpu: rework amdgpu_cs_find_mapping
Use the VM instead of the BO list to find the BO for a virtual address.

This fixes UVD/VCE in physical mode with VM local BOs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:27:48 -04:00
Christian König
9cca0b8e5d drm/amdgpu: move amdgpu_cs_sysvm_access_required into find_mapping
When we need to find the mapping we need sysvm access anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:27:22 -04:00
Christian König
3fe89771cb drm/amdgpu: stop reserving the BO in the MMU callback v3
Instead take the callback lock during the final parts of CS.

This should solve the last remaining locking order problems with BO reservations.

v2: rebase, make dummy functions static inline
v3: add one more missing inline and comments

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:26:37 -04:00
Christian König
60de1c1740 drm/amdgpu: use a rw_semaphore for MMU notifiers
Allow at least some parallel processing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:24:27 -04:00
Christian König
1b0c0f9dc5 drm/amdgpu: move userptr BOs to CPU domain during CS v2
Instead of moving them in the MMU notifier move them during CS.

v2: still mark pages as accessed/dirty

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:24:18 -04:00
Christian König
ca666a3c29 drm/amdgpu: stop using BO status for user pages
Instead use a counter to figure out if we need to set new pages or not.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:24:09 -04:00
Christian König
b72cf4fca2 drm/amdgpu: move taking mmap_sem into get_user_pages v2
This didn't helped as intended, just simplify the code.

v2: unlock mmap_sem in the error path as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:24:00 -04:00
Bas Nieuwenhuizen
862095237c drm/amdgpu: Account for shadow PTs in mapping update IB size.
When amdgpu_vm_frag_ptes calls amdgpu_vm_update_ptes and the pt
has a shadow PT we mirror all the write to the shadow PT too, which
results in twice the commands.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:23:52 -04:00
Christian König
aa4ec7ce7e drm/amdgpu: revert "fix deadlock of reservation between cs and gpu reset v2"
This reverts commit 10e709cb29.

The patch doesn't work at all:
1. The CS can still be blocked because of amdgpu_ctx_add_fence().
2. The order of submission isn't correct any more.
3. We could end up using freed up memory because we now drop the
   ctx reference to early.

This needs to be fixed cleanly by doing the context handling after the BO
handling, but this is a larger task just avoid the obvious crashes for now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu monk.liu@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:23:30 -04:00
Tom St Denis
64d03abe6e drm/amd/powerplay: Fix psm_set_user_performance_state()
We now pass a pointer to a pointer which seems to be
what they meant in the first place.  The previous version
was modifying a pointer passed by value.

Fixes bug that was introduced by

commit 332798d40c2e91:drm/amd/powerplay: delete eventmgr layer in poweprlay

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-By: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:23:18 -04:00
Christian König
a216ab0995 drm/amdgpu: fix userptr put_page handling
Move calling put_page into the unpopulate callback. Otherwise we mess up the pages
reference count when it is unbound multiple times.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:23:10 -04:00
Monk Liu
a2138eaf97 drm/amdgpu: fix wait_any_fence
first is incorrect if hit NULL/signaled fence

Signed-off-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:22:43 -04:00
Rex Zhu
238e793f47 drm/amd/powerplay: set uvd/vce/nb/mclk level as UMD P-state required
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:22:33 -04:00
Rex Zhu
9947f7047f drm/amd/powerplay: add UMD P-state in powerplay.
This feature is for UMD to run benchmark in a
power state that is as steady as possible. kmd
need to fix the power state as stable as possible.
now, kmd support four level:
profile_standard,peak,min_sclk,min_mclk

move common related code to amd_powerplay.c

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:22:23 -04:00
Rex Zhu
47047263c5 drm/amd/powerplay: delete eventmgr related files.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:22:14 -04:00
Rex Zhu
df1e639420 drm/amd/powerplay: delete eventmgr layer in poweprlay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-12 14:21:50 -04:00
Alex Deucher
cd00a424d2 drm/amd/powerplay: fix sclk setting for profile mode for CZ/ST
Need to select dpm0 to avoid clock fluctuations.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 15:01:21 -04:00
Thierry Reding
1430f73beb drm/amdgpu: Use correct path to trace include
The header comment in include/trace/define_trace.h specifies that the
TRACE_INCLUDE_PATH needs to be relative to the define_trace.h header
rather than the trace file including it. Most instances get that wrong
and work around it by adding the $(src) directory to the include path.

While this works, it is preferable to refer to the correct path to the
trace file in the first place and avoid any workaround.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 15:01:20 -04:00
Tom St Denis
f053cd478e drm/amd/amdgpu: Cleanup gmc_v9_0_suspend()
Even though fini returns 0 always it could theoretically
fail in the future.  Might as well return it instead of 0.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:51:24 -04:00
Tom St Denis
4d9c333a46 drm/amd/amdgpu: Tidy up gmc_v9_0_hw_init()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:51:16 -04:00
Tom St Denis
846347c9f5 drm/amd/amdgpu: Tidy up gmc_v9_0_gart_enable()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:51:09 -04:00
Tom St Denis
ae6d1416fa drm/amd/amdgpu: Simplify gmc_v9_0_vm_fault_interrupt_state()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:51:01 -04:00
Tom St Denis
f6886c4726 drm/amd/amdgpu: Support full range of GFX ring names
Right now there's only one but the rest of the code is being
setup to support more so might as well fix this up too.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:50:53 -04:00
Christian König
70a9c6b901 drm/amdgpu: fix placement flags in amdgpu_ttm_bind
Otherwise we lose the NO_EVICT flag and can try to evict pinned BOs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:50:45 -04:00
Christian König
481c2e9489 drm/amdgpu: fix moved list handling in the VM
Only move BOs to the moved/relocated list when they aren't already on a list.

This prevents accidential removal from the evicted list.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:50:35 -04:00
Evan Quan
f583046596 drm/amdgpu: declare the new firmware files needed by polaris asics
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:50:03 -04:00
Roger He
6849d47cab drm/amdgpu: handle all fragment sizes v4
This can improve performance for some cases.

v2 (chk): handle all sizes, simplify the patch quite a bit
v3 (chk): adjust dw estimation as well
v4 (chk): use single loop, make end mask 64bit

Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Roger He <Hongbo.He@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-01 12:49:32 -04:00
Tom St Denis
2b9bdfa70f drm/amd/amdgpu: Simplify gfx_v9_0_wait_for_idle()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:06 -04:00
Tom St Denis
78888cff5c drm/amd/amdgpu: Fix indentation in gfx_v9_0_mqd_init()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:05 -04:00
Tom St Denis
b08796cee1 drm/amd/amdgpu: Tidy up gfx_v9_0_rlc_stop()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:05 -04:00
Tom St Denis
e567fa69f2 drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_dynamic_mg_power_gating()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:04 -04:00
Tom St Denis
7915c8fd7e drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_static_mg_power_gating()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:03 -04:00
Tom St Denis
513f81332a drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_pipeline_powergating()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:03 -04:00
Tom St Denis
f55ee212ee drm/amd/amdgpu: Tidy up gfx_v9_0_enable_gfx_cg_power_gating()
Make it consistent in style with the other CG/PG enable functions...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:02 -04:00
Tom St Denis
54cfe0fc54 drm/amd/amdgpu: Tidy up gfx_v9_0_enable_cp_power_gating()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:02 -04:00
Tom St Denis
b926fe8efc drm/amd/amdgpu: Tidy up gfx_v9_0_enable_sck_slow_down_on_power_down()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:01 -04:00
Tom St Denis
e24c7f06db drm/amd/amdgpu: Tidy up gfx_v9_0_enable_sck_slow_down_on_power_up()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:00 -04:00
Tom St Denis
0e5293d07b drm/amd/amdgpu: Tidy up gfx_v9_0_enable_save_restore_machine()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:01:00 -04:00
Tom St Denis
91629eff74 drm/amd/amdgpu: Tidy up gfx_v9_0_ngg_en()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:00:59 -04:00
Tom St Denis
35c32f20a7 drm/amd/amdgpu: Tidy up register list formatting.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 15:00:59 -04:00
Christian König
fd8bf087df drm/amdgpu: bump version for support of local BOs
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:46:45 -04:00
Christian König
e1eb899b45 drm/amdgpu: add IOCTL interface for per VM BOs v3
Add the IOCTL interface so that applications can allocate per VM BOs.

Still WIP since not all corner cases are tested yet, but this reduces average
CS overhead for 10K BOs from 21ms down to 48us.

v2: add some extra checks, remove the WIP tag
v3: rename new flag to AMDGPU_GEM_CREATE_VM_ALWAYS_VALID

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:46:35 -04:00
Christian König
73fb16e7eb drm/amdgpu: add support for per VM BOs v2
Per VM BOs are handled like VM PDs and PTs. They are always valid and don't
need to be specified in the BO lists.

v2: validate PDs/PTs first

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:46:26 -04:00
Christian König
4f5839c56e drm/amdgpu: restrict userptr even more
Don't allow them to be GEM imported into another process.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:46:17 -04:00
Christian König
0f2fc435d8 drm/amdgpu: fix new PD update code for Vega10 v2
We need to refer to the parent instead of the root BO for multi
level page tables on Vega10. Also don't set the PDE_PTE bit.

v2: Don't set the PDE_PTE bit either.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:46:08 -04:00
Christian König
705e519e0e drm/amdgpu: move hw generation check into amdgpu_doorbell_init v2
This way we can safely call it on SI as well.

v2: fix type in commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:45:59 -04:00
Christian König
570144c652 drm/amdgpu: cleanup the VM code a bit more
The src isn't used any more after GART hack removal.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:45:47 -04:00
Christian König
ea09729c93 drm/amdgpu: rework page directory filling v2
Keep track off relocated PDs/PTs instead of walking and checking all PDs.

v2: fix root PD handling

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 13:45:24 -04:00
Himanshu Jha
ebe02de2c6 drm/amd/powerplay/hwmgr: Remove null check before kfree
kfree on NULL pointer is a no-op and therefore checking is redundant.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by:  Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Himanshu Jha <himanshujha199640@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:57:33 -04:00
Himanshu Jha
c5927537dd drm/amd: Remove null check before kfree
Kfree on NULL pointer is a no-op and therefore checking is redundant.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Himanshu Jha <himanshujha199640@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:57:32 -04:00
Christian König
3f3333f8a0 drm/amdgpu: track evicted page tables v2
Instead of validating all page tables when one was evicted,
track which one needs a validation.

v2: simplify amdgpu_vm_ready as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:04 -04:00
Christian König
00b5cc83c4 drm/amdgpu: fix comment on amdgpu_bo_va
Except for the reference count all other members are protected
by the VM PD being reserved.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:04 -04:00
Christian König
cb7b6ec2f8 drm/amdgpu: add bo_va cleared flag again v2
We changed this to use an extra list a while back, but for the next
series I need a separate flag again.

v2: reorder to avoid unlocked list access

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:03 -04:00
Christian König
3d7d4d3a1b drm/amdgpu: rework moved handling in the VM v2
Instead of using the vm_state use a separate flag to note
that the BO was moved.

v2: reorder patches to avoid temporary lockless access

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:02 -04:00
Tom St Denis
08cab989f7 drm/amd/amdgpu: Add write() method to VRAM debugfs entry (v2)
Allows writing data to vram via debugfs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

(v2):  Call get_user before holding spinlock.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:02 -04:00
Rex Zhu
841e3be124 drm/amd/powerplay: notify smu once display changed on Rv.
when User turn off display or screen idle timeout,
smu need this message to start S0i2 entry.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:01 -04:00
Rex Zhu
3b4ca9e649 drm/amd/powerplay: add dummy pp table for raven. (v2)
As there is no PPTable in RV, it is difficult to
cleanly decouple PPTABLE functionality in existing
codes.

v2: agd: squash in clean build fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:01 -04:00
Rex Zhu
e154162ef7 drm/amd/powerplay: refine pp code for raven
delete useless code.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:00 -04:00
Alex Deucher
ffe6d881e9 drm/amdgpu/gfx9: adjust mqd allocation size
To allocate additional space for the dynamic cu masks.
Confirmed with the hw team that we only need 1 dword
for the mask.  The mask is the same for each SE so
you only need 1 dword.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:28:00 -04:00
Alex Deucher
29696bd680 drm/amdgpu/gfx9: update mqd to include dynamic CU mask
Necessary for proper operation with KIQ.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:59 -04:00
Alex Deucher
31bf29ab39 drm/amdgpu/gfx8: drop cz mqd
It was unused and according to hw team, it's the same for
all asics in a gfx family so remove it.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:58 -04:00
Alex Deucher
925d5d798f drm/amdgpu/gfx8: apply dynamic cu mask to APUs as well
Confirmed with the hw team.  It's the same for all asics.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:58 -04:00
Alex Deucher
ecf9d34485 drm/amdgpu/powerplay/vega10: fix typo in register base index
Probably a copy pasta.  No functional difference, both have
the same value.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reported-by: Michael von Khurja <mvonkhurja@techpowerup.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:57 -04:00
Christian König
6ac7defb5c drm/amdgpu: cleanup GWS, GDS and OA allocation
Those are certainly not kernel allocations, instead set the NO_CPU_ACCESS flag.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:57 -04:00
Christian König
34d7be5dc2 drm/amdgpu: fix and cleanup VM ready check
Stop checking the mapped BO itself, cause that one is
certainly not a page table.

Additional to that move the code into amdgpu_vm.c

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:56 -04:00
Christian König
87f64a76b3 drm/amdgpu: fix amdgpu_vm_bo_map trace point
That somehow got lost.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:55 -04:00
Kent Russell
5b41d94cc4 drm/amdgpu: Move VBIOS version to sysfs
sysfs is more stable, and doesn't require root to access

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:55 -04:00
Kent Russell
db95e21855 drm/amdgpu: Add debugfs file for VBIOS and version
Add 2 debugfs files, one that contains the VBIOS version, and one that
contains the VBIOS itself. These won't change after initialization,
so we can add the VBIOS version when we parse the atombios information.

This ensures that we can find out the VBIOS version, even when the dmesg
buffer fills up, and makes it easier to associate which VBIOS version is
for which GPU on mGPU configurations. Set the size to 20 characters in
case of some weird VBIOS version that exceeds the expected 17 character
format (3-8-3\0). The VBIOS dump also allows for easy debugging

    v2: Move to debugfs, clarify commit message, add VBIOS dump file

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:54 -04:00
Tom St Denis
7405e0dad4 drm/amd/amdgpu: Use new TTM populate/map helper function
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:52 -04:00
Harry Wentland
e719d5169f drm/amd/include: Add hdmi_redriver_set to atomfirmware
We'll need this for a some upcoming display changes

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:51 -04:00
Tom St Denis
ca3670aa37 drm/amd/amdgpu: Remove AMDGPU tracepoint and use new TTM tracepoint (v2)
Switches the AMDGPU driver over to the TTM tracepoint and removes
our old one.  Now you can enable traces before loading the module
and trace all mappings.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

(v2): Use struct device instead of pci in trace.
2017-08-29 15:27:51 -04:00
Evan Quan
727030b0c6 drm/amdgpu: support polaris10/11/12 new cp firmwares
Newer versions of the CP firmware require changes in how the driver
initializes the hw block.
Change the firmware name for new firmware to maintain compatibility with
older kernels.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:50 -04:00
Colin Ian King
fd4b5f54e1 drm/amdgpu: remove duplicate return statement
Remove a redundant identical return statement, it has no use.

Detected by CoverityScan, CID#1454586 ("Structurally dead code")

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:49 -04:00
Christophe JAILLET
06f10a537e drm/amdgpu: check memory allocation failure
Check memory allocation failure and return -ENOMEM in such a case.

'num_post_dep_syncobjs' still has to be set to 0 before the test in order
to have it initialized if 'amdgpu_cs_parser_fini()' is called to free
resources.

The calling graph would be, in such a case!
   failure in amdgpu_cs_process_syncobj_out_dep()
      ---> error code returned by amdgpu_cs_dependencies()
         --> amdgpu_cs_parser_fini() is called

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:48 -04:00
Roger He
a3ce364558 drm/amd/amdgpu: fix BANK_SELECT on Vega10 (v2)
BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3)
per cache line in L2 TLB for Vega10.

v2: agd: fix warning

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:48 -04:00
Christian König
1cacc86a63 drm/amdgpu: inline amdgpu_ttm_do_bind again
The function is called only once and doesn't do anything special.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:47 -04:00
Christian König
9b0655e3ad drm/amdgpu: fix amdgpu_ttm_bind
Use ttm_bo_mem_space instead of manually allocating GART space.

This allows us to evict BOs when there isn't enought GART space any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:46 -04:00
Christian König
febb84a603 drm/amdgpu: remove the GART copy hack
This isn't used since we don't map evicted BOs to GART any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:46 -04:00
Alex Deucher
b249e18df1 drm/amdgpu: set sched_hw_submission higher for KIQ (v3)
KIQ doesn't really use the GPU scheduler.  The base
drivers generally use the KIQ ring directly rather than
submitting IBs.  However, amdgpu_sched_hw_submission
(which defaults to 2) limits the number of outstanding
fences to 2.  KFD uses the KIQ for TLB flushes and the
2 fence limit hurts performance when there are several KFD
processes running.

v2: move some expressions to one line
    change KIQ sched_hw_submission to at least 16
v3: bump to 256

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:44 -04:00
Alex Deucher
c3db7b5a55 drm/amdgpu: move default gart size setting into gmc modules
Move the asic specific code into the IP modules.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-29 15:27:43 -04:00