Add clocks property to rk3066a/rk3188 cru node to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329111323.3569-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the conversion of rockchip-usb-phy.yaml a long time used fallback
string for rk3066a/rk3188 was added. The linux driver doesn't do much with
the GRF phy address range, however the u-boot driver rockchip_usb2_phy.c
does. The bits in GRF_UOC0_CON2 for rk3066a/rk3188 and rk3288 for example
don't match. Remove the usb-phy fallback string for rk3066a/rk3188
to prevent possible strange side effects.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828111218.10026-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211007144019.7461-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
After the conversion to YAML of the Operating Performance Points(OPP)
binding the operating-points property expects values in
a uint32-matrix with 2 items, so fix the notifications by adding
angle brackets.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/opp/opp-v1.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828091233.19992-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The compatible string "snps,dw-apb-timer-osc" was deprecated in place
of "snps,dw-apb-timer". Rename the timer compatible strings in
rk3066a.dtsi, so boot loaders like U-boot can use the timer node
directly without conversion.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210709101624.1463-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Rename pcfg_* nodenames for rk3066/rk3188 to pcfg-*,
so that they fit in the regex with the other Rockchip SoCs.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210711112154.5287-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the vpu node to the common rk3xxx.dtsi and only the powerdomain
property to the SoC specific device trees.
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210527154455.358869-12-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
While the kernel doesn't care so much right now, boot loaders like
u-boot need to refine the node on their side, so to make life easier
for everyone add the labels to the timer nodes on rk3066a.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210612184733.2331-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With grf.txt converted to YAML a lot of compatibles
did not have 'simple-mfd' added in the old binding.
That implies that if you have child nodes they need
to be documented.
Make the new layout fit for rk3066/rk3188,
move and restyle the grf nodes.
Remove rockchip,grf from usbphy node.
Add "#phy-cells", because it is a required property
by phy-provider.yaml
With the conversion of syscon.yaml minItems for compatibles
was set to 2. Current Rockchip rk3xxx.dtsi file only uses "syscon"
for the grf registers. Add "syscon", "simple-mfd"
compatible for rk3066/rk3188 to reduce notifications produced with:
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml
Changed compatibles:
"rockchip,rk3066-grf", "syscon", "simple-mfd"
"rockchip,rk3188-grf", "syscon", "simple-mfd"
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210512122346.9463-4-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-5-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210417112952.8516-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
An experimental test with the command below gives
for example this error:
arch/arm/boot/dts/rk3036-evb.dt.yaml: i2s@10220000:
'#address-cells', '#size-cells'
do not match any of the regexes: 'pinctrl-[0-9]+'
'#address-cells' and '#size-cells' are not a valid property
for i2s nodes, so remove them.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Current dts files with 'i2s' nodes are manually verified.
In order to automate this process rockchip-i2s.txt
has to be converted to yaml. In the new setup dtbs_check with
rockchip-i2s.yaml expect clocks and clock-names values
in the same order. Fix this for some older Rockchip models.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/sound/rockchip-i2s.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200311162524.19748-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the hdmi nodes to rk3066.
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the core display subsystem and vop nodes to rk3066.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
A MK808 TV stick with rk3066 processor boots normal with logo
and console, but after booting the monitor remains black.
This patch fixes a vblank wait time out by adding HCLK_HDMI
to the vio power-domain node.
The HCLK_HDMI clock is now part of the logic
that enables the RK3066_PD_VIO power domain.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Rockchip i2s always just requires a sound-dail-cells value of 0,
so add them to the core soc dtsi for convenience.
Signed-off-by: Heiko Stuebner <heiko.stuebner@bq.com>
Update all 32bit rockchip devicetree files to use SPDX-License-Identifiers.
All files except rk3288-veyron-analog-audio.dtsi (which is GPL 2.0 only)
claim to be GPL and X11 while the actual license text is MIT. Use the
MIT SPDX tag for them.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Brian Norris <briannorris@chromium.org>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The interrupts were wrongly named as ppXmmu while the binding
specifies them as ppmmuX.
Fix that for the recently added Utgard mali nodes on Rockchip socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The old Cortex-A9 socs use Mali400 GPUs with 4 pixel processors.
This adds the core gpu nodes with the per-soc interrupts but sharing
the core node.
Rockchip SoCs use only one clock to supply the GPUs
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The serial IPs in Rockchip socs are based on Designware uarts and thus
bind against the snps,dw-apb-uart compatible.
On all newer socs we also carry around per-soc compatibles that allow
us to have more specific drivers in the future - if needed.
The cortex-a9 socs rk3066 and rk3188 that were added first don't have
those yet, so add them for completenes sake.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
DMA controller driver is in good shape these days on rockchip platforms.
So lets enable DMA for uart and mmc.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently driver leaves sdmmc frequency at its default.
So lets set this to 50MHz.
This gives us performance boost in mmc transfers.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Initialize PLL, cpu bus and peripherial bus rate while kernel init.
No other module does than.
This gives us performance boost observable for example in mmc transfers.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
SARADC controller needs to be reset before programming it, otherwise
it will not function properly.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
The cpu_leakage efuse on rk3288 did get it right including the
unitname but on both rk3066a and rk3188 it was missing, fix that.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
The usbphy subnodes do have a reg property but no unitname, add them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Add the device node for the TSADC found on rk3066.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the #clock-cells properties for the usbphy nodes as they
provide the pll-clocks now.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The current vdd_arm voltage is too low, increase it will make
the system more stable.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds the usbphy nodes to rk3066 and rk3188, which share the usb hosts
in rk3xxx.dtsi and also enables it on boards based around these socs.
The usb-phy itself is the same as used on the rk3288 already.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
GPLv2-only devicetrees make reuse difficult for software components licensed
under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary uses,
so relicense the rk3066a.dtsi to this combination.
CCs were aquired by git shortlog -sne so it should've hopefully catched
every contributor.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Julien Chauveau <chauveau.julien@gmail.com>
This patch adds the right pins topology for the MAC and MDIO
found in RK3066 SoCs. Boards based on this SoC have an
initial support for the emac-rockchip dt-binding.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the I2S/PCM controller nodes and pin controls for rk3066 and rk3188.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add basic OPP entries for current supported Rockchip SoCs.
The operating points are currently very conservative, so individual
boards may opt to redefine them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the controller node, pinctrl settings for the customizable pins
and sort the controllers like on rk3288 as emmc, sdmmc, sdio for
handling convenience.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Modified to use the new clock defines and added rk3066 pins.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pincontroller uses the GRF and PMU syscons nowadays, so should not
contain an address in its device node.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
