Commit graph

8 commits

Author SHA1 Message Date
Andy Shevchenko
810644cc7c pinctrl: bm1880: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.

While at it, sort headers alphabetically.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-10-24 12:53:33 +03:00
Lee Jones
21f9798500 pinctrl: pinctrl-bm1880: Rename ill documented struct attribute entries
Fixes the following W=1 kernel build warning(s):

 drivers/pinctrl/pinctrl-bm1880.c:40: warning: Function parameter or member 'pctrldev' not described in 'bm1880_pinctrl'
 drivers/pinctrl/pinctrl-bm1880.c:40: warning: Function parameter or member 'pinconf' not described in 'bm1880_pinctrl'

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200713144930.1034632-19-lee.jones@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-16 15:13:55 +02:00
Jason Yan
0320d260a7 pinctrl: bm1880: add pwm37 to bm1880_pctrl_groups
The 'pwm37' is not added to bm1880_pctrl_groups, which triggers a gcc
build warning:

drivers/pinctrl/pinctrl-bm1880.c:263:27: warning: ‘pwm37_pins’ defined
but not used [-Wunused-const-variable=]
 static const unsigned int pwm37_pins[] = { 110 };

Signed-off-by: Jason Yan <yanaijie@huawei.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200428115543.33379-1-yanaijie@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-28 16:28:37 +02:00
YueHaibing
4b024225c4 pinctrl: use devm_platform_ioremap_resource() to simplify code
devm_platform_ioremap_resource() internally have platform_get_resource()
and devm_ioremap_resource() in it. So instead of calling them separately
use devm_platform_ioremap_resource() directly.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191104142654.39256-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-11-05 15:33:40 +01:00
Manivannan Sadhasivam
9f1e3c5966 pinctrl: Add drive strength support for BM1880 SoC
Add drive strength support for Bitmain BM1880 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-08 01:29:42 +02:00
Manivannan Sadhasivam
49bd61ebce pinctrl: Add pinconf support for BM1880 SoC
Add pinconf support for Bitmain BM1880 SoC. Pinconf support includes
pin bias, slew rate and schmitt trigger. Drive strength support will
be added later.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24 13:54:08 +02:00
Manivannan Sadhasivam
8247b2474b pinctrl: Rework the pinmux handling for BM1880 SoC
Rework the BM1880 SoC pinmux handling by removing the
BM1880_PINMUX_FUNCTION_MUX define and merging it with the
BM1880_PINMUX_FUNCTION definition. Since the PWM muxing is handled by
generic pin controller in the SoC itself, there is no need to have a
dedicated code to do the muxing in PWM registers. So, lets club all
pinmux handling in the same per pin mux handling code.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24 13:52:15 +02:00
Manivannan Sadhasivam
8f3f024696 pinctrl: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. The driver only handles
pinmuxing as the SoC is not capable of handling pinconf.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-03 07:53:13 +01:00