Commit graph

535 commits

Author SHA1 Message Date
Linus Torvalds
3361e9a4ea remoteproc updates for v6.4
Unnecessary type casts from the void * rproc->priv pointer is dropped
 throughout te subsystem.
 
 A kernel-doc error is corrected in the Mediatek SCPI IPI implementation.
 
 The firmware loading onto the IMX DSP remote processors is reworked to
 avoid non-32bit memory operations. A module parameter is introduced to
 assist development of firmware without communication abilities in place.
 Error paths in imx_dsp_rproc_mbox_alloc() is cleaned up.
 
 The cluster configuration handling in the TI K3 R5 driver is corrected
 and support for the single-R5 core found in the TI AM62x SoC family is
 introduced.
 
 The TI PRU driver device- to virtual-address translation is updated to
 avoid compiler warning about the unsigned device-address always being
 larger than 0.
 
 The ST remoteproc driver is transitioned to use of_property_present().
 
 Issues with kicks arriving after the STM32 remote processor has been
 shut down are mitigated by checking the processor's state before
 handling them.
 
 Support for mailbox channels for communication with the remote
 processors are added to the Xilinx R5 remoteproc driver. The naming of
 carveouts are corrected and their parsing is reworked.
 For this a couple of fixes targeting the mailbox subsystem are picked up
 here as well.
 
 Reference counting of of_nodes are corrected in the ST, STM32, RCAR and
 IMX remoteproc drivers.
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Merge tag 'rproc-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:

 - Unnecessary type casts from the 'void *' rproc->priv pointer are
   dropped throughout the subsystem.

 - A kernel-doc error is corrected in the Mediatek SCPI IPI
   implementation

 - The firmware loading onto the IMX DSP remote processors is reworked
   to avoid non-32bit memory operations. A module parameter is
   introduced to assist development of firmware without communication
   abilities in place. Error paths in imx_dsp_rproc_mbox_alloc() is
   cleaned up

 - The cluster configuration handling in the TI K3 R5 driver is
   corrected and support for the single-R5 core found in the TI AM62x
   SoC family is introduced

 - The TI PRU driver device- to virtual-address translation is updated
   to avoid compiler warning about the unsigned device-address always
   being larger than 0

 - The ST remoteproc driver is transitioned to use of_property_present()

 - Issues with kicks arriving after the STM32 remote processor has been
   shut down are mitigated by checking the processor's state before
   handling them.

 - Support for mailbox channels for communication with the remote
   processors are added to the Xilinx R5 remoteproc driver. The naming
   of carveouts are corrected and their parsing is reworked. For this a
   couple of fixes targeting the mailbox subsystem are picked up here as
   well.

 - Reference counting of of_nodes are corrected in the ST, STM32, RCAR
   and IMX remoteproc drivers

* tag 'rproc-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (24 commits)
  remoteproc: st: Use of_property_present() for testing DT property presence
  dt-bindings: remoteproc: Drop unneeded quotes
  remoteproc: imx_dsp_rproc: Fix kernel test robot sparse warning
  remoteproc: imx_dsp_rproc: Improve exception handling in imx_dsp_rproc_mbox_alloc()
  remoteproc: pru: Remove always true check positive unsigned value
  dt-bindings: remoteproc: stm32-rproc: Typo fix
  remoteproc: stm32_rproc: Add mutex protection for workqueue
  remoteproc: Remove unnecessary (void*) conversions
  remoteproc: imx_dsp_rproc: Call of_node_put() on iteration error
  remoteproc: imx_rproc: Call of_node_put() on iteration error
  remoteproc: rcar_rproc: Call of_node_put() on iteration error
  remoteproc: st: Call of_node_put() on iteration error
  remoteproc: stm32: Call of_node_put() on iteration error
  remoteproc: k3-r5: Use separate compatible string for TI AM62x SoC family
  dt-bindings: remoteproc: ti: Add new compatible for AM62 SoC family
  remoteproc: k3-r5: Simplify cluster mode setting usage
  remoteproc/mtk_scpi_ipi: Fix one kernel-doc comment
  remoteproc: xilinx: Add mailbox channels for rpmsg
  drivers: remoteproc: xilinx: Fix carveout names
  mailbox: zynqmp: Fix typo in IPI documentation
  ...
2023-04-25 17:38:25 -07:00
Rob Herring
2a61e7b7bd mailbox: Use of_property_read_bool() for boolean properties
It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties.
Convert reading boolean properties to to of_property_read_bool().

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-04-18 11:50:56 -05:00
Elliot Berman
76d4adacd5 mailbox: pcc: Use mbox_bind_client
Use generic mbox_bind_client() to bind omap mailbox channel to a client.

mbox_bind_client is identical to the replaced lines, except that it:
 - Does the operation under con_mutex which prevents possible races in
   removal path
 - Sets TXDONE_BY_ACK if pcc uses TXDONE_BY_POLL and the client knows
   when tx is done. TXDONE_BY_ACK is already set if there's no interrupt,
   so this is not applicable.
 - Calls chan->mbox->ops->startup. This is usecase for requesting irq:
   move the devm_request_irq into the startup callback and unregister it
   in the shutdown path.

Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-04-18 11:48:56 -05:00
Elliot Berman
f11ff34d88 mailbox: omap: Use mbox_bind_client
Use generic mbox_bind_client() to bind omap mailbox channel to a client.

mbox_bind_client is identical to the replaced lines, except that it:
 - Does the operation under con_mutex which prevents possible races in
   removal path
 - Sets TXDONE_BY_ACK if omap uses TXDONE_BY_POLL. omap uses
   TXDONE_BY_IRQ, so this check is not applicable.
 - Calls chan->mbox->ops->startup, if available. omap doesn't have, so
   this is not applicable.

Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-04-18 11:48:55 -05:00
Elliot Berman
85a9538065 mailbox: Allow direct registration to a channel
Support virtual mailbox controllers and clients which are not platform
devices or come from the devicetree by allowing them to match client to
channel via some other mechanism.

Tested-by: Sudeep Holla <sudeep.holla@arm.com> (pcc)
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-04-18 11:48:55 -05:00
Nick Alcock
4f2fe3964c mailbox: zynq: make modular
This driver has a MODULE_LICENSE but is not tristate so cannot be
built as a module, unlike all its peers: make it modular to match.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:52 -07:00
Nick Alcock
7b51090edc mailbox: rockchip: remove MODULE_LICENSE in non-modules
Since commit 8b41fc4454 ("kbuild: create modules.builtin without
Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations
are used to identify modules. As a consequence, uses of the macro
in non-modules will cause modprobe to misidentify their containing
object file as a module when it is not (false positives), and modprobe
might succeed rather than failing with a suitable error message.

So remove it in the files in this commit, none of which can be built as
modules.

Signed-off-by: Nick Alcock <nick.alcock@oracle.com>
Suggested-by: Luis Chamberlain <mcgrof@kernel.org>
Cc: Luis Chamberlain <mcgrof@kernel.org>
Cc: linux-modules@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Hitomi Hasegawa <hasegawa-hitomi@fujitsu.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Luis Chamberlain <mcgrof@kernel.org>
2023-04-13 13:13:52 -07:00
Conor Dooley
37e3430176 mailbox: mpfs: check the service status in .tx_done()
Services are supposed to generate an interrupt once completed, whether
or not they have do so successfully. What appears to be a bug in the
system controller means that interrupts are only generated for
*successful* services.

Currently, the status of a service is only checked in the
mpfs_mbox_rx_data() once an interrupt is received. As it turns out, this
is not really helpful where the potentially buggy behaviour is present,
as we'll only see the status for successes where it is moot anyway.

Jassi suggested moving the check to the .tx_done() callback instead.
This makes sense, as the busy bit that tx_done() is polling will be
lowered on completion, regardless of whether the service passed or
failed.
That allows us to check the status bits for all services, whether they
generate an interrupt or not & pass something more informative than
-EBADMSG back to the drivers implementing individual services.

Suggested-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Tested-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-03 19:26:04 +01:00
Conor Dooley
da82f95f7c mailbox: mpfs: ditch a useless busy check
mpfs_mbox_rx_data() already checks if the system controller is busy
before attempting to do anything, so drop the second check before
reading any data.

No functional change intended.

Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Tested-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-03 19:25:52 +01:00
Conor Dooley
b5984a9844 mailbox: mpfs: switch to txdone_poll
The system controller on PolarFire SoC has no interrupt to signify that
the TX has been completed. The interrupt instead signals that a service
requested by the mailbox client has succeeded. If a service fails, there
will be no interrupt delivered.

Switch to polling the busy register to determine whether transmission
has completed.

Fixes: 83d7b15608 ("mbox: add polarfire soc system controller mailbox")
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Tested-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-03 19:25:46 +01:00
Conor Dooley
75dfbcbfd7 mailbox: mpfs: fix an incorrect mask width
The system controller registers on PolarFire SoC are 32 bits wide, so
16 + 16 as the first input to GENMASK_ULL() gives a 33 bit wide mask.
It probably should have been immediately obvious when it was pointed
out during review that the width required using GENMASK_ULL() - but I
scarcely knew what I was doing at the time and missed it.
The mistake ends up being moot as it is a mask after all, but it is
incorrect and should be fixed.

No functional change intended.

Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Tested-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-03 19:25:31 +01:00
Tanmay Shah
74ad37a30f mailbox: zynqmp: Fix IPI isr handling
Multiple IPI channels are mapped to same interrupt handler.
Current isr implementation handles only one channel per isr.
Fix this behavior by checking isr status bit of all child
mailbox nodes.

Fixes: 4981b82ba2 ("mailbox: ZynqMP IPI mailbox controller")
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230311012407.1292118-3-tanmay.shah@amd.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2023-03-14 13:28:04 -06:00
Tanmay Shah
f72f805e72 mailbox: zynqmp: Fix counts of child nodes
If child mailbox node status is disabled it causes
crash in interrupt handler. Fix this by assigning
only available child node during driver probe.

Fixes: 4981b82ba2 ("mailbox: ZynqMP IPI mailbox controller")
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230311012407.1292118-2-tanmay.shah@amd.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2023-03-14 13:27:53 -06:00
Kathiravan T
1261a6626a mailbox: qcom-apcs-ipc: add IPQ5332 APSS clock support
IPQ5332 has the APSS clock controller utilizing the same register space
as the APCS, so provide access to the APSS utilizing a child device like
other IPQ chipsets.

Like IPQ6018, the same controller and driver is used, so utilize IPQ6018
match data for IPQ5332.

Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-02-23 14:47:13 -06:00
Dmitry Baryshkov
adb239f340 mailbox: qcom-apcs-ipc: enable APCS clock device for MSM8996
MSM8996 also has the clock-related part of the APCS mailbox device.
Follow the usual pattern and create a child device to handle these
clocks.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-02-23 14:47:12 -06:00
Christophe JAILLET
043f85ce81 mailbox: zynq: Switch to flexible array to simplify code
Using flexible array is more straight forward. It
  - saves 1 pointer in the 'zynqmp_ipi_pdata' structure
  - saves an indirection when using this array
  - saves some LoC and avoids some always spurious pointer arithmetic

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-02-23 14:47:12 -06:00
Linus Torvalds
f2855eec19 - qcom: enable sc8280xp, sm8550 and sm4250 support
- ti: default to ARCH_K3 for msg manager
 - mediatek: add mt8188 and mt8186 support
             request irq only after got ready
 - zynq-ipi: fix error handling after device_register
 - mpfs: check sys-con status
 - rockchip: simplify by using device_get_match_data
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Merge tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom: enable sc8280xp, sm8550 and sm4250 support

 - ti: default to ARCH_K3 for msg manager

 - mediatek:
    - add mt8188 and mt8186 support
    - request irq only after got ready

 - zynq-ipi: fix error handling after device_register

 - mpfs: check sys-con status

 - rockchip: simplify by using device_get_match_data

* tag 'mailbox-v6.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: qcom-ipcc: Add compatible for SM8550
  mailbox: mtk-cmdq: Do not request irq until we are ready
  mailbox: zynq-ipi: fix error handling while device_register() fails
  mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying
  mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()
  dt-bindings: mailbox: mediatek,gce-mailbox: add mt8188 compatible name
  dt-bindings: mailbox: add GCE header file for mt8188
  mailbox: mpfs: read the system controller's status
  mailbox: mtk-cmdq: add MT8186 support
  mailbox: mtk-cmdq: add gce ddr enable support flow
  mailbox: mtk-cmdq: add gce software ddr enable private data
  mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
  mailbox: rockchip: Use device_get_match_data() to simplify the code
  dt-bindings: mailbox: qcom-ipcc: Add sc8280xp compatible
  mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager
  mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support
  dt-bindings: mailbox: qcom: Add SM4250 APCS compatible
2022-12-21 09:31:18 -08:00
Ricardo Ribalda
16edcfef77 mailbox: mtk-cmdq: Do not request irq until we are ready
If the system comes from kexec() the peripheral might trigger an IRQ
befoe we are ready for it. Triggering a crash due to an access to
invalid memory.

Signed-off-by: Ricardo Ribalda <ribalda@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:31 -06:00
Yang Yingliang
a6792a0cde mailbox: zynq-ipi: fix error handling while device_register() fails
If device_register() fails, it has two issues:
1. The name allocated by dev_set_name() is leaked.
2. The parent of device is not NULL, device_unregister() is called
   in zynqmp_ipi_free_mboxes(), it will lead a kernel crash because
   of removing not added device.

Call put_device() to give up the reference, so the name is freed in
kobject_cleanup(). Add device registered check in zynqmp_ipi_free_mboxes()
to avoid null-ptr-deref.

Fixes: 4981b82ba2 ("mailbox: ZynqMP IPI mailbox controller")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
AngeloGioacchino Del Regno
acabe12c61 mailbox: mtk-cmdq-mailbox: Use platform data directly instead of copying
Copying platform data to struct cmdq serves to no purpose, as that
data is never modified during runtime: it's worth at this point
storing a pointer to gce_plat in gce and.

Remove all duplicated `struct gce_plat` members from `struct gce`
and reuse the platform data across the driver to save some memory.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Yang Yingliang
165b7643f2 mailbox: arm_mhuv2: Fix return value check in mhuv2_probe()
If devm_of_iomap() fails, it returns ERR_PTR() and never
return NULL, so replace NULL pointer check with IS_ERR()
to fix this problem.

Fixes: 5a6338cce9 ("mailbox: arm_mhuv2: Add driver")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Conor Dooley
ab47d0bfdf mailbox: mpfs: read the system controller's status
Some services explicitly return an error code in their response, but
others rely on the system controller to set a status in its status
register. The meaning of the bits varies based on what service is
requested, so pass it back up to the driver that requested the service
in the first place. The field in the message struct already existed, but
was unused until now.

If the system controller is busy, in which case we should never actually
be in the interrupt handler, or if the service fails the mailbox itself
should not be read. Callers should check the status before operating on
the response.

There's an existing, but unused, #define for the mailbox mask - but it
was incorrect. It was doing a GENMASK_ULL(32, 16) which should've just
been a GENMASK(31, 16), so fix that up and start using it.

Fixes: 83d7b15608 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Yongqiang Niu
926d6214f6 mailbox: mtk-cmdq: add MT8186 support
add MT8186 cmdq support

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Yongqiang Niu
7abd037aa5 mailbox: mtk-cmdq: add gce ddr enable support flow
add gce ddr enable control flow when gce suspend/resume

when all cmdq instruction task has been processed done,
we need set this gce ddr enable to disable status to tell
cmdq hardware gce there is none task need process, and the hardware
can go into idle mode and no access ddr anymore, then the spm can go
into suspend.

the original issue is gce still access ddr when cmdq suspend function
call, but there is no task run.
so, we need control gce access ddr with this flow.
when cmdq suspend function, there is no task need process, we can
disable gce access ddr, to make sure system go into suspend success.

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:30 -06:00
Yongqiang Niu
63f40a7f5d mailbox: mtk-cmdq: add gce software ddr enable private data
if gce work control by software, we need set software enable
for MT8186 Soc

there is a handshake flow between gce and ddr hardware,
if not set ddr enable flag of gce, ddr will fall into idle
mode, then gce instructions will not process done.
we need set this flag of gce to tell ddr when gce is idle or busy
controlled by software flow.

0x48[2:0] means control by software
0x48[18:16] means ddr enable
0x48[2:0] is pre-condition of 0x48[18:16].
if we want set 0x48[18:16] ddr enable, 0x48[2:0] must be set at same
time.
and only these bits is useful, other bits is useless bits

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:29 -06:00
Yongqiang Niu
23ba2e7fa2 mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
Use GCE_CTRL_BY_SW definition instead of number

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:29 -06:00
ye xingchen
8b9b08bd8d mailbox: rockchip: Use device_get_match_data() to simplify the code
Directly get the match data with device_get_match_data().

Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:29 -06:00
Nicolas Frayer
31c8d06e55 mailbox: config: ti-msgmgr: Default set to ARCH_K3 for TI msg manager
Defaulting the build to ARCH_K3 for the TI message manager driver.

Signed-off-by: Nicolas Frayer <nfrayer@baylibre.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:29 -06:00
Bhupesh Sharma
e2cb0eac3d mailbox: qcom-apcs-ipc: Add SM4250 APCS IPC support
Enable SM4250 APCS IPC support by adding the compatible.
It reuses msm8994_apcs_data.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-12-18 20:40:29 -06:00
Linus Torvalds
456ed864fd ACPI updates for 6.2-rc1
- Update the ACPICA code in the kernel to the 20221020 upstream
    version and fix a couple of issues in it:
 
    * Make acpi_ex_load_op() match upstream implementation (Rafael
      Wysocki).
    * Add support for loong_arch-specific APICs in MADT (Huacai Chen).
    * Add support for fixed PCIe wake event (Huacai Chen).
    * Add EBDA pointer sanity checks (Vit Kabele).
    * Avoid accessing VGA memory when EBDA < 1KiB (Vit Kabele).
    * Add CCEL table support to both compiler/disassembler (Kuppuswamy
      Sathyanarayanan).
    * Add a couple of new UUIDs to the known UUID list (Bob Moore).
    * Add support for FFH Opregion special context data (Sudeep Holla).
    * Improve warning message for "invalid ACPI name" (Bob Moore).
    * Add support for CXL 3.0 structures (CXIMS & RDPAS) in the CEDT
      table (Alison Schofield).
    * Prepare IORT support for revision E.e (Robin Murphy).
    * Finish support for the CDAT table (Bob Moore).
    * Fix error code path in acpi_ds_call_control_method() (Rafael
      Wysocki).
    * Fix use-after-free in acpi_ut_copy_ipackage_to_ipackage() (Li
      Zetao).
    * Update the version of the ACPICA code in the kernel (Bob Moore).
 
  - Use ZERO_PAGE(0) instead of empty_zero_page in the ACPI device
    enumeration code (Giulio Benetti).
 
  - Change the return type of the ACPI driver remove callback to void and
    update its users accordingly (Dawei Li).
 
  - Add general support for FFH address space type and implement the low-
    level part of it for ARM64 (Sudeep Holla).
 
  - Fix stale comments in the ACPI tables parsing code and make it print
    more messages related to MADT (Hanjun Guo, Huacai Chen).
 
  - Replace invocations of generic library functions with more kernel-
    specific counterparts in the ACPI sysfs interface (Christophe JAILLET,
    Xu Panda).
 
  - Print full name paths of ACPI power resource objects during
    enumeration (Kane Chen).
 
  - Eliminate a compiler warning regarding a missing function prototype
    in the ACPI power management code (Sudeep Holla).
 
  - Fix and clean up the ACPI processor driver (Rafael Wysocki, Li Zhong,
    Colin Ian King, Sudeep Holla).
 
  - Add quirk for the HP Pavilion Gaming 15-cx0041ur to the ACPI EC
    driver (Mia Kanashi).
 
  - Add some mew ACPI backlight handling quirks and update some existing
    ones (Hans de Goede).
 
  - Make the ACPI backlight driver prefer the native backlight control
    over vendor backlight control when possible (Hans de Goede).
 
  - Drop unsetting ACPI APEI driver data on remove (Uwe Kleine-König).
 
  - Use xchg_release() instead of cmpxchg() for updating new GHES cache
    slots (Ard Biesheuvel).
 
  - Clean up the ACPI APEI code (Sudeep Holla, Christophe JAILLET, Jay Lu).
 
  - Add new I2C device enumeration quirks for Medion Lifetab S10346 and
    Lenovo Yoga Tab 3 Pro (YT3-X90F) (Hans de Goede).
 
  - Make the ACPI battery driver notify user space about adding new
    battery hooks and removing the existing ones (Armin Wolf).
 
  - Modify the pfr_update and pfr_telemetry drivers to use ACPI_FREE()
    for freeing acpi_object structures to help diagnostics (Wang ShaoBo).
 
  - Make the ACPI fan driver use sysfs_emit_at() in its sysfs interface
    code (ye xingchen).
 
  - Fix the _FIF package extraction failure handling in the ACPI fan
    driver (Hanjun Guo).
 
  - Fix the PCC mailbox handling error code path (Huisong Li).
 
  - Avoid using PCC Opregions if there is no platform interrupt allocated
    for this purpose (Huisong Li).
 
  - Use sysfs_emit() instead of scnprintf() in the ACPI PAD driver and
    CPPC library (ye xingchen).
 
  - Fix some kernel-doc issues in the ACPI GSI processing code (Xiongfeng
    Wang).
 
  - Fix name memory leak in pnp_alloc_dev() (Yang Yingliang).
 
  - Do not disable PNP devices on suspend when they cannot be re-enabled
    on resume (Hans de Goede).
 
  - Clean up the ACPI thermal driver a bit (Rafael Wysocki).
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Merge tag 'acpi-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI and PNP updates from Rafael Wysocki:
 "These include new code (for instance, support for the FFH address
  space type and support for new firmware data structures in ACPICA),
  some new quirks (mostly related to backlight handling and I2C
  enumeration), a number of fixes and a fair amount of cleanups all
  over.

  Specifics:

   - Update the ACPICA code in the kernel to the 20221020 upstream
     version and fix a couple of issues in it:
      - Make acpi_ex_load_op() match upstream implementation (Rafael
        Wysocki)
      - Add support for loong_arch-specific APICs in MADT (Huacai Chen)
      - Add support for fixed PCIe wake event (Huacai Chen)
      - Add EBDA pointer sanity checks (Vit Kabele)
      - Avoid accessing VGA memory when EBDA < 1KiB (Vit Kabele)
      - Add CCEL table support to both compiler/disassembler (Kuppuswamy
        Sathyanarayanan)
      - Add a couple of new UUIDs to the known UUID list (Bob Moore)
      - Add support for FFH Opregion special context data (Sudeep
        Holla)
      - Improve warning message for "invalid ACPI name" (Bob Moore)
      - Add support for CXL 3.0 structures (CXIMS & RDPAS) in the CEDT
        table (Alison Schofield)
      - Prepare IORT support for revision E.e (Robin Murphy)
      - Finish support for the CDAT table (Bob Moore)
      - Fix error code path in acpi_ds_call_control_method() (Rafael
        Wysocki)
      - Fix use-after-free in acpi_ut_copy_ipackage_to_ipackage() (Li
        Zetao)
      - Update the version of the ACPICA code in the kernel (Bob Moore)

   - Use ZERO_PAGE(0) instead of empty_zero_page in the ACPI device
     enumeration code (Giulio Benetti)

   - Change the return type of the ACPI driver remove callback to void
     and update its users accordingly (Dawei Li)

   - Add general support for FFH address space type and implement the
     low- level part of it for ARM64 (Sudeep Holla)

   - Fix stale comments in the ACPI tables parsing code and make it
     print more messages related to MADT (Hanjun Guo, Huacai Chen)

   - Replace invocations of generic library functions with more kernel-
     specific counterparts in the ACPI sysfs interface (Christophe
     JAILLET, Xu Panda)

   - Print full name paths of ACPI power resource objects during
     enumeration (Kane Chen)

   - Eliminate a compiler warning regarding a missing function prototype
     in the ACPI power management code (Sudeep Holla)

   - Fix and clean up the ACPI processor driver (Rafael Wysocki, Li
     Zhong, Colin Ian King, Sudeep Holla)

   - Add quirk for the HP Pavilion Gaming 15-cx0041ur to the ACPI EC
     driver (Mia Kanashi)

   - Add some mew ACPI backlight handling quirks and update some
     existing ones (Hans de Goede)

   - Make the ACPI backlight driver prefer the native backlight control
     over vendor backlight control when possible (Hans de Goede)

   - Drop unsetting ACPI APEI driver data on remove (Uwe Kleine-König)

   - Use xchg_release() instead of cmpxchg() for updating new GHES cache
     slots (Ard Biesheuvel)

   - Clean up the ACPI APEI code (Sudeep Holla, Christophe JAILLET, Jay
     Lu)

   - Add new I2C device enumeration quirks for Medion Lifetab S10346 and
     Lenovo Yoga Tab 3 Pro (YT3-X90F) (Hans de Goede)

   - Make the ACPI battery driver notify user space about adding new
     battery hooks and removing the existing ones (Armin Wolf)

   - Modify the pfr_update and pfr_telemetry drivers to use ACPI_FREE()
     for freeing acpi_object structures to help diagnostics (Wang
     ShaoBo)

   - Make the ACPI fan driver use sysfs_emit_at() in its sysfs interface
     code (ye xingchen)

   - Fix the _FIF package extraction failure handling in the ACPI fan
     driver (Hanjun Guo)

   - Fix the PCC mailbox handling error code path (Huisong Li)

   - Avoid using PCC Opregions if there is no platform interrupt
     allocated for this purpose (Huisong Li)

   - Use sysfs_emit() instead of scnprintf() in the ACPI PAD driver and
     CPPC library (ye xingchen)

   - Fix some kernel-doc issues in the ACPI GSI processing code
     (Xiongfeng Wang)

   - Fix name memory leak in pnp_alloc_dev() (Yang Yingliang)

   - Do not disable PNP devices on suspend when they cannot be
     re-enabled on resume (Hans de Goede)

   - Clean up the ACPI thermal driver a bit (Rafael Wysocki)"

* tag 'acpi-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (67 commits)
  ACPI: x86: Add skip i2c clients quirk for Medion Lifetab S10346
  ACPI: APEI: EINJ: Refactor available_error_type_show()
  ACPI: APEI: EINJ: Fix formatting errors
  ACPI: processor: perflib: Adjust acpi_processor_notify_smm() return value
  ACPI: processor: perflib: Rearrange acpi_processor_notify_smm()
  ACPI: processor: perflib: Rearrange unregistration routine
  ACPI: processor: perflib: Drop redundant parentheses
  ACPI: processor: perflib: Adjust white space
  ACPI: processor: idle: Drop unnecessary statements and parens
  ACPI: thermal: Adjust critical.flags.valid check
  ACPI: fan: Convert to use sysfs_emit_at() API
  ACPICA: Fix use-after-free in acpi_ut_copy_ipackage_to_ipackage()
  ACPI: battery: Call power_supply_changed() when adding hooks
  ACPI: use sysfs_emit() instead of scnprintf()
  ACPI: x86: Add skip i2c clients quirk for Lenovo Yoga Tab 3 Pro (YT3-X90F)
  ACPI: APEI: Remove a useless include
  PNP: Do not disable devices on suspend when they cannot be re-enabled on resume
  ACPI: processor: Silence missing prototype warnings
  ACPI: processor_idle: Silence missing prototype warnings
  ACPI: PM: Silence missing prototype warning
  ...
2022-12-12 13:38:17 -08:00
Huisong Li
6d7d3c2874 mailbox: pcc: Reset pcc_chan_count to zero in case of PCC probe failure
Currently, 'pcc_chan_count' is remains set to a non-zero value if PCC
subspaces are parsed successfully but something else fail later during
the initial PCC probing phase. This will result in pcc_mbox_request_channel
trying to access the resources that are not initialised or allocated and
may end up in a system crash.

Reset pcc_chan_count to 0 when the PCC probe fails in order to prevent
the possible issue as described above.

Fixes: ce028702dd ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe")
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-11-23 19:06:56 +01:00
Thomas Gleixner
13e7accb81 genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN
Adjust to reality and remove another layer of pointless Kconfig
indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve
all purposes.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20221111122014.524842979@linutronix.de
2022-11-17 15:15:20 +01:00
Eric Chanudet
b8ae88e1e7 mailbox: qcom-ipcc: flag IRQ NO_THREAD
PREEMPT_RT forces qcom-ipcc's handler to be threaded with interrupts
enabled, which triggers a warning in __handle_irq_event_percpu():
    irq 173 handler irq_default_primary_handler+0x0/0x10 enabled interrupts
    WARNING: CPU: 0 PID: 77 at kernel/irq/handle.c:161 __handle_irq_event_percpu+0x4c4/0x4d0

Mark it IRQF_NO_THREAD to avoid running the handler in a threaded
context with threadirqs or PREEMPT_RT enabled.

Signed-off-by: Eric Chanudet <echanude@redhat.com>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:51:58 -05:00
Colin Ian King
8ac1111055 mailbox: pcc: Fix spelling mistake "Plaform" -> "Platform"
There is a spelling mistake in a pr_err message. Fix it.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:51:14 -05:00
Jack Wang
6b207ce8a9 mailbox: bcm-ferxrm-mailbox: Fix error check for dma_map_sg
dma_map_sg return 0 on error, fix the error check, and return -EIO
to caller.

Fixes: dbc049eee7 ("mailbox: Add driver for Broadcom FlexRM ring manager")
Signed-off-by: Jack Wang <jinpu.wang@ionos.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:50:53 -05:00
Robert Marko
f5fe925df8 mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock support
IPQ8074 has the APSS clock controller utilizing the same register space as
the APCS, so provide access to the APSS utilizing a child device like
IPQ6018.

IPQ6018 and IPQ8074 use the same controller and driver, so just utilize
IPQ6018 match data for IPQ8074.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:50:01 -05:00
Conor Dooley
0d1aadfe10 mailbox: mpfs: account for mbox offsets while sending
The mailbox offset is not only used for receiving messages, but it is
also used by messages sent to the system controller by Linux that have a
payload, such as the "digital signature service". It is also overloaded
by certain other services (reprogramming of the FPGA fabric, see Link:)
to have a meaning other than the offset the system controller should
read from.
When the driver was written, no such services of the latter type were
in use & those of the former used an offset of zero so this has gone
un-noticed.

Link: https://www.microsemi.com/document-portal/doc_download/1245815-polarfire-fpga-and-polarfire-soc-fpga-system-services-user-guide # Section 5.2
Fixes: 83d7b15608 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:48:38 -05:00
Conor Dooley
2e10289d1f mailbox: mpfs: fix handling of the reg property
The "data" region of the PolarFire SoC's system controller mailbox is
not one continuous register space - the system controller's QSPI sits
between the control and data registers. Split the "data" reg into two
parts: "data" & "control". Optionally get the "data" register address
from the 3rd reg property in the devicetree & fall back to using the
old base + MAILBOX_REG_OFFSET that the current code uses.

Fixes: 83d7b15608 ("mbox: add polarfire soc system controller mailbox")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:48:31 -05:00
Peng Fan
7e5cd064f7 mailbox: imx: fix RST channel support
Because IMX_MU_xCR_MAX was increased to 5, some mu cfgs were not updated
to include the CR register. Add the missed CR register to xcr array.

Fixes: 82ab513bae ("mailbox: imx: support RST channel")
Reported-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com> # i.MX8qm/qxp MEK boards boot
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-10-05 21:46:36 -05:00
Hector Martin
68584e380e mailbox: apple: Implement poll_data() operation
This allows clients running in atomic context to poll for messages to
arrive.

Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-09-15 13:14:01 -05:00
Hector Martin
38ed8c888e mailbox: apple: Implement flush() operation
This allows clients to use the atomic-safe mailbox API style.

Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-09-15 13:14:01 -05:00
Linus Torvalds
92ceebf920 - mtk: use rx_callback instead of cmdq_task_cb.
- qcom: add syscon const.
 		add SM6375 compatible.
 - imx: enable RST channel.
 		clear pending irqs
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Merge tag 'mailbox-v5.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - mtk:
     - use rx_callback instead of cmdq_task_cb

 - qcom:
     - add syscon const
     - add SM6375 compatible

 - imx:
     - enable RST channel
     - clear pending irqs

* tag 'mailbox-v5.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: imx: clear pending interrupts
  dt-bindings: mailbox: qcom-ipcc: Add SM6375 compatible
  mailbox: imx: support RST channel
  dt-bindings: mailbox: imx-mu: add RST channel
  dt-bindings: mailbox: qcom,apcs-kpss-global: Add syscon const for relevant entries
  mailbox: mtk-cmdq: Remove proprietary cmdq_task_cb
2022-08-08 10:19:40 -07:00
Peng Fan
8a8dc2b959 mailbox: imx: clear pending interrupts
During MU initialization, there maybe pending GSR and RSR pending
interrupt, clear them to avoid unexpected kernel dump when requesting
mailbox channel

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-03 09:48:13 -05:00
Peng Fan
82ab513bae mailbox: imx: support RST channel
i.MX generic MU supports MU-A/B reset feature.

When stop/start remotecore, MU is not reset. So when Linux stop
remotecore, the MU-B side BCR may contain valid configuration,
because MU-B is not reset. So when linux start Mcore
again and notify Mcore, Mcore is not ready to handle MU interrupt
and cause issues. So need reset MU when stop Mcore.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-02 15:10:26 -05:00
Chun-Kuang Hu
d9c26e0a58 mailbox: mtk-cmdq: Remove proprietary cmdq_task_cb
rx_callback is a standard mailbox callback mechanism and could cover the
function of proprietary cmdq_task_cb, so use the standard one instead of
the proprietary one. Client driver has changed to use standard
rx_callback, so remove proprietary cmdq_task_cb.

Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-08-02 15:06:57 -05:00
Thomas Gleixner
2aec85b26f treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_30.RULE (part 2)
Based on the normalized pattern:

    this program is free software you can redistribute it and/or modify it
    under the terms of the gnu general public license as published by the
    free software foundation version 2  this program is distributed as is
    without any warranty of any kind whether express or implied without
    even the implied warranty of merchantability or fitness for a
    particular purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

has been chosen to replace the boilerplate/reference.

Reviewed-by: Allison Randal <allison@lohutok.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-10 14:51:35 +02:00
Nathan Chancellor
79f9fbe303 mailbox: qcom-ipcc: Fix -Wunused-function with CONFIG_PM_SLEEP=n
When CONFIG_PM_SLEEP is not set, there is a warning that
qcom_ipcc_pm_resume() is unused:

  drivers/mailbox/qcom-ipcc.c:258:12: error: 'qcom_ipcc_pm_resume' defined but not used [-Werror=unused-function]
    258 | static int qcom_ipcc_pm_resume(struct device *dev)
        |            ^~~~~~~~~~~~~~~~~~~
  cc1: all warnings being treated as errors

Commit 1a3c7bb088 ("PM: core: Add new *_PM_OPS macros, deprecate old
ones") reworked the PM_OPS macros to avoid this problem. Use
NOIRQ_SYSTEM_SLEEP_PM_OPS directly so that qcom_ipcc_pm_resume() always
appears to be used to the compiler, even though it will be dead code
eliminated in the !CONFIG_PM_SLEEP case.

Fixes: c25f778997 ("mailbox: qcom-ipcc: Log the pending interrupt during resume")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-24 08:08:24 -05:00
Björn Ardö
bca1a10046 mailbox: forward the hrtimer if not queued and under a lock
This reverts commit c7dacf5b0f,
"mailbox: avoid timer start from callback"

The previous commit was reverted since it lead to a race that
caused the hrtimer to not be started at all. The check for
hrtimer_active() in msg_submit() will return true if the
callback function txdone_hrtimer() is currently running. This
function could return HRTIMER_NORESTART and then the timer
will not be restarted, and also msg_submit() will not start
the timer. This will lead to a message actually being submitted
but no timer will start to check for its compleation.

The original fix that added checking hrtimer_active() was added to
avoid a warning with hrtimer_forward. Looking in the kernel
another solution to avoid this warning is to check hrtimer_is_queued()
before calling hrtimer_forward_now() instead. This however requires a
lock so the timer is not started by msg_submit() inbetween this check
and the hrtimer_forward() call.

Fixes: c7dacf5b0f ("mailbox: avoid timer start from callback")
Signed-off-by: Björn Ardö <bjorn.ardo@axis.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-23 14:45:24 -05:00
Prasad Sodagudi
c25f778997 mailbox: qcom-ipcc: Log the pending interrupt during resume
Enable logging of the pending interrupt that triggered device wakeup. This
logging information helps to debug IRQs that cause periodic device wakeups
by printing the detailed information of pending IPCC interrupts.

Scenario: Device wakeup caused by Modem crash
Logs:
qcom-ipcc mailbox: virq: 182 triggered client-id: 2; signal-id: 2

From the IPCC bindings it can further be understood that the client here is
IPCC_CLIENT_MPSS and the signal was IPCC_MPROC_SIGNAL_SMP2P.

Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Prasad Sodagudi <quic_psodagud@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Mario Limonciello
369e4ef87a mailbox: pcc: Fix an invalid-load caught by the address sanitizer
`pcc_mailbox_probe` doesn't initialize all memory that has been allocated
before the first time that one of it's members `txdone_irq` may be
accessed.

This leads to a an invalid load any time that this member is accessed:
[    2.429769] UBSAN: invalid-load in drivers/mailbox/pcc.c:684:22
[    2.430324] UBSAN: invalid-load in drivers/mailbox/mailbox.c:486:12
[    4.276782] UBSAN: invalid-load in drivers/acpi/cppc_acpi.c:314:45

Link: https://bugzilla.kernel.org/show_bug.cgi?id=215587
Fixes: ce028702dd ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe")
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Krzysztof Kozlowski
a022c7c96c mailbox: correct kerneldoc
Correct kerneldoc warnings like:

  drivers/mailbox/arm_mhu_db.c:47:
    warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
  drivers/mailbox/qcom-ipcc.c:58:
    warning: Function parameter or member 'num_chans' not described in 'qcom_ipcc'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
ran jianping
d951269608 mailbox: omap: using pm_runtime_resume_and_get to simplify the code
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: ran jianping <ran.jianping@zte.com.cn>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
ran jianping
504ff5b008 mailbox:imx: using pm_runtime_resume_and_get
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: ran jianping <ran.jianping@zte.com.cn>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Tinghan Shen
02b5c35a61 mailbox: mediatek: support mt8186 adsp mailbox
Add support of mt8186 adsp mailbox.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Kartik
74c20dd0f8 mailbox: tegra-hsp: Add 128-bit shared mailbox support
Add support for 128-bit shared mailboxes found on Tegra234 chips.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Kartik
8f585d1403 mailbox: tegra-hsp: Add tegra_hsp_sm_ops
This patch introduces tegra_hsp_sm_ops to abstract send & receive
API's for shared mailboxes.

Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:30 -05:00
Xiaomeng Tong
1b0070aca3 mailbox: remove an unneeded NULL check on list iterator
The list iterator is always non-NULL so it doesn't need to be checked.
Thus just remove the unnecessary NULL check.

Signed-off-by: Xiaomeng Tong <xiam0nd.tong@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:29 -05:00
Tom Rix
262190a8ca mailbox: imx: remove redundant initializer
Smatch reports this issue
imx-mailbox.c:887:10: warning: Initializer entry defined twice
imx-mailbox.c:889:10:   also defined here

  .rxdb	= imx_mu_generic_rxdb,

Is listed twice, so remove one.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-05-21 11:41:29 -05:00
Dave Gerlach
df227dc8a6 mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend
During the system suspend path we must set all queues to operate in
polled mode as it is possible for any protocol built using this mailbox,
such as TISCI, to require communication during the no irq phase of suspend,
and we cannot rely on interrupts there.

Polled mode is implemented by allowing the mailbox user to define an
RX channel as part of the message that is sent which is what gets polled
for a response. If polled mode is enabled, this will immediately be
polled for a response at the end of the mailbox send_data op before
returning success for the data send or timing out if no response is
received.

Finally, to ensure polled mode is always enabled during system suspend,
iterate through all queues to set RX queues to polled mode during system
suspend and disable polled mode for all in the resume handler.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:33:30 -06:00
Dave Gerlach
cb62b8f734 mailbox: ti-msgmgr: Refactor message read during interrupt handler
Refactor the portion of code that actually reads received messages from
a queue into its own function, ti_msgmgr_queue_rx_data, that is called
by the interrupt handler instead of reading directly from the handler.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:33:23 -06:00
Peng Fan
0184cc2026 mailbox: imx: support i.MX93 S401 MU
Add i.MX93 S401 MU cfg

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:31:09 -06:00
Peng Fan
a5cb407a7a mailbox: imx: support dual interrupts
i.MX93 S401 MU support two interrupts: tx empty and rx full.

 - Introduce a new flag IMX_MU_V2_IRQ for the dual interrupt case
 - Update Copyright

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:31:03 -06:00
Peng Fan
cfd162f604 mailbox: imx: extend irq to an array
To i.MX93 S401 MU, there are two interrupts: rx full and tx empty.
So extend irq to an array to prepare i.MX93 S401 MU support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:30:55 -06:00
Franck LENORMAND
11dac1d3fa mailbox: imx: add i.MX8 SECO MU support
i.MX8/8X SECO firmware IPC is an implementation of passing messages.
But current imx-mailbox driver only support one word  message,
i.MX8/8X linux side firmware has to request four TX, four RX and a
TXDB to support IPC to SECO firmware. This is low efficent and
more interrupts triggered compared with one TX and one RX.

To make SECO MU work,
  - parse the size of msg.
  - Only enable TR0/RR0 interrupt for transmit/receive message.
  - For TX/RX, only support one TX channel and one RX channel
  - For RX, support receive msg of any size, limited by hardcoded value
    of 30.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:27:15 -06:00
Peng Fan
315d2e5624 mailbox: imx: introduce rxdb callback
Add a rxdb callback to prepare for i.MX8 SECO MU rxdb which has a
different logic.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:27:08 -06:00
Ranjani Vaidyanathan
81a9d3b930 mailbox: imx: enlarge timeout while reading/writing messages to SCFW
Mailbox driver needs to wait and read all the words in response to a
SCFW API call, else the protocol gets messed up and results in kernel hang.
When the responses are longer than 3 words its possible that SCFW will
take some time to fill up the rest of the words in the MU, a timeout of
100us is arbritrary and too short. While waiting for Linux to consume the
first 3 words of the response SCFW can be busy doing other stuff and hence
Linux needs to wait for the rest of the words.
Similar restriction applies when writing messages that are longer than
3 words.
This patch increases the timeout to 5secs while waiting for response
or writing long messages to SCFW.

Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:26:55 -06:00
Robin Gong
8219efd08a mailbox: imx: fix crash in resume on i.mx8ulp
check 'priv->clk' before 'imx_mu_read()' otherwise crash happens on
i.mx8ulp, since clock not enabled.

Fixes: 4f0b776ef5 ("mailbox: imx-mailbox: support i.MX8ULP MU")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:26:49 -06:00
Robin Gong
892cb524ae mailbox: imx: fix wakeup failure from freeze mode
Since IRQF_NO_SUSPEND used for imx mailbox driver, that means this irq
can't be used for wakeup source so that can't wakeup from freeze mode.
Add pm_system_wakeup() to wakeup from freeze mode.

Fixes: b7b2796b9b31e("mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag")
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:26:42 -06:00
Allen-KH Cheng
af2dfa96c5 mailbox: mediatek: add support for adsp mailbox controller
This patch is to for MediaTek ADSP IPC mailbox controller driver
It is used to send short messages between processors with adsp

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
Reviewed-by: YC Hung <yc.hung@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:24:57 -06:00
Adam Skladowski
5c0fab31ca mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC
MSM8976 APCS block is similar to one found in MSM8994.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:22:11 -06:00
Pekka Pessi
60de2d2dc2 mailbox: tegra-hsp: Flush whole channel
The txdone can re-fill the mailbox. Keep polling the mailbox during the
flush until all the messages have been delivered.

This fixes an issue with the Tegra Combined UART (TCU) where output can
get truncated under high traffic load.

Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: 91b1b1c3da ("mailbox: tegra-hsp: Add support for shared mailboxes")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-03-12 19:20:48 -06:00
Linus Torvalds
fb3b0673b7 - qcom: misc updates to qcom-ipcc driver
- mpfs: change compatible string
 - pcc: fix handling of subtypes
 		avoid uninit variable
 - mtk: add missing of_node_put
 		enable control_by_sw
 		silent probe-defer prints
 		fix gce_num for mt8192
 - zynq: add missing of_node_put
 - imx: check for NULL instead of IS_ERR
 - appple: switch to generic compatibles
 - hi3660: convert comments to kernel-doc notation
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Merge tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom: misc updates to qcom-ipcc driver

 - mpfs: change compatible string

 - pcc:
     - fix handling of subtypes
     - avoid uninitialized variable

 - mtk:
     - add missing of_node_put
     - enable control_by_sw
     - silent probe-defer prints
     - fix gce_num for mt8192

 - zynq: add missing of_node_put

 - imx: check for NULL instead of IS_ERR

 - appple: switch to generic compatibles

 - hi3660: convert comments to kernel-doc notation

* tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: Add more protocol and client ID
  mailbox: qcom-ipcc: Support interrupt wake up from suspend
  mailbox: qcom-ipcc: Support more IPCC instance
  mailbox: qcom-ipcc: Dynamic alloc for channel arrangement
  mailbox: change mailbox-mpfs compatible string
  mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq
  mailbox: pcc: Avoid using the uninitialized variable 'dev'
  mailbox: mtk: add missing of_node_put before return
  mailbox: zynq: add missing of_node_put before return
  mailbox: imx: Fix an IS_ERR() vs NULL bug
  mailbox: hi3660: convert struct comments to kernel-doc notation
  mailbox: add control_by_sw for mt8195
  mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks
  mailbox: fix gce_num of mt8192 driver data
  mailbox: apple: Bind to generic compatibles
  dt-bindings: mailbox: apple,mailbox: Add generic and t6000 compatibles
2022-01-13 11:19:07 -08:00
Linus Torvalds
feb7a43de5 Rework of the MSI interrupt infrastructure:
Treewide cleanup and consolidation of MSI interrupt handling in
   preparation for further changes in this area which are necessary to:
 
   - address existing shortcomings in the VFIO area
 
   - support the upcoming Interrupt Message Store functionality which
     decouples the message store from the PCI config/MMIO space
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Merge tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI irq updates from Thomas Gleixner:
 "Rework of the MSI interrupt infrastructure.

  This is a treewide cleanup and consolidation of MSI interrupt handling
  in preparation for further changes in this area which are necessary
  to:

   - address existing shortcomings in the VFIO area

   - support the upcoming Interrupt Message Store functionality which
     decouples the message store from the PCI config/MMIO space"

* tag 'irq-msi-2022-01-13' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (94 commits)
  genirq/msi: Populate sysfs entry only once
  PCI/MSI: Unbreak pci_irq_get_affinity()
  genirq/msi: Convert storage to xarray
  genirq/msi: Simplify sysfs handling
  genirq/msi: Add abuse prevention comment to msi header
  genirq/msi: Mop up old interfaces
  genirq/msi: Convert to new functions
  genirq/msi: Make interrupt allocation less convoluted
  platform-msi: Simplify platform device MSI code
  platform-msi: Let core code handle MSI descriptors
  bus: fsl-mc-msi: Simplify MSI descriptor handling
  soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()
  soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation
  NTB/msi: Convert to msi_on_each_desc()
  PCI: hv: Rework MSI handling
  powerpc/mpic_u3msi: Use msi_for_each-desc()
  powerpc/fsl_msi: Use msi_for_each_desc()
  powerpc/pasemi/msi: Convert to msi_on_each_dec()
  powerpc/cell/axon_msi: Convert to msi_on_each_desc()
  powerpc/4xx/hsta: Rework MSI handling
  ...
2022-01-13 09:05:29 -08:00
Huang Yiwei
afaf2ba5b4 mailbox: qcom-ipcc: Support interrupt wake up from suspend
Use IRQF_NO_SUSPEND flag instead of enable_irq_wake to
support interrupt wake up from suspend.

Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Huang Yiwei
1f43e5230a mailbox: qcom-ipcc: Support more IPCC instance
Since hardware is supporting multiple IPCC instance,
use ipcc_%d instead of ipcc as the irq name to support
in driver.

Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Huang Yiwei
e9d50e4b4d mailbox: qcom-ipcc: Dynamic alloc for channel arrangement
Dynamic alloc for channel arrangement instead of static alloced
array, it is more flexible and can reduce memory usage.

Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Conor Dooley
f10b1fc016 mailbox: change mailbox-mpfs compatible string
The Polarfire SoC is currently using two different compatible string
prefixes. Fix this by changing "polarfire-soc-*" strings to "mpfs-*" in
its system controller in order to match the compatible string used in
the soc binding and device tree.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Sudeep Holla
7215a7857e mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq
Commit c45ded7e11 ("mailbox: pcc: Add support for PCCT extended PCC
subspaces(type 3/4)") enabled the type3/4 of PCCT, but the change in
pcc_mbox_irq breaks the other PCC subtypes.

The kernel reports a warning on an Ampere eMag server

-->8
 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.16.0-rc4 #127
 Hardware name: MiTAC RAPTOR EV-883832-X3-0001/RAPTOR, BIOS 0.14 02/22/2019
 Call trace:
  dump_backtrace+0x0/0x200
  show_stack+0x20/0x30
  dump_stack_lvl+0x68/0x84
  dump_stack+0x18/0x34
  __report_bad_irq+0x54/0x17c
  note_interrupt+0x330/0x428
  handle_irq_event_percpu+0x90/0x98
  handle_irq_event+0x4c/0x148
  handle_fasteoi_irq+0xc4/0x188
  generic_handle_domain_irq+0x44/0x68
  gic_handle_irq+0x84/0x2ec
  call_on_irq_stack+0x28/0x34
  do_interrupt_handler+0x88/0x90
  el1_interrupt+0x48/0xb0
  el1h_64_irq_handler+0x18/0x28
  el1h_64_irq+0x7c/0x80

Fixes: c45ded7e11 ("mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)")
Reported-by: Justin He <justin.he@arm.com>
Tested-by: Justin He <justin.he@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Sudeep Holla
960c4056aa mailbox: pcc: Avoid using the uninitialized variable 'dev'
Smatch static checker warns:

  |  drivers/mailbox/pcc.c:292 pcc_mbox_request_channel()
  |  error: uninitialized symbol 'dev'.

Fix the same by using pr_err instead of dev_err as the variable 'dev'
is uninitialized at that stage.

Fixes: ce028702dd ("mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe")
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Wang Qing
af8d0f6d22 mailbox: mtk: add missing of_node_put before return
Fix following coccicheck warning:
WARNING: Function "for_each_child_of_node"
should have of_node_put() before return.

Early exits from for_each_child_of_node should decrement the
node reference counter.

Signed-off-by: Wang Qing <wangqing@vivo.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:33 -06:00
Wang Qing
2453128847 mailbox: zynq: add missing of_node_put before return
Fix following coccicheck warning:
WARNING: Function "for_each_available_child_of_node"
should have of_node_put() before return.

Early exits from for_each_available_child_of_node should decrement the
node reference counter.

Signed-off-by: Wang Qing <wangqing@vivo.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
Dan Carpenter
05d06f3719 mailbox: imx: Fix an IS_ERR() vs NULL bug
The devm_kzalloc() function does not return error pointers, it returns
NULL on failure.

Fixes: 97961f78e8 ("mailbox: imx: support i.MX8ULP S4 MU")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
Randy Dunlap
79daec8b9c mailbox: hi3660: convert struct comments to kernel-doc notation
Convert hi3660 struct comments to kernel-doc notation and fix
other kernel-doc warnings:

drivers/mailbox/hi3660-mailbox.c:47: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Hi3660 mailbox channel information
drivers/mailbox/hi3660-mailbox.c:62: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
    * Hi3660 mailbox controller data
hi3660-mailbox.c:53: warning: contents before sections
hi3660-mailbox.c:67: warning: contents before sections

Fixes: 41c0e939d7 ("mailbox: Add support for Hi3660 mailbox")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Ruyi Wang <wangruyi@huawei.com>
Cc: Kaihua Zhong <zhongkaihua@huawei.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
jason-jh.lin
9388501fbb mailbox: add control_by_sw for mt8195
To make sure the GCE request signal to SPM is not trigger by
other HW modules and cause suspend premature wake.

Set 0x7 (the bit 0~2 as 1) to GCE_GCTL_VALUE, to configure the
request signal control by SW and release the request to SPM.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@google.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
Hsin-Yi Wang
99867e5a87 mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks
Silent the error if it's EPROBE_DEFER for clks.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
jason-jh.lin
35ca43710f mailbox: fix gce_num of mt8192 driver data
Because mt8192 only have 1 gce, the gce_num should be 1.

Fixes: 85dfdbfc13 ("mailbox: cmdq: add multi-gce clocks support for mt8195")
Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
Hector Martin
1fa68a3593 mailbox: apple: Bind to generic compatibles
As with other blocks, we intend to have drivers bind to generic
compatibles as long as there are no SoC-specific quirks. This allows
forward-compatibility with future SoCs.

No upstream DTs instantiate this yet, so it's still safe to make this
breaking change.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2022-01-11 23:47:32 -06:00
Thomas Gleixner
d722e9a511 mailbox: bcm-flexrm-mailbox: Rework MSI interrupt handling
No point in retrieving the MSI descriptors. Just query the Linux interrupt
number.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211210221815.148331680@linutronix.de
2021-12-16 22:16:41 +01:00
Thomas Gleixner
dba27c7fa3 platform-msi: Use msi_desc::msi_index
Use the common msi_index member and get rid of the pointless wrapper struct.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20211210221814.413638645@linutronix.de
2021-12-16 22:16:40 +01:00
Nitesh Narayan Lal
bf886e1ef1 mailbox: Use irq_update_affinity_hint()
The driver uses irq_set_affinity_hint() to:

  - Set the affinity_hint which is consumed by the userspace for
    distributing the interrupts

  - Enforce affinity

As per commit 6ac17fe8c1 ("mailbox: bcm-flexrm-mailbox: Set IRQ affinity
hint for FlexRM ring IRQs") the latter is done to ensure that the FlexRM
ring interrupts are evenly spread across all available CPUs. However, since
commit a0c9259dc4 ("irq/matrix: Spread interrupts on allocation") the
spreading of interrupts is dynamically performed at the time of allocation.
Hence, there is no need for the drivers to enforce their own affinity for
the spreading of interrupts.

Also, irq_set_affinity_hint() applying the provided cpumask as an affinity
for the interrupt is an undocumented side effect. To remove this side
effect irq_set_affinity_hint() has been marked as deprecated and new
interfaces have been introduced. Hence, replace the irq_set_affinity_hint()
with the new interface irq_update_affinity_hint() that only sets the
affinity_hint pointer.

Signed-off-by: Nitesh Narayan Lal <nitesh@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Link: https://lore.kernel.org/r/20210903152430.244937-11-nitesh@redhat.com
2021-12-10 20:47:39 +01:00
Peng Fan
97961f78e8 mailbox: imx: support i.MX8ULP S4 MU
Like i.MX8 SCU, i.MX8ULP S4 also has vendor specific protocol.
 - bind SCU/S4 MU part to share one tx/rx/init API to make code simple.
 - S4 msg max size is very large, so alloc the space at driver probe,
   not use local on stack variable.
 - S4 MU has 8 TR and 4 RR which is different with i.MX8 MU, so adapt
   code to reflect this.

   Tested on i.MX8MP, i.MX8ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 23:03:09 -05:00
Sudeep Holla
ce028702dd mailbox: pcc: Move bulk of PCCT parsing into pcc_mbox_probe
Move the PCCT subspace parsing and allocation into pcc_mbox_probe so
that we can get rid of global PCC channel and mailbox controller data.
It also helps to make use of devm_* APIs for all the allocations.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
c45ded7e11 mailbox: pcc: Add support for PCCT extended PCC subspaces(type 3/4)
With all the plumbing in place to avoid accessing PCCT type and other
fields directly from the PCCT table all the time, let us now add the
support for extended PCC subspaces(type 3 and 4).

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
45ec2dafb1 mailbox: pcc: Drop handling invalid bit-width in {read,write}_register
pcc_chan_reg_init now checks if the register bit width is within the
list [8, 16, 32, 64] and flags error if that is not the case. Therefore
there is no need to handling invalid bit-width in both read_register
and write_register. We can drop that along with the return values for
these 2 functions.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
bf18123e78 mailbox: pcc: Avoid accessing PCCT table in pcc_send_data and pcc_mbox_irq
Now that the con_priv is availvale solely for PCC mailbox controller
driver, let us use the same to save the channel specific information
in it so that we can it whenever required instead of parsing the PCCT
table entries every time in both pcc_send_data and pcc_mbox_irq.

We can now use the newly introduces PCC register bundle to simplify both
saving of channel specific information and accessing them without repeated
checks for the subspace type.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
800cda7b63 mailbox: pcc: Add PCC register bundle and associated accessor functions
Extended PCC subspaces introduces more registers into the PCCT. In order
to consolidate access to these registers and to keep all the details
contained in one place, let us introduce PCC register bundle that holds
the ACPI Generic Address Structure as well as the virtual address for
the same if it is mapped in the OS.

It also contains the various masks used to access the register and
the associated read, write and read-modify-write accessors.

We can also clean up the initialisations by having a helper function
for the same.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
f92ae90e52 mailbox: pcc: Rename doorbell ack to platform interrupt ack register
The specification refers this register and associated bitmask as platform
interrupt acknowledge register. Let us rename it so that it is easier to
map and understand.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
7b6da7fe7b mailbox: pcc: Use PCC mailbox channel pointer instead of standard
Now that we have all the shared memory region information populated in
the pcc_mbox_chan, let us propagate the pointer to the same as the
return value to pcc_mbox_request channel.

This eliminates the need for the individual users of PCC mailbox to
parse the PCCT subspace entries and fetch the shmem information. This
also eliminates the need for PCC mailbox controller to set con_priv to
PCCT subspace entries. This is required as con_priv is private to the
controller driver to attach private data associated with the channel and
not meant to be used by the mailbox client/users.

Let us convert all the users of pcc_mbox_{request,free}_channel to use
new interface.

Cc: Jean Delvare <jdelvare@suse.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
0f2591e21b mailbox: pcc: Add pcc_mbox_chan structure to hold shared memory region info
Currently PCC mailbox controller sets con_priv in each channel to hold
the pointer to pcct subspace entry it corresponds to. The mailbox user
will then fetch this pointer from the channel descriptor they get when
they request for the channel. Using that pointer they then parse the
pcct entry again to fetch all the information about shared memory region.

In order to remove individual users of PCC mailbox parsing the PCCT
subspace entries to fetch same information, let us consolidate the same
in pcc mailbox controller by parsing all the shared memory region
information into a structure that can also hold the mbox_chan pointer it
represent.

This can then be used as main PCC mailbox channel pointer that we can
return as part of pcc_mbox_request_channel instead of standard mailbox
channel pointer.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00
Sudeep Holla
4e3c96ff95 mailbox: pcc: Consolidate subspace doorbell register parsing
Extended PCC subspaces(Type 3 and 4) differ from generic(Type 0) and
HW-Reduced Communication(Type 1 and 2) subspace structures. However some
fields share same offsets and same type of structure can be use to
extract the fields. In order to simplify that, let us move all the doorbell
register parsing into pcc_parse_subspace_db_reg and consolidate there.
It will be easier to extend it if required within the same.

Reviewed-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2021-10-29 22:46:38 -05:00