The slew rate might need a +/- 15% margin as per the latest data manual:
http://www.ti.com/lit/ds/snvsb22/snvsb22.pdf
Hence take a conservative approach to program 85% of the original
hardware slew rate so that the software accommodates the margin
delay while voltage switching. Hence reduce the default ramp_delay
populated in the descriptors also by 15%.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The latest documentation reveals that initial voltage range that is
supported is starting from 0.6V for all the PMICs belonging to lp87565
family. Fix the same.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixes: f0168a9bf ("regulator: lp87565: Add support for lp87565 PMIC regulators")
Signed-off-by: Mark Brown <broonie@kernel.org>
The regulators set consists of 4 BUCKs. The output
voltages are configurable and are meant to supply power to the
main processor and other components. The ramp delay is configurable
for all BUCKs. The BUCKs can be configured in single phase or
multiphase modes.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
