GCE cannot know the register base address, this function
can help cmdq client to get the cmdq_client_reg structure.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Houlong Wei <houlong.wei@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
add polling function in cmdq helper functions
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Define an instruction structure for gce driver to append command.
This structure can make the client's code more readability.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Debugging gets harder if we OR two error return values.
Return each error on it's own instead
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
[mb: rephrase commit message]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This brings in the mainline tree right after armsoc contents was merged
this release cycle, so that we can re-run savedefconfig, etc.
Signed-off-by: Olof Johansson <olof@lixom.net>
Fixup a issue was caused by the previous fixup patch.
Fixes: 1a92f98912 ("soc: mediatek: cmdq: reorder the parameter")
Link: https://lore.kernel.org/r/20191127165428.19662-1-matthias.bgg@gmail.com
Cc: <stable@vger.kernel.org>
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Put bus protection enable and disable control in separate functions.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Put sram enable and disable control in separate functions.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
[mb: fix coding style of reading register and changing the read value]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Put clock enable and disable control in separate function.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Put regulator enable and disable control in separate functions.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use USEC_PER_SEC to indicate the polling timeout directly.
And add documentation of scp_domain_data.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
According to the cmdq hardware design, the subsys is u8,
the offset is u16 and the event id is u16.
This patch changes the type of subsys, offset and event id
to the correct type.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The order of gce instructions is [subsys offset value]
so reorder the parameter of cmdq_pkt_write_mask
and cmdq_pkt_write function.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
When building with -Wsometimes-uninitialized, Clang warns:
drivers/soc/mediatek/mtk-pmic-wrap.c:1358:6: error: variable 'rdata' is
used uninitialized whenever '||' condition is true
[-Werror,-Wsometimes-uninitialized]
If pwrap_write returns non-zero, pwrap_read will not be called to
initialize rdata, meaning that we will use some random uninitialized
stack value in our print statement. Zero initialize rdata in case this
happens.
Link: https://github.com/ClangBuiltLinux/linux/issues/401
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the code to support the pwrap IP on the MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The variable rstc is set only when the SoC PWRAP have the
PWRAP_CAP_RESET capability. Check whether rstc is set before
using it to avoid errors.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT6357 is a new power management IC and it is used for mt6765 SoCs.
To define mt6357_regs for pmic register mapping and pmic_mt6357
for accessing register.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
mt6765 is a highly integrated SoCs, it uses mt6357 for power management.
This patch adds pwrap driver to access mt6357. Pwrap of mt6765 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
[mb: change has_bridge to capabilities]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Return statements in functions returning bool should use true or false
instead of an integer value.
This issue was detected with the help of Coccinelle.
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT6358 is a new power management IC and it is used for
mt8183 SoCs. To define mt6358_regs for pmic register
mapping and pmic_mt6358 for accessing register.
Adding one more interrupt and wdt source.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use group of bits for pwrap capability instead of
elements of structure.
This patch is preparing for adding mt8183 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Order SoC and PMIC numbers ascending to make the code more
readable.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT6351 is a new power management IC and it is used for mt6797 SoCs. To define
mt6351_regs for pmic register mapping and pmic_mt6351 for
accessing register.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
mt6797 is a highly integrated SoCs, it uses mt6351 for power management.
This patch adds pwrap driver to access mt6351. Pwrap of mt6797 support
dynamic priority meichanism, sequence monitor and starvation mechanism
to make transaction more reliable.
A big change from V4 to V5 is we remove INT1 interrupt declaration since
it is only for debug purpose. The PWRAP_RDDMY, RESET and DCM can use legacy
setting, it is backwards compatible. The new caps flag declaration is not
needed, just remove it.
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
PWRAP_DEW_CIPHER_LOAD and PWRAP_DEW_CIPHER_START only exist at
PMIC_mt6397 datasheet. We fix it before merge PMIC_mt6351 driver.
Fixes: 5ae48040aa ("soc: mediatek: PMIC wrap: add mt6323 slave support")
Signed-off-by: Argus Lin <argus.lin@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
- Additional struct_size() conversions (Matthew, Kees)
- Explicitly reported overflow fixes (Silvio, Kees)
- Add missing kvcalloc() function (Kees)
- Treewide conversions of allocators to use either 2-factor argument
variant when available, or array_size() and array3_size() as needed (Kees)
-----BEGIN PGP SIGNATURE-----
Comment: Kees Cook <kees@outflux.net>
iQJKBAABCgA0FiEEpcP2jyKd1g9yPm4TiXL039xtwCYFAlsgVtMWHGtlZXNjb29r
QGNocm9taXVtLm9yZwAKCRCJcvTf3G3AJhsJEACLYe2EbwLFJz7emOT1KUGK5R1b
oVxJog0893WyMqgk9XBlA2lvTBRBYzR3tzsadfYo87L3VOBzazUv0YZaweJb65sF
bAvxW3nY06brhKKwTRed1PrMa1iG9R63WISnNAuZAq7+79mN6YgW4G6YSAEF9lW7
oPJoPw93YxcI8JcG+dA8BC9w7pJFKooZH4gvLUSUNl5XKr8Ru5YnWcV8F+8M4vZI
EJtXFmdlmxAledUPxTSCIojO8m/tNOjYTreBJt9K1DXKY6UcgAdhk75TRLEsp38P
fPvMigYQpBDnYz2pi9ourTgvZLkffK1OBZ46PPt8BgUZVf70D6CBg10vK47KO6N2
zreloxkMTrz5XohyjfNjYFRkyyuwV2sSVrRJqF4dpyJ4NJQRjvyywxIP4Myifwlb
ONipCM1EjvQjaEUbdcqKgvlooMdhcyxfshqJWjHzXB6BL22uPzq5jHXXugz8/ol8
tOSM2FuJ2sBLQso+szhisxtMd11PihzIZK9BfxEG3du+/hlI+2XgN7hnmlXuA2k3
BUW6BSDhab41HNd6pp50bDJnL0uKPWyFC6hqSNZw+GOIb46jfFcQqnCB3VZGCwj3
LH53Be1XlUrttc/NrtkvVhm4bdxtfsp4F7nsPFNDuHvYNkalAVoC3An0BzOibtkh
AtfvEeaPHaOyD8/h2Q==
=zUUp
-----END PGP SIGNATURE-----
Merge tag 'overflow-v4.18-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux
Pull more overflow updates from Kees Cook:
"The rest of the overflow changes for v4.18-rc1.
This includes the explicit overflow fixes from Silvio, further
struct_size() conversions from Matthew, and a bug fix from Dan.
But the bulk of it is the treewide conversions to use either the
2-factor argument allocators (e.g. kmalloc(a * b, ...) into
kmalloc_array(a, b, ...) or the array_size() macros (e.g. vmalloc(a *
b) into vmalloc(array_size(a, b)).
Coccinelle was fighting me on several fronts, so I've done a bunch of
manual whitespace updates in the patches as well.
Summary:
- Error path bug fix for overflow tests (Dan)
- Additional struct_size() conversions (Matthew, Kees)
- Explicitly reported overflow fixes (Silvio, Kees)
- Add missing kvcalloc() function (Kees)
- Treewide conversions of allocators to use either 2-factor argument
variant when available, or array_size() and array3_size() as needed
(Kees)"
* tag 'overflow-v4.18-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux: (26 commits)
treewide: Use array_size in f2fs_kvzalloc()
treewide: Use array_size() in f2fs_kzalloc()
treewide: Use array_size() in f2fs_kmalloc()
treewide: Use array_size() in sock_kmalloc()
treewide: Use array_size() in kvzalloc_node()
treewide: Use array_size() in vzalloc_node()
treewide: Use array_size() in vzalloc()
treewide: Use array_size() in vmalloc()
treewide: devm_kzalloc() -> devm_kcalloc()
treewide: devm_kmalloc() -> devm_kmalloc_array()
treewide: kvzalloc() -> kvcalloc()
treewide: kvmalloc() -> kvmalloc_array()
treewide: kzalloc_node() -> kcalloc_node()
treewide: kzalloc() -> kcalloc()
treewide: kmalloc() -> kmalloc_array()
mm: Introduce kvcalloc()
video: uvesafb: Fix integer overflow in allocation
UBIFS: Fix potential integer overflow in allocation
leds: Use struct_size() in allocation
Convert intel uncore to struct_size
...
Fix up drivers/soc/mediatek/mtk-scpsys.c:255:2-3: Unneeded semicolon
accidently being added in commit f9e2f65dd561 ("soc: mediatek: add a
fixed wait for SRAM stable").
Fixes: f9e2f65dd561 ("soc: mediatek: add a fixed wait for SRAM stable")
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT7622_POWER_DOMAIN_WB doesn't send an ACK when its managed SRAM becomes
stable, which is not like the behavior the other power domains should
have. Therefore, it's necessary for such a power domain to have a fixed
and well-predefined duration to wait until its managed SRAM can be allowed
to access by all functions running on the top.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Instead of adding more and more fields to scp_domain_data which get
checked in the code flow, add a caps field used for an indication the
characteristics for each SCP domain.
At present, type u8 for the caps field is selected which can satisfy the
current situation and doesn't take up extra space against type bool
previously used.
Suggested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reuse the common helpers regmap_read_poll_timeout provided by Linux core
instead of an open-coded handling.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reuse the common helpers read[l,x]_poll_timeout provided by Linux core
instead of an open-coded handling. The name of the local variable
sram_pdn_ack in scpsys_power_on is renamed to pdn_ack in order to be
consistent with the one used in scpsys_power_off.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The usage of of_device_get_match_data() reduce the code size a bit.
Also, the only way to call pwrap_probe() is to match an entry in
of_pwrap_match_tbl[], so of_id cannot be NULL.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
1. split MFG power domain into MFG/MFG_SC1/MFG_SC2/MFG_SC3
according to MT2712 ECO design change
2. add subdomain support for MT2712
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fix the pointer to struct scp_subdomian not being moved forward
when each sub-domain is expected to be iteratively added through
pm_genpd_add_subdomain call.
Cc: stable@vger.kernel.org
Fixes: 53fddb1a66 ("soc: mediatek: reduce code duplication of scpsys_probe across all SoCs")
Reported-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add SCPSYS power domain driver for MT7623A SoC. The MT7623A's power
domains are the subset of MT7623 SoC's ones. As MT7623 SoC has full
features whereas MT7623A is being designed just for router applications.
Thus, MT7623A doesn't include those power domains multimedia function
belongs to. In order to avoid certain errors undoubtedly happening at
registering those power domains on MT7623A SoC using the existing MT7623
SCPSYS driver, it's required to define another setup specifically for
MT7623A SoC.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
use a meaningful definition for bus_prot_mask instead of just hardcoded
for it.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
There are dependent clock jpgdec/audio in scpsys on MT2712,
and will exist three dependent clocks on MT2712 VDEC.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT2712 add "set/clear" bus control register to each control register set
instead of providing only one "enable" control register, we could avoid
the read-modify-write racing by declaring "bus_prot_reg_update" as "false"
in scp_soc_data or declaring as "true" to use the legacy update method.
By improving the mtk-infracfg bus protection implementation to
support set/clear bus protection control method by IC configuration.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This branch contains platform-related driver updates for ARM and ARM64,
these are the areas that bring the changes:
New drivers:
- Driver support for Renesas R-Car V3M (R8A77970)
- Power management support for Amlogic GX
- A new driver for the Tegra BPMP thermal sensor
- A new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- The usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa, uniphier
and mediatek families.
- Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi.
Changes specific to some ARM-based SoC
- The Freescale/NXP DPAA QBMan drivers from PowerPC can now work
on ARM as well.
- Several changes for power management on Broadcom SoCs
- Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek
- Minor Cleanups for Samsung, TI OMAP SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaDggbAAoJEGCrR//JCVInIeQQAN1MDyO1UaWiFYnbkVOgzFcj
dqbFOc41DBE/90JoBWE8kR/rjyF83OqztiaYpx9viu2qMMBZVcOwxhCUthWK59c/
IujYdw4zGevLscF+jdrLbXgk97nfaWebsHyTAF307WAdZVJxiVGGzQEcgm71d6Zp
CXjLiUii4winHUMK9FLRY2st0HKAevXhuvZJVV432+sTg3p7fGVilYeGOL5G62WO
zQfCisqzC5q677kGGyUlPRGlHWMPkllsTTnfXcmV/FUiGyVa3lUWY5sEu+wCl96O
U1ffPENeNj/A/4fa1dbErtbiNnC2z/+jf+Dg7Cn8w/dPk4Suf0ppjP8RqIGyxmDl
Wm/UxbwDClxaeF4GSaYh2yKgGRJMH5N87bJnZRINE5ccGiol8Ww/34bFG0xNnfyh
jSAFAc318AFG62WD4lvqWc7LSpzOYxp/MNqIFXKN692St/MJLkx8/q0nTwY1qPY0
3SELz9II3hz+3MfDRqtRi7hZpkgHgQ+UG7S5+Xhmqrl309GOEldCjPVJhhXxWoxK
ZPtZOuyYvGhIC+YAnHaN6lUjADIdNJZHwbuXFImx85oKHVofoxHbcni5vk8Uu7z1
sQNYOtdDGaPG/2u9RJdJlPg/jIgLKxxt/Xm9TYVawpZ5hFANhBTtIq5ExCRAil68
j9sMOrpZ1DzCQyR7zN2v
=qDhq
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This branch contains platform-related driver updates for ARM and
ARM64, these are the areas that bring the changes:
New drivers:
- driver support for Renesas R-Car V3M (R8A77970)
- power management support for Amlogic GX
- a new driver for the Tegra BPMP thermal sensor
- a new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- the usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa,
uniphier and mediatek families
- updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi
Changes specific to some ARM-based SoC
- the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
ARM as well
- several changes for power management on Broadcom SoCs
- various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
Mediatek
- minor Cleanups for Samsung, TI OMAP SoCs"
[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
because the R8A77970 driver is missing a header file that came from
that pull.
The fact that this got merged afterwards only fixes it at this point,
and bisection of that driver will fail if/when you walk into the
history of that driver. - Linus ]
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
bus: add driver for the Technologic Systems NBUS
memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
soc: qcom: remove unused label
soc: amlogic: gx pm domain: add PM and OF dependencies
drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
dt-bindings: power: add amlogic meson power domain bindings
soc: amlogic: add Meson GX VPU Domains driver
soc: qcom: Remote filesystem memory driver
dt-binding: soc: qcom: Add binding for rmtfs memory
of: reserved_mem: Accessor for acquiring reserved_mem
of/platform: Generalize /reserved-memory handling
soc: mediatek: pwrap: fix fatal compiler error
soc: mediatek: pwrap: fix compiler errors
arm64: mediatek: cleanup message for platform selection
soc: Allow test-building of MediaTek drivers
soc: mediatek: place Kconfig for all SoC drivers under menu
soc: mediatek: pwrap: add support for MT7622 SoC
soc: mediatek: pwrap: add common way for setup CS timing extenstion
soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
..
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
remove the driver's own flag-based callback.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
When adding the MT6380 compatible, the sentinel for of_device_id was
deleted, which leades to the following compiler error:
FATAL: drivers/soc/mediatek/mtk-pmic-wrap: struct of_device_id is not terminated with a NULL entry!
Fix this by adding the sentinel again.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
When compiling using sparse, we got the following error:
drivers/soc/mediatek/mtk-pmic-wrap.c:686:25: error: dubious one-bit signed bitfield
Changing the data type to unsigned fixes this.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add cleanup for placing all Kconfig for all MediaTek SoC drivers under
the independent menu as other SoCs vendor usually did. Since the menu
would be shown depending on "ARCH_MEDIATEK || COMPILE_TEST" selected and
MTK_PMIC_WRAP is still safe compiling with the case of "COMPILE_TEST"
only, the superfluous dependency for those items under the menu also is
also being removed for the sake of simplicity.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add the registers, callbacks and data structures required to make the
PMIC wrapper work on MT7622.
Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Multiple platforms would always use their own way handling CS timing
extension on the bus which leads to a little bit code duplication.
Therefore, the patch groups the similar logic to handle CS timing
extension into the common function which allows the following SoCs
have more reusability for configing CS timing.
Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
and also add extra new regmap_config of 32-bit mode for MT6380
since old regmap_config of 16-bit mode can't be fit into the need.
Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
pwrap initialization is highly associated with the base SoC and the
target PMICs, so slight refactorization is made here for allowing
pwrap_init to run on those PMICs with different capability from the
previous MediaTek PMICs and the determination for the enablement of the
pwrap capability depending on PMIC type. Apart from this, the patch
makes the driver more extensible especially when more PMICs join into
the pwrap driver.
Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Some regulators such as MediaTek MT6380 also has to be written in
32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
into pwrap_write16 and one additional function pointer is introduced
for increasing flexibility allowing the determination which mode is
used by the pwrap slave detection through device tree.
Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
and one function pointer is introduced for increasing flexibility allowing
the determination which mode is used by the pwrap slave detection through
device tree.
Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
fixup those warnings such as lines over 80 words and parenthesis
alignment which would be complained by checkpatch.pl.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Scott Wood <oss@buserror.net>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add SCPSYS power domain driver for MT7622 SoC having four power domains
which are respectively ETHSYS for Ethernet including embedded switch,
WBSYS for WIFI and Bluetooth, HIF0SYS for PCI-E and SATA, and HIF1SYS for
USB. Those functions could be selectively powered gated when the
corresponding function is no longer to use in order to reach more minimal
power dissipation.
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reduce code duplication of scpsys_probe_mtXXXX across all SoCs using
the more generic scpsys_probe all covering all cases to avoid starting
to bloat the driver when more MediaTek SoCs supported are added.
Suggested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
of_device_ids are not supposed to change at runtime. All functions
working with of_device_ids provided by <linux/of.h> work with const
of_device_ids. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Acked-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
of_match_device could return NULL, and so can cause a NULL
pointer dereference later.
Signed-off-by: Shailendra Verma <shailendra.v@samsung.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
According to error handling in this function, it is likely that going to
'err_out2' was expected here.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds scpsys support for MT6797
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
for some chips, there is vdec item in scpsys, this patch adds it.
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Use variables to replace fixed defines since the offset
of the status of spm power might be different for some chips
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Kevin-CW Chen <kevin-cw.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add scpsys driver for MT2701.
mtk-scpsys now supports MT8173 (arm64) and MT2701 (arm). So it should
be enabled on both arm64 and arm platforms.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Refine scpsys driver common code to support multiple SoC / platform.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Read data fails sometimes because of a timeout that PMIC cannot transfer data
to PMIC wrap on time, extend the waiting time to 10ms to reduce the failed
rate.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
On ARM64, the mtk-pmic-wrap driver causes a harmless warning:
mtk-pmic-wrap.c:1062:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1074:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1086:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
.int_en_all = ~(BIT(31) | BIT(1)),
The problem is that the result of the BIT() macro is an 'unsigned long',
so taking the bitwise NOT operation of that results in an integer
with the upper 32 bits all set and that cannot be assigned to a
'u32' variable without loss of information.
This is harmless because we were never interested in the upper bits
here anyway, so we can shut up the warning by adding a simple cast
to 'u32'.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons. For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to
get done.
Finally, reset controller handling as always gets merged through here
as well.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXkGCrR//JCVInAQKb5BAAv2HuJ/tDjC8nNfYi0/aIt4uaRfRWE84t
+nIpdKl/pB9AQo+HdG9WNihHs2GN44PdQRrDZ1enQX8nvTzc+dUl0AI1GZmUDpF/
zCV2UJ39HMZcEPwf8lZk9X/JP4VOkJDM5pDgNZnnqdvkq0oqtKzmh0Kt6m2g6fIS
LR3FVtCRxJDeT+pT+EpoN4jpW0cb3mjTWbn/a8Ar3BH07KBA3U22MVJhHArLjS30
/aXP+AkgdvlgmBher5z44N6Qd/KOLn78rnE4LCRC4FwSCqA+qqPJQNGNblV5MHjE
s5CYTqlihqLiGapqJ4zGBhmqj0XU/3kFVboGqYlTGjzMkOFgjddTpMdfkBUoG5oJ
UubJ51zzSLXTcMwILGNXVls4YjJRKwNH7jeSjuMqpWrAYP4qBcMn/HQ1GqUjkNv+
yWkheHiLDYgYkIDOBDuFUtJ7OXiVumGGxIE+r2K/sXeNI7gFcDxFExMIo11vPAWP
WJ8ydTchyb/RUQbzhjEXhoIeCZwXQfe9s11qsyFQDCZLleWYQGs3gFKdEI1E7+BE
oe018BSP+uaVXdaV18Ne4smwzydLAU9/ieUoO45PAUSN2reV4lWhFTlNiiiMd3Id
IWoYwpxqP2VW9zJvLz6QGF/P+3cZ00m/1lecJCKHHPBmbUijCHWJmgLT73AdSXmR
YIJ2UM5QMiY=
=x+iD
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons.
For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to get
done.
Finally, reset controller handling as always gets merged through here
as well"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
arm-ccn: Enable building as module
soc/tegra: pmc: Add generic PM domain support
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
drivers: firmware: psci: make two helper functions inline
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
...
Add the registers, callbacks and data structures required to make the
wrapper work on MT2701 and MT7623.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623
EVB. The only function that we need to touch is pwrap_init_cipher().
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds a new struct pwrap_slv_type that we use to store the slave
specific data. The patch adds 2 new helper functions to access the dew
registers. The slave type is looked up via the wrappers child node.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
With more SoCs being added the list of helper functions like these would
grow. To mitigate this problem we remove the existing helpers and change
the code to test against the pmic type stored inside the pmic specific
datastructure that our context structure points at. There is one usage of
pwrap_is_mt8135() that is ambiguous as the test should not be dependent on
mt8135, but rather on the existence of a bridge. Add a new element to
pmic_wrapper_type to indicate if a bridge is present and use this where
appropriate.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Different SoCs will use different bitmask for the wdt_src. This patch
defines the bitmask in the pmic_wrapper_type struct. This allows us to
support new SoCs with a different bitmask to the one currently used.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Different SoCs will use different bitmask for the SPI_WRITE command. This
patch defines the bitmask in the pmic_wrapper_type struct. This allows us
to support new SoCs with a different bitmask to the one currently used.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch moves the SoC specific wrapper init code into separate callback
to avoid pwrap_init() getting too large. This is done by adding a new
element called init_special to pmic_wrapper_type. Each currently supported
SoC gets its own version of the callback and we copy the code that was
previously inside pwrap_init() to these new callbacks. Finally we point the
2 instances of pmic_wrapper_type at the 2 new functions.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Split init_reg_clock up into SoC specific callbacks. The patch also
reorders the code to avoid the need for callback function prototypes.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
As we add support for more devices struct pmic_wrapper_type will grow and
we do not really want to start duplicating all the elements in
struct pmic_wrapper.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This reverts commit cc8ed76938
("soc: mediatek: SCPSYS: Fix double enabling of regulators") [1].
This patch fixes mt8173-evb failing boot issue. With commit [1],
genpd state will not sync to real power domain state. So some
resources such as clocks and regulators may stay in a wrong state.
There is no regulator double enabling issue on mainline kernel, so
we can refert commit [1] safely.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
With CONFIG_PM enabled do not call genpd->power_on manually as this
will cause the regulators being turned on once in SCPSYS probe and
then again when the genpd core turns on the domains. Instead, call
genpd->power_on only with CONFIG_PM disabled and tell the genpd core
that the domains are disabled when registered.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
SCPSYS can't be built as module. Use builtin_platform_driver instead.
For this probe must not be __init and the data accessed can't be
__initconst. Remove this macros. To make the impact as small as possible,
fold scp_domain_data into scp_domain via a pointer.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Reported-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Since STAUPD interrupts aren't handled on mt8173, disable watchdog timeout
monitor of STAUPD to avoid WDT_INT triggered by STAUPD.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Sometimes PMIC is too busy to send data in time to cause pmic wrap timeout,
because pmic wrap is waiting for FSM_VLDCLR after finishing WACS2_CMD. It
just return error when issue happened, so the state machine will stay on
FSM_VLDCLR state when data send back later by PMIC and timeout again in next
time because pmic wrap waiting for FSM_IDLE state at the beginning of the
read/write function.
Clear the vldclr when timeout if state machine stay on FSM_VLDCLR.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Tested-by: Ricky Liang <jcliang@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add regulator support for scpsys driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJWdxkqAAoJELQ5Ylss8dND1bMP/0KvyxO3PELRZ5VFVURapOGP
UjwhHw5MGxTwNIDN395DwCtjGq4dX7j5cGDGgXhmg+Me6Hhu4aWjD90hFffl5yov
Y0TQJeV2tQ7zJZ1vKReiFxFT/uUdC8vAya+fGKrIAAPDFWLHLXX6HRUInlHNMNmf
iZ0PPIHxwKmyNmClC8Qea7lwlBPD3qTawJfw0atFUdQbbdR/1Wi0Zu1SfKwDL969
evI6WmrvnCmYNY+kUQresaTXpWD7OmiyC8iIgqrVrd4FrVmYfGRwxP5DIMs4RUsH
28EhuxcSGPMz1H8rY5OEsMhwjWi6c/okzxK7JUjVUGydvaYBRnoWrTSCGKJqKZ3S
ySf2zTn7gQFRelvvdyi9iMZEm9aXpYkQRasY5ktMKlrBVTLfjpolPfhSewhBhY9h
2FN7WuWenLkyfx2/oZFJlrYpbvj0ecLMU7yYccG4/adiIec8VknbOTt2QCHIS8p3
qDLbzfekFOCU+C/jy2GX1CRclQE4L4icog1P5hHZ9j5FBY7LaclFLYF/jEUX6FFJ
7BFDLbzphwRrJGW5orxfOkiRJKth7uer7d1drMjaItDrAKJRkXSI4Cus8RPTx1lf
qxyVL+av9ceLWxMIVVneu+uzjssH8cGzWS7YeJa5fbJm/46v0IlmnptSwd82SHmN
fzwtYg2UYN5VKSC67eRa
=pz5g
-----END PGP SIGNATURE-----
Merge tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Change the scpsys to builtin_platform_driver_probe.
Add regulator support for scpsys driver.
* tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek:
drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular
soc: mediatek: SCPSYS: Add regulator support
Signed-off-by: Olof Johansson <olof@lixom.net>
The Kconfig currently controlling compilation of this code is:
drivers/soc/mediatek/Kconfig:config MTK_SCPSYS
drivers/soc/mediatek/Kconfig: bool "MediaTek SCPSYS Support"
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The power domains are supplied by regulators. Add support for them so
that the regulators are properly turned on before a domain is powered up
and turned off when a domain is powered down.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
If enable Mediatek 8173 SoC, it should also enable power domain
driver. Otherwise access clk subsystem register will fail.
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
In kernel late init, it turns off all unused clocks, which
needs to access subsystem registers such as VENC and VENC_LT.
Accessing MT8173 VENC registers needs two top clocks, mm_sel and
venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel.
So we need to keep these clocks on before accessing their registers.
This patch keeps venc_sel / venclt_sel clock on when
VENC / VENC_LT's power is on, to prevent system hang up while
accessing its registeres.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The watchdog may not be initialized by the bootloader, even if the rest
of the pwrap is. Move the watchdog initialization out of pwrap_init() to
make sure the watchdog is always initialized and not only when the pwrap
is uninitialized.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
SCPSYS driver misses the module.h include which makes it fail
when compiling with allmodconf.
This patch fixes this.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
platform_driver does not need to set an owner because
platform_driver_register() will set it.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds a power domain driver for the Mediatek SCPSYS unit.
The System Control Processor System (SCPSYS) has several power
management related tasks in the system. The tasks include thermal
measurement, dynamic voltage frequency scaling (DVFS), interrupt
filter and lowlevel sleep control. The System Power Manager (SPM)
inside the SCPSYS is for the MTCMOS power domain control.
For now this driver only adds power domain support, the more
advanced features are not yet supported. The driver implements
the generic PM domain device tree bindings, the first user will
most likely be the Mediatek AFE audio driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds support for some miscellaneous bits of the infracfg controller.
The mtk_infracfg_set/clear_bus_protection functions are necessary for
the scpsys power domain driver to handle the bus protection bits which
are contained in the infacfg register space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The pmic-wrapper calls the reset controller. If CONFIG_RESET_CONTROLLER
is not set, compilation fails with:
drivers/soc/mediatek/mtk-pmic-wrap.c: In function ‘pwrap_probe’:
drivers/soc/mediatek/mtk-pmic-wrap.c:836:2: error: implicit declaration of function ‘devm_reset_control_get’ [-Werror=implicit-function-declaration]
This patch sets the dependency in the Kconfig file.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
When the PMIC wrapper state machine has read a register it goes into the
"wait for valid clear" (vldclr) state. The state machine stays in this
state until the VLDCLR bit is written to. We should write this bit after
reading a register because the SCPSYS won't let the system go into
suspend as long as the state machine waits for valid clear.
Since now we never leave the state machine in vldclr state we no longer
have to check for this state on pwrap_read/pwrap_write entry and can
remove the corresponding code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
replace chipselect extension values based on SPI clock with hardcoded SoC
specific values.
The PMIC wrapper has the ability of extending the chipselects by configurable
amounts of time. We configured the values based on the rate of SPI clock, but
this is wrong. The delays should be configured based on the internal PMIC clock
that latches the values from the SPI bus to the internal PMIC registers. By
default this clock is 24MHz. Other clock frequencies are for debugging only
and can be removed from the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The PMIC wrapper driver adds a couple of variables that are never used.
Remove them to avoid build warnings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds support for the PMIC wrapper found on MediaTek MT8135 and
MT8173 SoCs. The PMIC wrapper is found on MT6xxx SoCs aswell but these
are currently not supported.
On MediaTek MT8135, MT8173 and other SoCs the PMIC is connected via
SPI. The SPI master interface is not directly visible to the CPU, but
only through the PMIC wrapper inside the SoC. The communication between
the SoC and the PMIC can optionally be encrypted. Also a non standard
Dual IO SPI mode can be used to increase speed. The MT8135 also supports
a special feature named "IP Pairing". With IP Pairing the pins of some
SoC internal peripherals can be on the PMIC. The signals of these pins
are routed over the SPI bus using the pwrap bridge. Because of these
optional non SPI conform features the PMIC driver is not implemented as
a SPI bus master driver.
Signed-off-by: Flora Fu, MediaTek
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
