Commit Graph

48 Commits

Author SHA1 Message Date
Patrice Chotard 0f77ce26eb Revert "ARM: sti: Implement dummy L2 cache's write_sec"
This reverts commit 7b8e0188fa.

Initially, STiH410-B2260 was supposed to be secured, that's why
l2c_write_sec was stubbed to avoid secure register access from
non secure world.

But by default, STiH410-B2260 is running in non secure mode,
so L2 cache register accesses are authorized, l2c_write_sec stub
is not needed.

With this patch, L2 cache is configured and performance are enhanced.

Link: https://lore.kernel.org/r/20200618172456.29475-1-patrice.chotard@st.com
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-06-28 14:46:54 +02:00
Thomas Gleixner d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Thomas Gleixner ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Patrice Chotard 704cfd7f5f ARM: sti: remove pen_release and boot_lock
The pen_release implementation was created for Versatile platforms to
work around boot loaders that did not differentiate between the
various different secondary CPUs on this ARM development platform.
This should not be true of modern platforms where we send IPIs to
specific CPUs to wake them up.  Remove the pen_release stuff from
SoCs that make use of the per-CPU IPI mechanism.

The boot_lock is something that was required for ARM development
platforms to ensure that the delay calibration worked properly.  This
is not necessary for modern platforms that have better bus bandwidth
and do not need to calibrate the delay loop for secondary cores.
Remove the boot_lock entirely.

Due to pen_release and boot_lock removal, .smp_prepare_cpus and
.smp_boot_secondary STi callbacks must be reworked properly to
allow secondary CPU bring up.

Secondary CPU is initialized and started by a U-BOOTROM firmware.
Secondary CPU is spinning and waiting for a write at cpu_strt_ptr.
Writing secondary_startup address at cpu_strt_ptr makes it to
jump directly to secondary_startup().

This write must be done in .smp_boot_secondary callback and not
in .smp_prepare_cpus as previously, this insures that secondary_data
struct is populated in __cpu_up() (stack, pgdir and swapper_pg_dir fields).

The IPI in sti_boot_secondary() is useless, so remove it.

This patch is the merged of Russell's patch [1] and the rework of
.smp_prepare_cpus and .smp_boot_secondary STi callbacks [2].

[1] https://patchwork.kernel.org/patch/10729435/
[2] https://patchwork.kernel.org/patch/10735795/

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-20 14:32:15 +01:00
Florian Fainelli 64fc2a947a ARM: 8641/1: treewide: Replace uses of virt_to_phys with __pa_symbol
All low-level PM/SMP code using virt_to_phys() should actually use
__pa_symbol() against kernel symbols. Update code where relevant to move
away from virt_to_phys().

Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Laura Abbott <labbott@redhat.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2017-02-28 11:06:10 +00:00
Peter Griffin 64933513e4 reset: sti: Remove STiH415/6 reset support
Support for STiH415/6 SoCs is being removed from the
kernel because the platforms are obsolete. This patch removes
the reset drivers for these SoC's.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-10-20 11:52:08 +02:00
Arnd Bergmann a98405432e Highlights:
-----------
 - Add a dummy L2 cache's write_sec callback as in non secure mode execution,
    we can't get access to L2 cache secure registers
 - Cosmetics change, in case of dump_stack, update the hardware name with a
    more generic for the STi SoCs family
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Merge tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/soc

Merge "STi SoC changes for v4.8" from Patrice Chotard:

- Add a dummy L2 cache's write_sec callback as in non secure mode execution,
   we can't get access to L2 cache secure registers
- Cosmetics change, in case of dump_stack, update the hardware name with a
   more generic for the STi SoCs family

* tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
  ARM: sti: Implement dummy L2 cache's write_sec
  ARM: STi: Update machine _namestr to be more generic.
2016-07-14 15:08:15 +02:00
Patrice Chotard 7b8e0188fa ARM: sti: Implement dummy L2 cache's write_sec
This patch implements the write_sec callback that handle PL310
secure registers writes.
This callback is just a stub for now, to avoid system crash.
Later, it could handle SMC calls so that TZ handles the needed writes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2016-07-11 09:15:44 +02:00
Peter Griffin 50fdda702f ARM: STi: Update machine _namestr to be more generic.
This string is used by dump_stack and as we now support
more SoC's than just STiH415/6 it is misleading to have
the current string in the stack trace.

This patch updates it to be more generic for the STi
family of SoCs.

So instead of looking like this

[  271.672555] Hardware name: STiH415/416 SoC with Flattened Device Tree
[  271.678998] [<c0310490>] (unwind_backtrace) from [<c030bb54>] (show_stack+0x10/0x14)
[  271.686746] [<c030bb54>] (show_stack) from [<c058bc4c>] (dump_stack+0x98/0xac)
[snip]

it now looks like this:

[    2.669879] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.6.0-rc3-00026-g38a1ce6-dirty #76
[    2.677973] Hardware name: STi SoC with Flattened Device Tree
[    2.683723] [<c0310490>] (unwind_backtrace) from [<c030bb54>] (show_stack+0x10/0x14)
[    2.691472] [<c030bb54>] (show_stack) from [<c058bc0c>] (dump_stack+0x98/0xac)
[snip]

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2016-07-11 09:15:29 +02:00
Linus Walleij 5c34a4e89c ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
This replaces:

- "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can
  now be selected directly.

- "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB
  is now selectable by everyone, so we need not declare our
  intent to select it.

When ordering the symbols the following rationale was used:
if the selects were in alphabetical order, I moved select GPIOLIB
to be in alphabetical order, but if the selects were not
maintained in alphabetical order, I just replaced
"select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB".

Cc: Michael Büsch <m@bues.ch>
Cc: arm@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2016-06-03 12:18:13 -07:00
Lee Jones 33406c8057 ARM: STi: Update platform level menuconfig 'help'
Encompass newer STiH4{07,10} and STiH418 SoC based platforms.

Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2016-04-07 16:32:14 +02:00
Linus Torvalds 5083c54264 ARM: SoC cleanups for v4.5
A smallish number of general cleanup commits this release cycle. Some
 of these are minor tweaks:
 
 - shmobile change of binding for their GIC (using arm,pl390 now)
 - ARCH_RENESAS introduction
 - Misc other renesas updates
 
 There's also a couple of treewide commits from Masahiro Yamada cleaning up
 const/__initconst for SMP operation structs and a switch to using "depends
 on" instead of if-constructs on most of the Kconfig platform targets.
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Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "A smallish number of general cleanup commits this release cycle.  Some
  of these are minor tweaks:

   - shmobile change of binding for their GIC (using arm,pl390 now)
   - ARCH_RENESAS introduction
   - Misc other renesas updates

  There's also a couple of treewide commits from Masahiro Yamada
  cleaning up const/__initconst for SMP operation structs and a switch
  to using "depends on" instead of if-constructs on most of the Kconfig
  platform targets"

* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  staging: board: armadillo800eva: Use "arm,pl390"
  staging: board: kzm9d: Use "arm,pl390"
  ARM: shmobile: r8a7778 dtsi: Use "arm,pl390" for GIC
  ARM: shmobile: emev2 dtsi: Use "arm,pl390" for GIC
  ARM: shmobile: r8a7740 dtsi: Use "arm,pl390" for GIC
  ARM: shmobile: r7s72100 dtsi: Use "arm,pl390" for GIC
  ARM: use "depends on" for SoC configs instead of "if" after prompt
  ARM/clocksource: use automatic DT probing for ux500 PRCMU
  ARM: use const and __initconst for smp_operations
  ARM: hisi: do not export smp_operations structures
  ARM: mvebu: remove unused mach/gpio.h
  ARM: shmobile: Remove legacy mach/irqs.h
  ARM: shmobile: Introduce ARCH_RENESAS
  MAINTAINERS: Remove link to oss.renesas.com which is closed
2016-01-20 17:55:20 -08:00
Daniel Lezcano 2ffdf71b83 clocksource/drivers/st_lpc: Fix Kconfig dependency
Change the Kconfig selection rule by letting the STI arch to select
the timer.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-12-15 09:41:14 +01:00
Masahiro Yamada e324654294 ARM: use "depends on" for SoC configs instead of "if" after prompt
Many ARM sub-architectures use prompts followed by "if" conditional,
but it is wrong.

Please notice the difference between

    config ARCH_FOO
            bool "Foo SoCs" if ARCH_MULTI_V7

and

    config ARCH_FOO
            bool "Foo SoCs"
            depends on ARCH_MULTI_V7

These two are *not* equivalent!

In the former statement, it is not ARCH_FOO, but its prompt that
depends on ARCH_MULTI_V7.  So, it is completely valid that ARCH_FOO
is selected by another, but ARCH_MULTI_V7 is still disabled. As it is
not unmet dependency, Kconfig never warns.  This is probably not what
you want.

The former should be used only when you need to do so, and you really
understand what you are doing.  (In most cases, it should be wrong!)

For enabling/disabling sub-architectures, the latter is always correct.

As a good side effect, this commit fixes some entries over 80 columns
(mach-imx, mach-integrator, mach-mbevu).

[Arnd: I note that there is not really a bug here, according to
 the discussion that followed, but I can see value in being consistent
 and in making the lines shorter]

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Krzysztof Halasa <khc@piap.pl>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-01 22:44:51 +01:00
Masahiro Yamada 75305275a7 ARM: use const and __initconst for smp_operations
These smp_operations structures are not over-written, so add "const"
qualifier and replace __initdata with __initconst.

Also, add "static" where it is possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org> # qcom part
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-12-01 22:17:45 +01:00
Linus Torvalds 50686e8a3a ARM: SoC platform updates for v4.3
New or improved SoC support:
 
 - Addition of support for Atmel's SAMA5D2 SoC
 - Addition of Freescale i.MX6UL
 - Improved support of TI's DM814x platform
 - Misc fixes and improvements for RockChip platforms
 - Marvell MVEBU suspend/resume support
 
 A few driver changes that ideally would belong in the drivers branch are
 also here (acked by appropriate maintainers):
 
 - Power key input driver for Freescale platforms (svns)
 - RTC driver updates for Freescale platforms (svns/mxc)
 - Clk fixes for TI DM814/816X
 
 + a bunch of other changes for various platforms
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...
2015-09-01 12:18:40 -07:00
Nicolas Pitre 19c233b79d ARM: appropriate __init annotation for const data
Init data marked const should be annotated with __initconst for
correctness and not __initdata.  In some cases the array gathering
references to that data has to be marked const as well. This fixes
LTO builds that otherwise fail with section mismatch errors.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-28 13:55:27 +02:00
Peter Griffin 50de4dd4bc ARM: STi: Remove platform call to trace_hardirqs_off()
Calling trace_hardirqs_off() from the platform specific
secondary startup code as not been necessary since Dec 2010
when Russell King consolidated the call into the common SMP
code.

2c0136d ARM: SMP: consolidate trace_hardirqs_off() into common SMP code

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:15:30 +02:00
Peter Griffin 94a8cfceaa ARM: STi: Add code to release secondary cores from holding pen.
Most upstream devs boot STi platform via JTAG which abuses the
boot process by setting the PC of secondary cores directly. As
a consquence, booting STi platforms via u-boot results in only
the primary core being brought up as the code to manage the
holding pen is not upstream.

This patch adds the necessary code to bring the secondary cores
out of the holding pen. It uses the cpu-release-addr DT property
to get the address of the holding pen from the bootloader.

With this patch booting upstream kernels via u-boot works
correctly:

[    0.045456] CPU: Testing write buffer coherency: ok
[    0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.045734] Setting up static identity map for 0x40209000 - 0x40209098
[    0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.065081] Brought up 2 CPUs
[    0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
[    0.065092] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:14:18 +02:00
Lee Jones 56439ab0e3 ARM: STi: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot
This driver is used to enable System Configuration Register controlled
External, CTI (Core Sight), PMU (Performance Management), and PL310 L2
Cache IRQs prior to use.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-05-13 10:42:38 +02:00
Fabrice GASNIER 60b3c7ed71 ARM: STi: Add STiH410 SoC support
This patch adds support to STiH410 SoC.

Please note "st,stih410" is already present in device tree.
The problem is that it is missing the entry in the match table,
and so the L2 cache and other cpus than 0 don't get initialized.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Tested-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2015-03-11 15:34:45 +01:00
Arnd Bergmann 1fd01aa217 ARM: sti: always enable RESET_CONTROLLER
A lot of the sti device drivers require reset controller support,
but do not all have individual 'depends on RESET_CONTROLLER'
statements. Using 'select' here once avoids a lot of build errors
resulting from this.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
2015-02-18 12:20:29 +01:00
Maxime COQUELIN dd548cf910 ARM: STi: Add STiH418 SoC support
This patch adds support to STiH418 SoC.

Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-01-16 13:10:21 +01:00
Peter Griffin c273211419 ARM: sti: Add STiH407 Kconfig entry to select STIH407_RESET
The STiH407 is a STMicroelectronics Digital Consumer electronics
family, targetted at set-top-box and other audio/video applications.

This patch selects the reset controller driver for this family which
is essential to take various IP's on the SoC out of powerdown / reset.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-10-31 09:58:58 +01:00
Sachin Kamat 7e4588e83b ARM: sti: Staticize local variables
Symbols local to this file are made static.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Cc: kernel@stlinux.com
Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
Cc: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-06 17:49:54 -07:00
Linus Torvalds b4b664bef4 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
 "A number of low impact fixes, the most noticable one is the thumb2
  frame pointer fix.  We also fix a regression caused during this merge
  window with ARM925 CPUs running with caches disabled, and fix a number
  of warnings"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: arm925: ensure assembly sets up writethrough mapping
  ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)
  ARM: l2c: fix dependencies on PL310 errata symbols
  ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode
  ARM: 8068/1: scoop: Remove unused variable
2014-06-24 13:59:00 -07:00
Russell King a641f3a6ab ARM: l2c: fix dependencies on PL310 errata symbols
A number of configurations spit out warnings similar to:

warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_588369 which has unmet direct dependencies (CACHE_L2X0)
warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_727915 which has unmet direct dependencies (CACHE_L2X0)

Clean up the dependencies here:
* PL310 symbols should only be selected when CACHE_L2X0 is enabled.
* Since the cache-l2x0 code detects PL310 presence at runtime, and we will
  eventually get rid of CACHE_PL310, surround these errata options with an
  if CACHE_L2X0 conditional rather than repeating the dependency against
  each.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-19 11:29:28 +01:00
Rob Herring 21278aeafb ARM: use menuconfig for sub-arch menus
The System Type menu is getting quite long with platforms and is
inconsistent in handling of sub-arch specific options. Tidy up the menu
by making platform options a menuconfig entry containing any platform
specific config items.

[arnd: change OMAP part according to suggestion from
 Tony Lindgren <tony@atomide.com>]

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17 17:09:48 +02:00
Linus Torvalds eb3d3ec567 Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next
Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...
2014-06-05 15:57:04 -07:00
Russell King 4d6229f6e5 ARM: l2c: sti: convert to generic l2c OF initialisation
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.  We can remove the .init_machine as it becomes
the same as the generic version.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30 00:50:08 +01:00
Russell King 1a5a954ce0 ARM: l2c: fix register naming
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess.  Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices.  Provide full auxiliary control register definitions.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-30 00:48:43 +01:00
Maxime Coquelin c6594025c0 ARM: STi: Add STiH407 SoC support
This patch adds support to STiH407 SoC.

Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-17 10:22:30 +02:00
Arnd Bergmann a65b5f4ccd Merge branch 'cleanup/kconfig' into next/drivers
This resolves a conflict between the new sti reset
controller driver and the Kconfig cleanup.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-18 16:25:47 +01:00
Stephen Gallimore 8cd9bf18d7 ARM: STi: Add reset controller support to mach-sti Kconfig
This patch selects reset controller support for ARCH_STI and
selects the reset controllers for STiH415 and STiH416 SoCs.

Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
2014-03-11 10:53:32 +00:00
Rob Herring 9352b05b6e ARM: select MIGHT_HAVE_CACHE_L2X0 for V6 and V7 multi-platform
Many V6 and V7 platforms have an L2x0 cache, so make
CONFIG_MIGHT_HAVE_CACHE_L2X0 visible for V6 and V7 multi-platform
builds.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-02-19 16:44:00 -06:00
Rob Herring 90bc8ac77d ARM: select HAVE_SMP for V7 multi-platform
All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7
multi-platform builds.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-02-19 16:43:27 -06:00
Rob Herring ddb902cc34 ARM: centralize common multi-platform kconfig options
Multi-platform requires various kconfig options to be selected, so
platforms don't need to select them individually.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2014-02-19 16:38:18 -06:00
Nicolas Pitre f45913fde0 ARM: clean up cache handling in platform code
We have a handy macro to replace open coded __cpuc_flush_dcache_area(()
and outer_clean_range() sequences. Let's use it. No functional change.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-11 16:24:34 -08:00
Linus Torvalds 71f777ed50 ARM: SoC fixes for 3.13 merge window
A first set of batches of fixes for 3.13. The diffstat is large mostly
 because we're adding a defconfig for a family that's been lacking it, and
 there's some missing clock information added for i.MX and OMAP.
 
 The at91 new code is around dealing with RTC/RTT reset at boot to fix possible
 hangs due to pending wakeup interrupts coming in during early boot.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A first set of batches of fixes for 3.13.  The diffstat is large
  mostly because we're adding a defconfig for a family that's been
  lacking it, and there's some missing clock information added for i.MX
  and OMAP.

  The at91 new code is around dealing with RTC/RTT reset at boot to fix
  possible hangs due to pending wakeup interrupts coming in during early
  boot"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
  ARM: OMAP2+: Fix build for dra7xx without omap4 and 5
  ARM: OMAP2+: omap_device: maintain sane runtime pm status around suspend/resume
  doc: devicetree: Add bindings documentation for omap-des driver
  ARM: dts: doc: Document missing compatible property for omap-sham driver
  ARM: OMAP3: Beagle: fix return value check in beagle_opp_init()
  ARM: at91: fix hanged boot due to early rtt-interrupt
  ARM: at91: fix hanged boot due to early rtc-interrupt
  video: exynos_mipi_dsim: Remove unused variable
  ARM: highbank: only select errata 764369 if SMP
  ARM: sti: only select errata 764369 if SMP
  ARM: tegra: init fuse before setting reset handler
  ARM: vt8500: add defconfig for v6/v7 chips
  ARM: integrator_cp: Set LCD{0,1} enable lines when turning on CLCD
  ARM: OMAP: devicetree: fix SPI node compatible property syntax items
  pinctrl: single: call pcs_soc->rearm() whenever IRQ mask is changed
  ARM: OMAP2+: smsc911x: fix return value check in gpmc_smsc911x_init()
  MAINTAINERS: drop discontinued mailing list
  ARM: dts: i.MX51: Fix OTG PHY clock
  ARM: imx: set up pllv3 POWER and BYPASS sequentially
  ARM: imx: pllv3 needs relock in .set_rate() call
  ...
2013-11-16 12:45:55 -08:00
Linus Torvalds 9073e1a804 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull trivial tree updates from Jiri Kosina:
 "Usual earth-shaking, news-breaking, rocket science pile from
  trivial.git"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits)
  doc: usb: Fix typo in Documentation/usb/gadget_configs.txt
  doc: add missing files to timers/00-INDEX
  timekeeping: Fix some trivial typos in comments
  mm: Fix some trivial typos in comments
  irq: Fix some trivial typos in comments
  NUMA: fix typos in Kconfig help text
  mm: update 00-INDEX
  doc: Documentation/DMA-attributes.txt fix typo
  DRM: comment: `halve' -> `half'
  Docs: Kconfig: `devlopers' -> `developers'
  doc: typo on word accounting in kprobes.c in mutliple architectures
  treewide: fix "usefull" typo
  treewide: fix "distingush" typo
  mm/Kconfig: Grammar s/an/a/
  kexec: Typo s/the/then/
  Documentation/kvm: Update cpuid documentation for steal time and pv eoi
  treewide: Fix common typo in "identify"
  __page_to_pfn: Fix typo in comment
  Correct some typos for word frequency
  clk: fixed-factor: Fix a trivial typo
  ...
2013-11-15 16:47:22 -08:00
Olof Johansson a48c4904a9 ARM: sti: only select errata 764369 if SMP
764369 depends on SMP, so don't select it on !SMP configs.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Cc: Stuart Menefy <stuart.menefy@st.com>
2013-11-14 10:46:33 -08:00
Masanari Iida 8c88126bbb treewide: Fix typo in Kconfig
Correct spelling typo in Kconfig.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2013-10-14 15:23:02 +02:00
Sebastian Hesselbarth 28fbb151d5 ARM: sti: remove custom .init_time hook
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. To get rid of it, move l2cc init to
.init_machine hook instead.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
2013-09-29 21:09:43 +02:00
Srinivas Kandagatla d6f67eb787 ARM: STi: remove sti_secondary_start from INIT section.
This patch removes sti_secondary_start from _INIT section, there are 2
reason for this removal.
 1. discarding such a small code does not save much, given the RAM
sizes.
 2. Having this code discarded, creates corruption issue when we boot
smp-kernel with nrcpus=1 or with single cpu node in DT.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-04 13:40:55 -07:00
Srinivas Kandagatla c9250073cd ARM: STi: Set correct ARM ERRATAs.
Some of the ARM_ERRATA selection is not done in the initial SOC support
patches. This patch selects 2 new ARM_ERRATA's and removes one which was
actually fixed.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
[olof: reorder new errata entries]
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-07-22 19:36:13 -07:00
Paul Gortmaker 8bd26e3a7e arm: delete __cpuinit/__CPUINIT usage from all ARM users
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code.  It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.

[1] https://lkml.org/lkml/2013/5/20/589

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-07-14 19:36:52 -04:00
Srinivas Kandagatla 15969b4577 ARM: sti: Add STiH416 SOC support
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 13:26:58 -07:00
Srinivas Kandagatla 65ebcc1158 ARM: sti: Add STiH415 SOC support
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25 13:26:47 -07:00