The ZTE ZX platform is being removed, so the PWM driver is no longer
needed and removed as well. Other than that this contains a small set of
fixes and cleanups across a couple of drivers.
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmA38PQZHHRoaWVycnku
cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zoQuxD/91qtwYm1aJriKhEkQELoob
tZooaurwulzJoyzACrUFa4+r6zsrsFdsHQZGuThp/GBVeEAZCTcFVzP6URCPdD9f
phagpsws4W4GpCpQDTXt203LTEvwTPPO1VzQKXzxGjmftc1T3X8pehcr3HyiT/ym
XNvqi0N9B19jGWAnXbTmcTIMbDrY6GI0W5xFGLgVUbsJXi7Ti6/UUbNnKfAd6C3I
utGMLCYAg0DQpaD8tkQd+pMMBJfGtg47T+o6dUakIommViiIZvonMZyB7UZ4CaOn
peUIUnWQaJf4XkEnaQa7qmpA0JLvAs50o0mQSVfgNx1Ob+XqS99oziwHmnw1FR8t
QqIp/0mF45QzBr90rA0r85L+L9eTFq7YoRL7GsKIeaiOQgnf06BjB8tj2J/eoCMQ
bo4hIbqdf0GcSY8CX4EWL11xhHTFvdgvpMeoiNhXnwi85W08Gp45P9uin2oebiN2
7yeq29CM8/JaqGqef0SN9ALoQh9TH999u7YHa5LFbknT0qjPT3GwYIP1cb92Q2VI
iA+v3Rsi8hmHbfkLXb7/arBwORLcmLg8xJr8e/kjbLWgZzF3Rz8Ngfgcle6lK0WI
aBFkvGQHWfDXD2WpV46Tw8IVYggBs0n/iLbhmYnRDymAs+08snZXXSya20iT0oH/
NpfZAXaXiPxz/who17MIcA==
=Zxk+
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"The ZTE ZX platform is being removed, so the PWM driver is no longer
needed and removed as well.
Other than that this contains a small set of fixes and cleanups across
a couple of drivers"
* tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: lpc18xx-sct: remove unneeded semicolon
pwm: iqs620a: Correct a stale state variable
pwm: iqs620a: Fix overflow and optimize calculations
pwm: rockchip: Enable clock before calling clk_get_rate()
pwm: rockchip: Eliminate potential race condition when probing
pwm: rockchip: Replace "bus clk" with "PWM clk"
pwm: rockchip: rockchip_pwm_probe(): Remove superfluous clk_unprepare()
pwm: rockchip: Enable APB clock during register access while probing
pwm: Remove ZTE ZX driver
If duty cycle is first set to a value that is sufficiently high to
enable the output (e.g. 10000 ns) but then lowered to a value that
is quantized to zero (e.g. 1000 ns), the output is disabled as the
device cannot drive a constant zero (as expected).
However if the device is later re-initialized due to watchdog bite,
the output is re-enabled at the next-to-last duty cycle (10000 ns).
This is because the iqs620_pwm->out_en flag unconditionally tracks
state->enabled instead of what was actually written to the device.
To solve this problem, use one state variable that encodes all 257
states of the output (duty_scale) with 0 representing tri-state, 1
representing the minimum available duty cycle and 256 representing
100% duty cycle.
Signed-off-by: Jeff LaBundy <jeff@labundy.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
If state->duty_cycle is 0x100000000000000, the previous calculation of
duty_scale overflows and yields a duty cycle ratio of 0% instead of
100%. Fix this by clamping the requested duty cycle to the maximal
possible duty cycle first. This way it is possible to use a native
integer division instead of a (depending on the architecture) more
expensive 64bit division.
With this change in place duty_scale cannot be bigger than 256 which
allows to simplify the calculation of duty_val.
Fixes: 6f0841a819 ("pwm: Add support for Azoteq IQS620A PWM generator")
Tested-by: Jeff LaBundy <jeff@labundy.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The documentation for clk_get_rate() in include/linux/clk.h states the
function's result is valid only for a clock source that has been
enabled. However, the Rockchip PWM driver uses this function in two places
to query the rate of a clock without first ensuring it is enabled.
Fix this by modifying rockchip_pwm_get_state() and rockchip_pwm_apply() so
they enable a device's PWM clock before querying its rate (in the latter
case, the querying is actually done in rockchip_pwm_config()) and disable
the clock again before returning.
Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Commit 48cf973cae ("pwm: rockchip: Avoid glitches on already running
PWMs") introduced a potential race condition in rockchip_pwm_probe(): A
consumer could enable an inactive PWM, or disable a running one, between
rockchip_pwm_probe() registering the device via pwmchip_add() and checking
whether it is enabled (to determine whether it was started by a
bootloader). This could result in a device's PWM clock being either enabled
once more than necessary, potentially causing it to continue running when
no longer needed, or disabled once more than necessary, producing a warning
from the kernel.
Eliminate these possibilities by modifying rockchip_pwm_probe() so it
checks whether a device is enabled before registering it rather than after.
Fixes: 48cf973cae ("pwm: rockchip: Avoid glitches on already running PWMs")
Reported-by: Trent Piepho <tpiepho@gmail.com>
Signed-off-by: Simon South <simon@simonsouth.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Clarify the Rockchip PWM driver's error messages by referring to the clock
that operates a PWM device as the "PWM" clock, matching its name in the
device tree, rather than the "bus" clock (which is especially misleading in
the case of devices that also use a separate clock for bus access).
Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Simon South <simon@simonsouth.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
If rockchip_pwm_probe() fails to register a PWM device it calls
clk_unprepare() for the device's PWM clock, without having first disabled
the clock and before jumping to an error handler that also unprepares
it. This is likely to produce warnings from the kernel about the clock
being unprepared when it is still enabled, and then being unprepared when
it has already been unprepared.
Prevent these warnings by removing this unnecessary call to
clk_unprepare().
Fixes: 48cf973cae ("pwm: rockchip: Avoid glitches on already running PWMs")
Signed-off-by: Simon South <simon@simonsouth.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Commit 457f74abbe ("pwm: rockchip: Keep enabled PWMs running while
probing") modified rockchip_pwm_probe() to access a PWM device's registers
directly to check whether or not the device is enabled, but did not also
change the function so it first enables the device's APB clock to be
certain the device can respond. This risks hanging the kernel on systems
with PWM devices that use more than a single clock.
Avoid this by enabling the device's APB clock before accessing its
registers (and disabling the clock when register access is complete).
Fixes: 457f74abbe ("pwm: rockchip: Keep enabled PWMs running while probing")
Reported-by: Thierry Reding <thierry.reding@gmail.com>
Suggested-by: Trent Piepho <tpiepho@gmail.com>
Signed-off-by: Simon South <simon@simonsouth.net>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The ZTE ZX platform is getting removed, so this driver is no longer
needed.
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
This is a fairly big release cycle from the PWM framework's point of
view. There's a large patcheset here which converts drivers to use the
new devm_platform_ioremap_resource() helper and a bunch of minor fixes
to existing drivers. Some of the existing drivers also add support for
more hardware, such as Atmel SAMA 5D2 and Mediatek MT8183.
Finally there's a couple of new drivers for Intel Keem Bay and LGM SoCs
as well as the DesignWare PWM controller.
-----BEGIN PGP SIGNATURE-----
iQJNBAABCAA3FiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl/c0lQZHHRoaWVycnku
cmVkaW5nQGdtYWlsLmNvbQAKCRDdI6zXfz6zodh8EACkFTep9fQMtx03HsT/VXEi
qfpJX8JhzB5/k8MbVyJjE7uy/dVs9Aer4rE53V93X3vN5Z1Lq78aC7UKpmfix/OQ
EEtaSDL1j5KPk6XyxTSWwt5ynUP7rQdjAl1Sh+DfplrOPRUkDo5EA6vw1W1afQ0Q
IxK4PSzWmHFfgs3V9gSvR7V6ChtyDzHfpuiy2WrMJkGtzP/f6Oebv87qYNsfOJFV
VAPBPxe++BpM2opnFGAhpdqOtXKaaFl/x6zahNeDJNPv6R6LDbs2Hk3r+2OSj0Al
WRH/9aB/50SEHZLVeDP0JzW8lX5OEaGH/ZtI+iXAL1mWM3YYlK4nfJYA//NszCtI
uXK5aZ/xmm3PiDRJhL/zku+rIU8kh+Yj9P+MsCfTjrWSvjfXopOGQ3RsrANNBtOj
93IhDA0hjiVArfSwQaWjsRRMTtzGQY6m6FHnHIBDkhI889q1HI/BVPsl3AL8AaTv
0hBRp3SovuGdWqRTxw9ttMCi1a7aes7NTRmbXIH+tv/xB9hvn9DKUcJdrxN7KSu+
NWSeT2vVZHRadQFfCmDi1jlTShDYsMVNbuDA7Holk1XwCFjIE7O5Ottx0s9Dvw0U
e+yzwYhhpvE8/VkkglLkebIYOp8WQTkxhcVH4s0b7wgD0fyHhFHH0tsIj8sgjk7v
dVDFsWQsM99YcvV9BSjoRg==
=FlkB
-----END PGP SIGNATURE-----
Merge tag 'pwm/for-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This is a fairly big release cycle from the PWM framework's point of
view.
There's a large patcheset here which converts drivers to use the new
devm_platform_ioremap_resource() helper and a bunch of minor fixes to
existing drivers. Some of the existing drivers also add support for
more hardware, such as Atmel SAMA 5D2 and Mediatek MT8183.
Finally there's a couple of new drivers for Intel Keem Bay and LGM
SoCs as well as the DesignWare PWM controller"
* tag 'pwm/for-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (66 commits)
pwm: sun4i: Remove erroneous else branch
pwm: sl28cpld: Set driver data before registering the PWM chip
pwm: Remove unused function pwmchip_add_inversed()
pwm: imx27: Fix overflow for bigger periods
pwm: bcm2835: Support apply function for atomic configuration
pwm: keembay: Fix build failure with -Os
pwm: core: Use octal permission
pwm: lpss: Make compilable with COMPILE_TEST
pwm: Fix dependencies on HAS_IOMEM
pwm: Use -EINVAL for unsupported polarity
pwm: sti: Remove unnecessary blank line
pwm: sti: Avoid conditional gotos
pwm: Add PWM fan controller driver for LGM SoC
Add DT bindings YAML schema for PWM fan controller of LGM SoC
pwm: Add DesignWare PWM Controller Driver
dt-bindings: pwm: mtk-disp: add MT8167 SoC binding
pwm: mediatek: Add MT8183 SoC support
pwm: mediatek: Always use bus clock
dt-bindings: pwm: pwm-mediatek: Add documentation for MT8183 SoC
pwm: Add PWM driver for Intel Keem Bay
...
Commit d3817a6470 ("pwm: sun4i: Remove redundant needs_delay") changed
the logic of an else branch so that the PWM_EN and PWM_CLK_GATING bits
are now cleared if the PWM is to be disabled, whereas previously the
condition was always false, and hence the branch never got executed.
This code is reported causing backlight issues on boards based on the
Allwinner A20 SoC. Fix this by removing the else branch, which restores
the behaviour prior to the offending commit.
Note that the PWM_EN and PWM_CLK_GATING bits still get cleared later in
sun4i_pwm_apply() if the PWM is to be disabled.
Fixes: d3817a6470 ("pwm: sun4i: Remove redundant needs_delay")
Reported-by: Taras Galchenko <tpgalchenko@gmail.com>
Suggested-by: Taras Galchenko <tpgalchenko@gmail.com>
Tested-by: Taras Galchenko <tpgalchenko@gmail.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
It is good practice to set the driver data before registering a device
with a subsystem because the subsystem or the driver core may call back
into the driver implementation. This is not currently an issue, but to
prevent future changes from causing this to break unexpectedly, make
sure that the driver data is set before the PWM chip registration.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The second parameter of do_div is an u32 and NSEC_PER_SEC * prescale
overflows this for bigger periods. Assuming the usual pwm input clk rate
of 66 MHz this happens starting at requested period > 606060 ns.
Splitting the division into two operations doesn't loose any precision.
It doesn't need to be feared that c / NSEC_PER_SEC doesn't fit into the
unsigned long variable "duty_cycles" because in this case the assignment
above to period_cycles would already have been overflowing as
period >= duty_cycle and then the calculation is moot anyhow.
Fixes: aef1a3799b ("pwm: imx27: Fix rounding behavior")
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Tested-by: Johannes Pointner <johannes.pointner@br-automation.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use the newer .apply function of pwm_ops instead of .config, .enable,
.disable and .set_polarity. This guarantees atomic changes of the pwm
controller configuration. It also reduces the size of the driver.
Since now period is a 64 bit value, add an extra check to reject periods
that exceed the possible max value for the 32 bit register.
This has been tested on a Raspberry PI 4.
Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The driver used this construct:
#define KMB_PWM_LEADIN_MASK GENMASK(30, 0)
static inline void keembay_pwm_update_bits(struct keembay_pwm *priv, u32 mask,
u32 val, u32 offset)
{
u32 buff = readl(priv->base + offset);
buff = u32_replace_bits(buff, val, mask);
writel(buff, priv->base + offset);
}
...
keembay_pwm_update_bits(priv, KMB_PWM_LEADIN_MASK, 0,
KMB_PWM_LEADIN_OFFSET(pwm->hwpwm));
With CONFIG_CC_OPTIMIZE_FOR_SIZE the compiler (here: gcc 10.2.0) this
triggers:
In file included from /home/uwe/gsrc/linux/drivers/pwm/pwm-keembay.c:16:
In function ‘field_multiplier’,
inlined from ‘keembay_pwm_update_bits’ at /home/uwe/gsrc/linux/include/linux/bitfield.h:124:17:
/home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to ‘__bad_mask’ declared with attribute error: bad bitfield mask
119 | __bad_mask();
| ^~~~~~~~~~~~
In function ‘field_multiplier’,
inlined from ‘keembay_pwm_update_bits’ at /home/uwe/gsrc/linux/include/linux/bitfield.h:154:1:
/home/uwe/gsrc/linux/include/linux/bitfield.h:119:3: error: call to ‘__bad_mask’ declared with attribute error: bad bitfield mask
119 | __bad_mask();
| ^~~~~~~~~~~~
The compiler doesn't seem to be able to notice that with field being
0x3ffffff the expression
if ((field | (field - 1)) & ((field | (field - 1)) + 1))
__bad_mask();
can be optimized away.
So use __always_inline and document the problem in a comment to fix
this.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: Vijayakannan Ayyathurai <vijayakannan.ayyathurai@intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Permission bits are easier readable in octal than with using the
symbolic names.
Fixes the following warning generated by checkpatch:
WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
#1341: FILE: drivers/pwm/core.c:1341:
+ debugfs_create_file("pwm", S_IFREG | S_IRUGO, NULL, NULL,
Signed-off-by: Soham Biswas <sohambiswas41@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
All used ACPI functions have dummy implementations, and there is no hard
dependency on x86.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Drivers making use of IO remapping must depend on HAS_IOMEM.
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Instead of using a mix of -EOPNOTSUPP and -ENOTSUPP, use the more
standard -EINVAL to signal that the specified polarity value was
invalid.
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
A single blank line is enough to separate logical code blocks.
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Using gotos for conditional code complicates this code significantly.
Convert the code to simple conditional blocks to increase readability.
Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Intel Lightning Mountain(LGM) SoC contains a PWM fan controller. This
PWM controller does not have any other consumer, it is a dedicated PWM
controller for fan attached to the system. Add driver for this PWM fan
controller.
Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Introduce driver for Synopsys DesignWare PWM Controller used on Intel
Elkhart Lake.
Initial implementation is done by Felipe Balbi while he was working at
Intel with later changes from Raymond Tan and me.
Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org>
Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org>
Co-developed-by: Raymond Tan <raymond.tan@intel.com>
Signed-off-by: Raymond Tan <raymond.tan@intel.com>
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The MediaTek PWM IP can sometimes use the 26 MHz source clock to
generate the PWM signal, but the driver currently assumes that we always
use the PWM bus clock to generate the PWM signal.
This commit modifies the PWM driver in order to force the PWM IP to
always use the bus clock as source clock.
I do not have the datasheet of all the MediaTek SoC, so I don't know if
the register to choose the source clock is present in all the SoCs or
only in subset. As a consequence I made this change optional by using a
platform data paremeter to says whether this register is supported or
not. On all the SoCs I don't have the datasheet (MT2712, MT7622, MT7623,
MT7628, MT7629) I kept the behavior to be the same as before this
change.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
When there are other PWM controllers enabled along with pwm-lp3943,
pwm-lp3942 is failing to probe with -EEXIST error. This is because
other PWM controllers are probed first and assigned PWM base 0 and
pwm-lp3943 is requesting for 0 again.
In order to avoid this, assign the chip base with -1, so that it is
dynamically allocated.
Fixes: af66b3c093 ("pwm: Add LP3943 PWM driver")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Uwe Kleine-König <u.kleine-könig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Add sama5d2 support. The sama5d2 has a new clock input, its gclk. Index 0
of the clock selector is the gclk instead of the peripheral clock divided
by 2.
For now, the gclk is not used because the peripheral clock divided by 8
already gives a 9.6ns resolution which is enough for most use cases.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The PWM is now a subnode of the used TCB. This is cleaner and it mainly
allows to stop wasting TCB channels when only 2 or 4 PWMs are used.
This also removes the atmel_tclib dependency
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-pwm@vger.kernel.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The devm_clk_get() may return -EPROBE_DEFER which is not handled properly
by TI EHRPWM driver and causes unnecessary boot log messages.
Hence, add proper deferred probe handling with new dev_err_probe() API.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
As the comment above the code setting the DPM_FLAG_NO_DIRECT_COMPLETE
flag explains:
/*
* On Cherry Trail devices the GFX0._PS0 AML checks if the controller
* is on and if it is not on it turns it on and restores what it
* believes is the correct state to the PWM controller.
* Because of this we must disallow direct-complete, which keeps the
* controller (runtime)suspended, on resume to avoid 2 issues:
* 1. The controller getting turned on without the linux-pm code
* knowing about this. On devices where the controller is unused
* this causes it to stay on during the next suspend causing high
* battery drain (because S0i3 is not reached)
* 2. The state restoring code unexpectedly messing with the controller
*/
The pm-core must not skip resume to avoid the GFX0._PS0 AML code messing
with the PWM controller behind our back. But leaving the controller
runtime-suspended (skipping runtime-resume + normal-suspend) during
suspend is fine. Set the DPM_FLAG_SMART_SUSPEND flag to allow this.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
ACPI LPSS devices use direct-complete style suspend/resume handling by
default. We set the DPM_FLAG_SMART_PREPARE and define a prepare handler
to disable this on Cherry Trail devices.
Clean this up a bit by setting the DPM_FLAG_NO_DIRECT_COMPLETE flag for
Cherry Trail devices, instead of defining a prepare handler.
While at it also improve the comment explaining why this is necessary.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwm_lpss_is_updating() does a sanity check which should never fail.
If the check does actually fail that is worth logging an error,
especially since this means that we will skip making the requested
changes to the PWM settings.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
The ab8500 driver is the last one which doesn't (explicitly) use dynamic
allocation of the pwm id. Looking through the kernel sources I didn't
find a place that relies on this id. And with the device probed from
device tree pdev->id is -1 anyhow; making this explicit looks
beneficial, too.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
pwmchip_add() doesn't emit an error message, so add one in the driver.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Use devm_platform_ioremap_resource() to simplify code. While at it, also
declare the "i" and "ret" variables on the same line since they are of
the same type.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
