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3 Commits

Author SHA1 Message Date
Tudor Ambarus 96f63ffdbc ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi 
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-6-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-05-15 16:50:33 +02:00
Tudor Ambarus e1e2662036 ARM: dts: at91: sama5d27_wlsom1: Add alias for i2c0 
wlsom1 has an ATECC608A-TNGTLS Secure Element connected on the i2c0
bus. Add alias for the i2c device to not rely on probe order for the
i2c device numbering.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200413140922.154886-1-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2020-04-14 13:16:58 +02:00
Eugen Hristev 5d4c3cfb63 ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek 
This is the addition of a new Evaluation Kit the SAMA5D27-WLSOM1-EK.
It's based on the Microchip WireLess SoM which contains the
SAMA5D27 LPDDR2 2Gbits SiP.

[nicolas.ferre@microchip.com]: initial implementation
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: ported to new kernel version,
[eugen.hristev@microchip.com]: addition of peripherals (adc, pmic, qspi, uart)
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lore.kernel.org/r/1573543139-8533-4-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
 2019-12-09 20:23:43 +01:00