The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Replace mentioning of legacy API by the latest one.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
The node returned by of_get_parent() with refcount incremented,
of_node_put() needs be called when finish using it. So add it in the
end of of_pinctrl_get().
Fixes: 936ee2675e ("gpio/rockchip: add driver for rockchip gpio")
Signed-off-by: Wang Yufen <wangyufen@huawei.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
New drivers:
- Cypress CY8C95x0 chip pin control support, along with an immediate
cleanup.
- Mediatek MT8188 SoC pin control support.
- Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem)
pin control support.
- Qualcomm PM7250, PM8450
- Rockchip RV1126 SoC pin control support.
Improvements:
- Fix some missing pins in the Armada 37xx driver.
- Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro.
- Fix some GPIO irq_chips to be immutable.
- Massive Qualcomm device tree binding cleanup, with more to come.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmNEhjMACgkQQRCzN7AZ
XXMNXRAAuqKM8b/Kw7H9S2sBgMuESk2WKe/lmJ6mQCWK1iyo0xecEQi1wN3WGZt1
DfoYHdsB45GWnRcwIVIl2wAjce72EFepCa/sut55TR/bLDxRfSiHGBKatSk5VkQp
IGx75EtsRPgnZCUU3jQgrQEiI8eqj90nr8CugZwD7gocjAtaRJXb0cc3NPyk/TDh
Wyku3rYuzztLCJHwsZ7Q9zh3s9b8Vb43pK9BW8HHeuODqMECaDWTEQUDetKz/Z8X
v7v01PSOafBQUCoFPezz/20kOV9llxFSCeCqbwG3zvjPSjofVwSFoSH1Op4Ybr/t
JWM8Py1+/G/rbsRhZuEahLJ+/eLy7SWABSUq2sxwCEr/VkzNCZ1jKH/qB1S7ZkI6
GcHPbEeCDzcN+yfKIo8p6WHUYivpj2XKXqh/BWIY63rJ3ukrq3WHuJNvCO15F/TJ
PDuLIL0RdNxSanoamsplNtFWA3ap92P2P933k+v06VEZpZys8j/JHFUaysbiqpL+
GoHdRjspFC/4Ob3FwbbiYktpoKmRsZl7PCJSYnnz5nrHFUbQ4LtrgppqMgGXny16
P0pW8IBmIF4yVteodQFsyYZq2yH91TengHleqoFsK0OjYXG0BmRm3lYWLjWbojxe
U7E5T5qQo2rtdVct9d47UznK3IRThDDJx9DtG+Y19VpkKiOy6j8=
=PvLX
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"There is nothing exciting going on, no core changes, just a few
drivers and cleanups.
New drivers:
- Cypress CY8C95x0 chip pin control support, along with an immediate
cleanup
- Mediatek MT8188 SoC pin control support
- Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin
control support
- Qualcomm PM7250, PM8450
- Rockchip RV1126 SoC pin control support
Improvements:
- Fix some missing pins in the Armada 37xx driver
- Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP()
macro
- Fix some GPIO irq_chips to be immutable
- Massive Qualcomm device tree binding cleanup, with more to come"
* tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits)
MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement
pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100"
pinctrl: Create subdirectory for StarFive drivers
dt-bindings: pinctrl: st,stm32: Document interrupt-controller property
dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property
dt-bindings: pinctrl: st,stm32: Document gpio-line-names
pinctrl: st: stop abusing of_get_named_gpio()
pinctrl: wpcm450: Correct the fwnode_irq_get() return value check
pinctrl: bcm: Remove unused struct bcm6328_pingroup
pinctrl: qcom: restrict drivers per ARM/ARM64
pinctrl: bcm: ns: Remove redundant dev_err call
gpio: rockchip: request GPIO mux to pinctrl when setting direction
pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback
pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops
pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux()
pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper
pinctrl: stm32: Switch to use dev_err_probe() helper
dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings
pinctrl: qcom: spmi-gpio: Add compatible for PM7250B
...
New drivers:
- add a new driver for the IMX System Controller Unit GPIOs
GPIO core:
- add fdinfo output for the GPIO character device file descriptors (allows
user-space to determine which processes own which GPIO lines)
- improvements to OF GPIO code
- new quirk for Asus UM325UAZ in gpiolib-acpi
- new quirk for Freescale SPI in gpiolib-of
Driver improvements:
- add a new macro that reduces the amount of boilerplate code in ISA drivers
and use it in relevant drivers
- support two new models in gpio-pca953x
- support new model in gpio-f7188x
- convert more drivers to use immutable irq chips
- other minor tweaks
Device-tree bindings:
- add DT bindings for gpio-imx-scu
- convert Xilinx GPIO bindings to YAML
- reference the properties from the SPI peripheral device-tree bindings
instead of providing custom ones in the GPIO controller document
- add parsing of GPIO hog nodes to the DT bindings for gpio-mpfs-gpio
- relax the node name requirements in gpio-stmpe
- add new models for gpio-rcar and gpio-pxa95xx
- add a new vendor prefix: Diodes (for Diodes, Inc.)
Misc:
- pulled in the immutable branch from the x86 platform drivers tree including
support for a new simatic board that depends on GPIO changes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmNAhB8ACgkQEacuoBRx
13KY5xAAjBvBPNxtKqwqs82M6A3rmIPGsfuBBsuWGwQw9MFrVeHx1c58uCistq1s
ECnvNuPkpXB/9npXWvWipr9kV5UA5hneDzT9ploUzCsSi+Bvb8W2ZUmW1tsELo04
deJmQ5VAImcUVnDIuIwWXt+sx0Clc8fMVNGy9yiSs1JOAT1WO7N9VNy/is3cRIk2
VsVH7iN/G7MJPWx+CoBj7eVkdXs7W93yUSW6QLzVCvoYFWcf8A4xQe2SDFnaRXvH
5BERflEjbl+0iSHG14jvd7YMmMdnxCZdCkFpjVIEUpKvVT/X6+wbO7q1aCz0/Vig
LgbElUT8fRCq7RxrZjrZA7mXI8rpSkTugDqweIbqlw8larA5zjSj+S+0mpEQPwZT
tA+mEjHRBWiDBr//tHgnF9TU4HezVwqFaZ72bhctuIgZ5ivbF8PA+Cd7HAkUKnn8
K8dZdOde4d9WmWj7w3olIgFOwJwvPCztKr5uYgxJOG8ECr7MM5pepaMXK6stSC19
21Iwwb9dOUi3LwIWAQW2upG0S9BNHGy/hqNd5YN+lF2S9neQ3n4vrWQj7AJivtXi
vldCqXdbukyrKiUlf9svXdmudYFPgf6zwPlXNWk1CtZ1uB8OR8rbDn9bEeQSwzGf
op6ADdPTuoD49NO0r49cb8dmr1tFwGbGIX54JJB3FTKuGo7SxcY=
=Ax6X
-----END PGP SIGNATURE-----
Merge tag 'gpio-updates-for-v6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio updates from Bartosz Golaszewski:
"We have a single new driver, support for a bunch of new models,
improvements in drivers and core gpiolib code as well device-tree
bindings changes.
Summary:
New driver:
- IMX System Controller Unit GPIOs
GPIO core:
- add fdinfo output for the GPIO character device file descriptors
(allows user-space to determine which processes own which GPIO
lines)
- improvements to OF GPIO code
- new quirk for Asus UM325UAZ in gpiolib-acpi
- new quirk for Freescale SPI in gpiolib-of
Driver improvements:
- add a new macro that reduces the amount of boilerplate code in ISA
drivers and use it in relevant drivers
- support two new models in gpio-pca953x
- support new model in gpio-f7188x
- convert more drivers to use immutable irq chips
- other minor tweaks
Device-tree bindings:
- add DT bindings for gpio-imx-scu
- convert Xilinx GPIO bindings to YAML
- reference the properties from the SPI peripheral device-tree
bindings instead of providing custom ones in the GPIO controller
document
- add parsing of GPIO hog nodes to the DT bindings for gpio-mpfs-gpio
- relax the node name requirements in gpio-stmpe
- add new models for gpio-rcar and gpio-pxa95xx
- add a new vendor prefix: Diodes (for Diodes, Inc.)
Misc:
- pulled in the immutable branch from the x86 platform drivers tree
including support for a new simatic board that depends on GPIO
changes"
* tag 'gpio-updates-for-v6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (36 commits)
gpio: tc3589x: Make irqchip immutable
gpiolib: cdev: add fdinfo output for line request file descriptors
gpio: twl4030: Reorder functions which allows to drop a forward declaraion
gpiolib: fix OOB access in quirk callbacks
gpiolib: of: factor out conversion from OF flags
gpiolib: rework quirk handling in of_find_gpio()
gpiolib: of: make Freescale SPI quirk similar to all others
gpiolib: of: do not ignore requested index when applying quirks
gpio: ws16c48: Ensure number of irq matches number of base
gpio: 104-idio-16: Ensure number of irq matches number of base
gpio: 104-idi-48: Ensure number of irq matches number of base
gpio: 104-dio-48e: Ensure number of irq matches number of base
counter: 104-quad-8: Ensure number of irq matches number of base
isa: Introduce the module_isa_driver_with_irq helper macro
gpio: pca953x: Add support for PCAL6534
gpio: pca953x: Swap if statements to save later complexity
gpio: pca953x: Fix pca953x_gpio_set_pull_up_down()
dt-bindings: gpio: pca95xx: add entry for pcal6534 and PI4IOE5V6534Q
dt-bindings: vendor-prefixes: add Diodes
gpio: mt7621: Switch to use platform_get_irq() function
...
Before the split of gpio and pinctrl sections in their own driver,
rockchip_set_mux was called in pinmux_ops.gpio_set_direction for
configuring a pin in its GPIO function.
This is essential for cases where pinctrl is "bypassed" by gpio
consumers otherwise the GPIO function is not configured for the pin and
it does not work. Such was the case for the sysfs/libgpiod userspace
GPIO handling.
Let's call pinctrl_gpio_direction_input/output when setting the
direction of a GPIO so that the pinctrl core requests from the rockchip
pinctrl driver to put the pin in its GPIO function.
Fixes: 9ce9a02039 ("pinctrl/rockchip: drop the gpio related codes")
Fixes: 936ee2675e ("gpio/rockchip: add driver for rockchip gpio")
Cc: stable@vger.kernel.org
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20220930132033.4003377-3-foss+kernel@0leil.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Switching between falling/rising edges for IRQ_TYPE_EDGE_BOTH on pins that
require debounce can cause the device to lose events due to a desync
between pin state and irq type.
This problem is resolved by switching between IRQ_TYPE_LEVEL_LOW and
IRQ_TYPE_LEVEL_HIGH instead.
Fixes: 936ee2675e ("gpio/rockchip: add driver for rockchip gpio")
Signed-off-by: João H. Spies <jhlspies@gmail.com>
Link: https://lore.kernel.org/r/20220808025121.110223-1-jhlspies@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add V2.1 rockchip gpio controller type, which is part of the
RK3588 SoC.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Add support for deferring other params like PIN_CONFIG_INPUT_ENABLE.
This will be used to add support for PIN_CONFIG_INPUT_ENABLE to the
driver.
Fixes: e7165b1dff ("pinctrl/rockchip: add a queue for deferred pin output settings on probe")
Fixes: 59dd178e1d ("gpio/rockchip: fetch deferred output settings on probe")
Signed-off-by: Caleb Connolly <kc@postmarketos.org>
Link: https://lore.kernel.org/r/20220328005005.72492-2-kc@postmarketos.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With v2 hardware, an IRQ can be configured to trigger on both edges via
a bit in the int_bothedge register. Currently, the driver sets this bit
when changing the trigger type to IRQ_TYPE_EDGE_BOTH, but fails to reset
this bit if the trigger type is later changed to something else. This
causes spurious IRQs, and when using gpio-keys with wakeup-event-action
set to EV_ACT_(DE)ASSERTED, those IRQs translate into spurious wakeups.
Fixes: 3bcbd1a85b ("gpio/rockchip: support next version gpio controller")
Reported-by: Guillaume Savaton <guillaume@baierouge.fr>
Tested-by: Guillaume Savaton <guillaume@baierouge.fr>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
GPIO library does copy the of_node from the parent device of
the GPIO chip, there is no need to repeat this in the individual
drivers. Remove these assignment all at once.
For the details one may look into the of_gpio_dev_init() implementation.
While at it, remove duplicate parent device assignment where it is the case.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-By: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Use the standard gpiochip request/release resource functions so that any
GPIOs used as interrupts are properly locked. This allows libgpiod to
correctly show these GPIOs as in-use.
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
- Fix wakeup interrupts in the AMD driver affecting AMD laptops.
- Fix parent irqspec translation in the Qualcomm SPMI GPIO driver.
- Fix deferred probe handling in the Rockchip driver, this is a
stopgap solution while we look for something more elegant.
- Add PM suspend callbacks to the Qualcomm SC7280 driver.
- Some minor doc fix (should have come in earlier, sorry)
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmFTkc4ACgkQQRCzN7AZ
XXNfYA//fE2S4iV3d8Vj5rO03jtUSDdPRKg0TGFmL44pz+HPkIz+lRMbeEqjjEzi
G1Rm4GNyifiS01jh3DSa3aS0JhdvOyVD7J2Hih2WEVYvMxi+ZUfdcuGgfwD1xFmO
Haweg9vEYBlAtW1NcJPHH4YxN+qBwgrW41cnMOGxR4IB/sNGNoDdAdxJaXfwno08
Ku+5PgIQif6YVb45WFgzDD6TF+khXClw2oqlNu7iO9TJ4zVP5I9of10bmhpPzfhW
SoT2ySoxvBZqV71y6vtmc9X58nxyMRCFSWMVhCeQRcFnYRywpBpbLgP99y3xBxOn
tYrseBXmguCe/tCqlld3BmHFwHkVC6vzURB9sEYL1Ea+xhQ3bnI4swMrt2UB2KAE
UIWYw1nq6p8hMEGdsr042+9S8W6HNJGrfFs7YcFFmEuL7wJ4DtStNXkNWvXbXTs0
+w0XoUbA1IjOzfycJguU1J9pZSZopd0xOL9aTmJGYC1zNUUvPOYGM9NknbHr50mH
mhTJYyRUCi2QDWUV7SforTdnRwkaZiW1j+wggOw1rO5pEt3orBgZQ/cPeMBYV+FR
lHiKtAHBoXMq0a93zukGyD4iH0CPnefiHWhvrfq+Md/Q91fJvAw6cTRIOYSz6XW3
XGGvRN+xj0kk+vo+o5dyDgnZewKK8nVUBwGyiG2gzA2FNYZKVEQ=
=Gel/
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
"Some few pin control fixes for the v5.15 kernel cycle. The most
critical is the AMD fixes.
- Fix wakeup interrupts in the AMD driver affecting AMD laptops.
- Fix parent irqspec translation in the Qualcomm SPMI GPIO driver.
- Fix deferred probe handling in the Rockchip driver, this is a
stopgap solution while we look for something more elegant.
- Add PM suspend callbacks to the Qualcomm SC7280 driver.
- Some minor doc fix (should have come in earlier, sorry)"
* tag 'pinctrl-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: qcom: sc7280: Add PM suspend callbacks
gpio/rockchip: fetch deferred output settings on probe
pinctrl/rockchip: add a queue for deferred pin output settings on probe
pinctrl: qcom: spmi-gpio: correct parent irqspec translation
pinctrl: amd: Handle wake-up interrupt
pinctrl: amd: Add irq field data
pinctrl: core: Remove duplicated word from devm_pinctrl_unregister()
The function uses the newly introduced rockchip_gpio_readl_bit()
which directly returns the actual value of the requeste bit.
So using the existing bit-wise check for the bit inside the value
will always return 0.
Fix this by dropping the bit manipulation on the result.
Fixes: 3bcbd1a85b ("gpio/rockchip: support next version gpio controller")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
The gpio driver runs into issues on v1 gpio blocks, as the db_clk
and the whole extended debounce support is only ever defined on v2.
So checking for the IS_ERR on the db_clk is not enough, as it will
be NULL on v1.
Fix this by adding the needed condition for v2 first before checking
the existence of the db_clk.
This caused my rk3288-veyron-pinky to enter a reboot loop when it
tried to enable the power-key as adc-key device.
Fixes: 3bcbd1a85b ("gpio/rockchip: support next version gpio controller")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Fetch the output settings the pinctrl driver may have created
for pinctrl hogs and set the relevant pins as requested.
Fixes: 9ce9a02039 ("pinctrl/rockchip: drop the gpio related codes")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20210913224926.1260726-5-heiko@sntech.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There has spin lock for irq set type already, so drop irq_gc_lock and
irq_gc_unlock.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Link: https://lore.kernel.org/r/20210816012135.1119234-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Store register offsets in the struct rockchip_gpio_regs, this patch
prepare for the driver update for new gpio controller.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Link: https://lore.kernel.org/r/20210816012111.1119125-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch add support for rockchip gpio controller, which is supported
in pinctrl driver in the past.
With this patch, the pinctrl-rockchip driver will drop gpio related
codes and populate platform driver to gpio-rockchip.
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Link: https://lore.kernel.org/r/20210816012053.1119069-1-jay.xu@rock-chips.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rob Herring