Commit graph

3 commits

Author SHA1 Message Date
Ashwin Chaugule
4219853aef ACPI / CPPC: Fix potential memory leak
Commit 337aadff8e (ACPI: Introduce CPU performance controls using CPPC)
leads to the following static checker warning:

        drivers/acpi/cppc_acpi.c:527 acpi_cppc_processor_probe()
        warn: overwrite may leak 'cpc_ptr'

Fix the warning by removing the bogus per-CPU pointer dereference.

Fixes: 337aadff8e (ACPI: Introduce CPU performance controls using CPPC)
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-26 04:47:02 +01:00
Dan Carpenter
32c0b2f606 ACPI / CPPC: signedness bug in register_pcc_channel()
The "pcc_subspace_idx" is -1 if it hasn't been initialized yet.  We need
it to be signed.

Fixes: 337aadff8e (ACPI: Introduce CPU performance controls using CPPC)
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-26 04:44:17 +01:00
Ashwin Chaugule
337aadff8e ACPI: Introduce CPU performance controls using CPPC
CPPC stands for Collaborative Processor Performance Controls
and is defined in the ACPI v5.0+ spec. It describes CPU
performance controls on an abstract and continuous scale
allowing the platform (e.g. remote power processor) to flexibly
optimize CPU performance with its knowledge of power budgets
and other architecture specific knowledge.

This patch adds a shim which exports commonly used functions
to get and set CPPC specific controls for each CPU. This enables
CPUFreq drivers to gather per CPU performance data and use
with exisiting governors or even allows for customized governors
which are implemented inside CPUFreq drivers.

Signed-off-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Reviewed-by: Al Stone <al.stone@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-10-12 22:49:55 +02:00