Namespace conversion scripted with coccinelle.
Also retrieve the irq type from irq_data in intc_enable_or_unmask()
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* 'trivial' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6: (25 commits)
video: change to new flag variable
scsi: change to new flag variable
rtc: change to new flag variable
rapidio: change to new flag variable
pps: change to new flag variable
net: change to new flag variable
misc: change to new flag variable
message: change to new flag variable
memstick: change to new flag variable
isdn: change to new flag variable
ieee802154: change to new flag variable
ide: change to new flag variable
hwmon: change to new flag variable
dma: change to new flag variable
char: change to new flag variable
fs: change to new flag variable
xtensa: change to new flag variable
um: change to new flag variables
s390: change to new flag variable
mips: change to new flag variable
...
Fix up trivial conflict in drivers/hwmon/Makefile
Replace EXTRA_CFLAGS with ccflags-y.
Signed-off-by: matt mooney <mfm@muteddisk.com>
Acked-by: WANG Cong <xiyou.wangcong@gmail.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
Reset vector can be setup by bootloader and kernel doens't need
to touch it. If you require to setup reset vector, please use
CONFIG_MANUAL_RESET_VECTOR throught menuconfig.
It is not possible to setup address 0x0 as reset address because
make no sense to set it up at all.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: John Williams <john.williams@petalogix.com>
If soft reset falls through with no hardware assisted reset, the best
we can do is jump to the reset vector and see what the bootloader left
for us.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: John Williams <john.williams@petalogix.com>
Microblaze vector table stores several vectors (reset, user exception,
interrupt, debug exception and hardware exception).
All these functions can be below address 0x10000. If they are, wrong
vector table is genarated because jump is not setup from two instructions
(imm upper 16bit and brai lower 16bit).
Adding specific offset prevent problem if address is below 0x10000.
For this case only brai instruction is used.
Signed-off-by: Michal Simek <monstr@monstr.eu>
irq_chip.end got obsolete with the removal of __do_IRQ().
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Tested-by: Michal Simek <monstr@monstr.eu>
LKML-Reference: <20110203004210.240154507@linutronix.de>
Warning log:
CHECK arch/microblaze/kernel/sys_microblaze.c
arch/microblaze/kernel/sys_microblaze.c:37:17: warning: symbol 'microblaze_vfork' was not declared. Should it be static?
arch/microblaze/kernel/sys_microblaze.c:43:17: warning: symbol 'microblaze_clone' was not declared. Should it be static?
arch/microblaze/kernel/sys_microblaze.c:50:17: warning: symbol 'microblaze_execve' was not declared. Should it be static?
Signed-off-by: Michal Simek <monstr@monstr.eu>
Warning log:
CHECK arch/microblaze/kernel/cpu/cache.c
arch/microblaze/kernel/cpu/cache.c:522:21: warning: symbol 'wb_msr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:538:21: warning: symbol 'wb_nomsr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:554:21: warning: symbol 'wt_msr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:569:21: warning: symbol 'wt_nomsr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:585:21: warning: symbol 'wt_msr_noirq' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:600:21: warning: symbol 'wt_nomsr_noirq' was not declared. Should it be static?
Signed-off-by: Michal Simek <monstr@monstr.eu>
Warning log:
CHECK arch/microblaze/kernel/unwind.c
arch/microblaze/kernel/unwind.c:186:6: warning: symbol 'microblaze_unwind_inner' was not declared. Should it be static?
Signed-off-by: Michal Simek <monstr@monstr.eu>
Warning log:
CHECK arch/microblaze/kernel/ptrace.c
arch/microblaze/kernel/ptrace.c:126:11: warning: incorrect type in initializer (different address spaces)
arch/microblaze/kernel/ptrace.c:126:11: expected unknown type 2[noderef] *__pu_addr<asn:1>
arch/microblaze/kernel/ptrace.c:126:11: got unsigned long *<noident>
arch/microblaze/kernel/ptrace.c:134:17: warning: symbol 'do_syscall_trace_enter' was not declared. Should it be static?
arch/microblaze/kernel/ptrace.c:157:17: warning: symbol 'do_syscall_trace_leave' was not declared. Should it be static?
Signed-off-by: Michal Simek <monstr@monstr.eu>
Function sw_exception is linked with asm code.
Warning log:
CHECK arch/microblaze/kernel/exceptions.c
arch/microblaze/kernel/exceptions.c:53:6: warning: symbol 'sw_exception' was not declared. Should it be static?
Signed-off-by: Michal Simek <monstr@monstr.eu>
Variables and init_microblaze_timecounter should be static.
Warning log:
CHECK arch/microblaze/kernel/timer.c
arch/microblaze/kernel/timer.c:41:14: warning: symbol 'freq_div_hz' was not declared. Should it be static?
arch/microblaze/kernel/timer.c:42:14: warning: symbol 'timer_clock_freq' was not declared. Should it be static?
arch/microblaze/kernel/timer.c:205:12: warning: symbol 'init_microblaze_timecounter' was not declared. Should it be static?
Signed-off-by: Michal Simek <monstr@monstr.eu>
Warning log:
CHECK arch/microblaze/kernel/dma.c
arch/microblaze/kernel/dma.c:53:26: warning: incorrect type in argument 1 (different base types)
arch/microblaze/kernel/dma.c:53:26: expected int [signed] gfp
arch/microblaze/kernel/dma.c:53:26: got restricted unsigned int [usertype] flag
Signed-off-by: Michal Simek <monstr@monstr.eu>
"la" pseudo instruction is only translation to "addik".
Use directly "addik" which is described in the MB reference guide.
Signed-off-by: Michal Simek <monstr@monstr.eu>
r0_ram pool was used for saving/restoring register
content if hw exception happen. This poll was replaced by
pt_pool_space with PT_SIZE size.
Based on this change SAVE_STATE_ARG_SPACE was removed which
caused that PTO offset is zero that's why is also removed.
r0_ram space was used as scratchpad by v850. In early
Microblaze Linux developing phase was this part of code
blindly copied.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Save 0x1 word to rodata section and remove online value
loading if DTB is passed from bootloader. It saves two
asm instructions in bootup.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Remove hw exception counting space from r0_ram. Use special
exception_debug_table poll for exception statistic.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Reason: Import mainline device tree changes on which further patches
depend on or conflict.
Trivial conflict in: drivers/spi/pxa2xx_spi_pci.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Fix msr instructions detection. The current code
just use msrclr for loading msr content and compare
it with proper MSR content. If msrclr is not implemented
r8 contains pc address.
Previous code wanted to use MSR carry bit but if msrclr
wasn't implemented carry wasn't cleared.
Signed-off-by: Michal Simek <monstr@monstr.eu>
There is a tiny difference between PPC32 and PPC64. Microblaze uses the
PPC32 variant.
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
[grant.likely@secretlab.ca: Added comment to #endif, moved documentation
block to function implementation, fixed for non ppc and microblaze
compiles]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Unaligned code use shift for finding register operand.
There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1
by
ori rD, r0, (1 << imm); \
idivu rD, rD, rA
but if rD is equal rA then ori instruction rewrite value which
should be devide.
The patch remove this macro which use idivu instruction because
idivu takes 32/34 cycles. The highest shifting is 20 which takes
20 cycles.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Little endian system needs to check OF_DT_HEADER
but it is swapped because it is in big-endian.
Microblaze LE provides lwr instruction which loads
magic number in BIG endian format which can be compared.
There is used the fact that if you write 0x1 as word
and load it as byte then you get for big-endian zero
and 1 for little-endian.
Signed-off-by: Michal Simek <monstr@monstr.eu>
The physical address is never used by the device tree code when
allocating memory for unflattening. Change the architecture's alloc
hook to return the virutal address instead.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
There is necessary to flush dcache and invalidate
icache for address where breakpoint (brki r16, 0x18)
was. The reason is that for some cases icache line
still keeps brki instruction and it is not updated
by origin instruction maintains by gdbserver.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Remove copy&paste error. Microblaze doesn't support initrd.
Signed-off-by: Walter Goossens <waltergoossens@home.nl>
Signed-off-by: Michal Simek <monstr@monstr.eu>
This reverts commit 0e41c90908.
Break jffs2 rootfs because the patch removes syscall calling
from kernel space.
Signed-off-by: Michal Simek <monstr@monstr.eu>
There are two identical implementations of of_get_mac_address(), one
each in arch/powerpc/kernel/prom_parse.c and
arch/microblaze/kernel/prom_parse.c. Move this function to a new
common file of_net.{c,h} and adjust all the callers to include the new
header.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
[grant.likely@secretlab.ca: protect header with #ifdef]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Remove checking @addr greater than 0 because @addr is now unsigned.
Signed-off-by: Namhyung Kim <namhyung@gmail.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Fix up the arguments to arch_ptrace() to take account of the fact that
@addr and @data are now unsigned long rather than long as of a preceding
patch in this series.
Signed-off-by: Namhyung Kim <namhyung@gmail.com>
Cc: <linux-arch@vger.kernel.org>
Acked-by: Roland McGrath <roland@redhat.com>
Acked-by: David Howells <dhowells@redhat.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 'next' of git://git.monstr.eu/linux-2.6-microblaze: (42 commits)
microblaze: Fix build with make 3.82
fbdev/xilinxfb: Microblaze driver support
microblaze: Support C optimized lib functions for little-endian
microblaze: Separate library optimized functions
microblaze: Support timer on AXI lite
microblaze: Add support for little-endian Microblaze
microblaze: KGDB little endian support
microblaze: Add PVR for endians plus detection
net: emaclite: Add support for little-endian platforms
microblaze: trivial: Add comment for AXI pvr
microblaze: pci-common cleanup
microblaze: Support early console on uart16550
microblaze: Do not compile early console support for uartlite if is disabled
microblaze: Setup early console dynamically
microblaze: Rename all uartlite early printk functions
microblaze: remove early printk uarlite console dependency from header
microblaze: Remove additional compatible properties
microblaze: Remove hardcoded asm instraction for PVR loading
microblaze: Use static const char * const where possible
microblaze: Define VMALLOC_START/END
...
This patch refactors the early init parsing of the chosen node so that
architectures aren't forced to provide an empty implementation of
early_init_dt_scan_chosen_arch. Instead, if an architecture wants to
do something different, it can either use a wrapper function around
early_init_dt_scan_chosen(), or it can replace it altogether.
This patch was written in preparation to adding device tree support to
both x86 ad MIPS.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tested-by: David Daney <ddaney@caviumnetworks.com>
New microblaze systems uses two buses. One for memories
and flashes and the second for low-speed peripherals
which can run on different CLK. This is the reason
why the kernel is trying to read clock-frequency
directly from node. If there is then the kernel will
work with it. If not then cpu CLK is used.
Signed-off-by: Michal Simek <monstr@monstr.eu>
