2 commits

Author	SHA1	Message	Date
Frank Li	e4a7e67a08	irqchip/imx-mu-msi: Fix wrong register offset for 8ulp ... Offset 0x124 should be for IMX_MU_TSR, not IMX_MU_GSR. Fixes: 70afdab904 ("irqchip: Add IMX MU MSI controller driver") Reported-by: Colin King <colin.i.king@gmail.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> [maz: updated commit message, tags] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20221004202414.216577-1-Frank.Li@nxp.com	2022-10-04 23:35:36 +01:00
Frank Li	70afdab904	irqchip: Add IMX MU MSI controller driver ... The MU block found in a number of Freescale/NXP SoCs supports generating IRQs by writing data to a register. This enables the MU block to be used as a MSI controller, by leveraging the platform-MSI API. Signed-off-by: Frank Li <Frank.Li@nxp.com> [maz: dropped pointless dma-iommu.h and of_pci.h includes] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220922161246.20586-4-Frank.Li@nxp.com	2022-09-29 17:11:37 +01:00