Commit graph

10 commits

Author SHA1 Message Date
Atsushi Nemoto
d2af363cfb [MIPS] Kill redundant EXTRA_AFLAGS
Many Makefiles in arch/mips have EXTRA_AFLAGS := $(CFLAGS) line.  This
is redundant while AFLAGS contains $(cflags-y) and any options only
listed in CFLAGS (not in cflags-y) should be unnecessary for asm
sources.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-26 23:06:05 +00:00
Atsushi Nemoto
c44e8d5e47 [MIPS] prom_free_prom_memory cleanup
Current prom_free_prom_memory() implementations are almost same as
free_init_pages(), or no-op.  Make free_init_pages() extern (again)
and make prom_free_prom_memory() use it.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:09 +00:00
Atsushi Nemoto
97dcb82de6 [MIPS] Define MIPS_CPU_IRQ_BASE in generic header
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
them customizable.  This will save a few cycle on each CPU interrupt.

A good side effect is removing some dependencies to MALTA in generic
SMTC code.

Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it.  So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.

Testing this patch on those platforms is greatly appreciated.  Thank
you.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06 16:53:08 +00:00
Ralf Baechle
937a801576 [MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-08 02:38:28 +01:00
Ralf Baechle
54d0a216f4 [MIPS] Replace board_timer_setup function pointer by plat_timer_setup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

---
2006-07-13 21:26:17 +01:00
Ralf Baechle
e1e80b4d24 [MIPS] Don't include obsolete <linux/config.h>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13 21:25:58 +01:00
Yoichi Yuasa
6feb6efaec [MIPS] Remove first timer interrupt setup in wrppmc_timer_setup()
The first timer interrupt setup already happens in time_init().

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:52 +01:00
Yoichi Yuasa
08aecfb9ea [MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.
mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so
set_c0_status(ST0_IM) isn't necessary.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:51 +01:00
Mark.Zhan
9247857f5a [MIPS] Fix the build error of Wind River PPMC board, rewrite irq code to C
o Fix the build error Wind River PPMC board caused by the change of
   plat_setup hook interface.
 o Rewrite first level interrupt dispatch code to C.

Signed-off-by: Rongkai.Zhan <rongkai.zhan@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29 21:10:34 +01:00
Mark.Zhan
a240a46964 [MIPS] Wind River 4KC PPMC Eval Board Support
Support for the GT-64120-based Wind River 4KC PPMC Evaluation board.

Signed-off-by: Rongkai.Zhan <Rongkai.zhan@windriver.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:18 +01:00