Commit graph

29 commits

Author SHA1 Message Date
Seungwhan Youn
313068fd3c ARM: S5PV210: Add DMA operation clock
This patch adds DMA operation clock which is disabled as default.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:10:37 +09:00
Seungwhan Youn
9616674a35 ARM: S5P: Add EPLL rate change warning
This patch adds warning about changing EPLL rate to notice that other
driver that controls H/W, which is using EPLL, will has unknown effects
by this EPLL rate change.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:06:13 +09:00
Seungwhan Youn
c9fa7a08cc ARM: S5PV210: Add EPLL clock operations
This patch adds EPLL specific clock get_rate/set_rate operations
on S5PV210.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:06:09 +09:00
Seungwhan Youn
42a6e20e4f ARM: S5PV210: Fix wrong EPLL rate getting on setup clocks
This patch fix wrong EPLL getting on setup clocks on S5PV210.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:06:00 +09:00
Seungwhan Youn
900fa0196c ARM: S5PV210: Add audio clocks as sysclk
This patch adds audio clocks(SCLK_AUDIO{0,1,2} and SCLK_AUDIO) to be
initial as a sysclk on boot-time.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:05:49 +09:00
Seungwhan Youn
aa21ae3d87 ARM: S5PV210: Add SCLK_SPDIF clock
This patch add SCLK_SPDIF clock to support source clock of S/PDIF
on S5PV210.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:05:40 +09:00
Jaecheol Lee
08f49d118e ARM: S5PV210: Add MOUT_DMC0 and SCLK_DMC0 clocks
This patch adds MOUT_DMC0 and SCLK_DMC0 for checking the dmc0 clock
in CPUFREQ driver.

Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:03:59 +09:00
Jaecheol Lee
8869584397 ARM: S5PV210: Add struct clk_ops for clk_fout_apll
Current fout_apll has fixed rate value. So CPUFREQ driver gets
incorrect value when finding current CPU frequency. Because some
operation level need to change APLL.
Added get_rate function for fout_apll can give correct frequency
value when calling get_rate function.

Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-25 16:03:48 +09:00
Kukjin Kim
1a95036465 ARM: SAMSUNG: Fix build warnings because of unused codes
This patch removes following unused codes for removing build warnings.

arch/arm/plat-samsung/adc.c:438: warning: unused variable 'flags'
arch/arm/mach-s5pv210/clock.c:176: warning: 's5pv210_clk_ip4_ctrl' defined but not used

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-10-08 13:50:17 +09:00
Marek Szyprowski
da01c2f733 ARM: S5PV210: Add FIMC clocks
These clocks enables FIMC driver to operate on machines, which
bootloader power gated FIMC devices to save power on boot.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fix]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-09-14 17:59:16 +09:00
MyungJoo Ham
f1c894de47 ARM: S5PV210: Update I2C-1 Clock Register Property.
CLK_GATE_IP3[8] is RESERVED. The port "I2C_HDMI_DDC" of CLK_GATE_IP3[10] is
used as another I2C port. Therefore, defined the unused I2C-1 as another I2C
there was left undefined but used.

Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-09-14 17:58:21 +09:00
MyungJoo Ham
154d62e4cd ARM: S5PV210: Correct clock register properties
1. Corrected shift values of I2S and UART clocks (CLK_GATE_IP3), which were
defined incorrectly.

2. Corrected shift values of sclk_audio, uclk1, sclk_fimd, sclk_mmc,
sclk_spi, sclk_pwm, which had duplicated .enable/.ctrlbit with their
twins defined in struct clk init_clocks_disable[] and struct clk
init_clocks[]. We've changed their .enable/.ctrlbit to use CLK_SRC_MASK
register to avoid the duplicated clock problem described below.

NOTE: Duplicated Clock Problem
Please note that each clock definition should access different control
register; otherwise, the system may suffer lockups. For example, if we
have two clock definitions "a" and "b" which access the same register
(and the shift value). Then, when we do:

	module A
	clk = clk_get("a");
	clk->clk_enable(clk);

	module B (context switch)
	clk = clk_get("b");
	clk->clk_enable(clk);
	do something with clk.
	clk->clk_disable(clk);

	module A (context switch)
	do something with clk
	* At this point, the system may hang.

Therefore, there should be no clock definitions with the same contol
register/shift. If we need to create "aliases", then, creating child
clocks sharing the clock should be fine.

3. Corrected other sclk_* shift values and access registers.

Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title and message fix]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2010-07-05 16:01:04 +09:00
Thomas Abraham
f64cacc319 ARM: S5PV210: Add sclk clocks of type 'struct clksrc_clk' clock
Add sclk clocks of type 'struct clksrc_clk' clock. The 'group2' of
clock clock sources is also added. This patch also changes the the
'id' member value of the uclk1 clock for instance instance 0 since
there are 4 instances of the uclk1 clock.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:39 +09:00
Thomas Abraham
4583487c43 ARM: S5PV210: Add sclk_audio and sclk_spdif clocks.
Add the sclk_audio(0/1/2) clocks and sclk_spdif clock of type
'struct clksrc_clk' clock. Also, add clk_pcmcdclk(0/1/2) clocks
of type 'struct clk' clock.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:38 +09:00
Thomas Abraham
9e20614bb9 ARM: S5PV210: Add sclk_dac, sclk_mixer and sclk_hdmi clocks
Add sclk_dac, sclk_mixer and sclk_hdmi clocks. These clocks
are of type 'struct clksrc_clk' and so have a corresponding
clock list. These clocks are also added to the list of
clocks to be registered at boot time.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:38 +09:00
Thomas Abraham
2cf4c2e630 ARM: S5PV210: Add new system clocks
This patch adds the following system clocks.

1. clk_sclk_hdmiphy
2. clk_sclk_usbphy0
3. clk_sclk_usbphy1
4. sclk_dmc (dram memory controller clock)
5. sclk_onenand

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:38 +09:00
Thomas Abraham
f445dbd5af ARM: S5PV210: Add support for VPLL
This patch adds the following.

1. Adds 'clk_sclk_hdmi27m' clock to represent the HDMI 27MHz clock.
2. Adds 'clk_vpllsrc; clock of type clksrc_clk to represent the
   input clock for VPLL.
3. Adds 'clk_sclk_vpll' clock of type clksrc_clk to represent the
   output of the MUX_VPLL mux.
4. Add clk_sclk_hdmi27m, clk_vpllsrc and clk_sclk_vpll to the list
   of clocks to be registered.
5. Adds boot time print of 'clk_sclk_vpll' clock rate.
6. Adds 'clk_fout_vpll' clock to plat-s5p such that it is reusable
   on other s5p platforms.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:37 +09:00
Thomas Abraham
f44cf78b6b ARM: S5PV210: Remove usage of clk_p66 and add clk_pclk_psys clock
The clk_p83 clock, which is the PCLK clock for PSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a clock divider). So this
patch replaces the 'struct clk' type clock to 'struct clksrc_clk'
type clock for the PCLK PSYS clock.

This patch modifies the following.

1. Removes definitions and usage of 'clk_p66' clock.
2. Adds 'clk_pclk_psys' clock which is of type 'struct clksrc_clk'.
3. Replaces all usage of clk_p66 with clk_pclk_psys clock.
4. Adds clk_pclk_psys into list of clocks to be registered.
5. Removes the sys_clks array since it is no longer required.
   Also the registration of clocks in sys_clks is also removed.
6. Remove the 'GET_DIV' as it is no longer required.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:37 +09:00
Thomas Abraham
58772cd344 ARM: S5PV210: Remove usage of clk_p83 and add clk_pclk_dsys clock\
The clk_p83 clock, which is the PCLK clock for DSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a clock divider). So this
patch replaces the 'struct clk' type clock to 'struct clksrc_clk'
type clock for the PCLK DSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_p83' clock.
2. Adds 'clk_pclk_dsys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_p83 with clk_pclk_dsys clock.
4. Adds clk_pclk_dsys into list of clocks to be registered.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:36 +09:00
Thomas Abraham
664f5b2065 ARM: S5PV210: Fix clk_get_rate issue with the clk_h100 clock
The clk_h100 clock represents the IMEM clock for the MSYS domain.
This clock rate of this clock is always half of the hclk_msys clock.
There is an issue when getting the clock rate of the clk_h100 clock
(clock get_rate hclk_h100 always returns clock rate that is equal to
the hclk_msys clock rate).

This patch modifies the following.

1. Moves the definition of the clk_h100 clock into the 'init_clocks'
   list with the appropriate parent, ctrlbit, enable and ops fields.

2. The name of the clock is changed from 'clk_h100' to 'hclk_imem'
   to represent more clearly that is represents the IMEM clock in
   the MSYS domain.

3. The function to get the clock rate of the hclk_imem clock is added.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:36 +09:00
Thomas Abraham
6ed91a202b ARM: S5PV210: Remove usage of clk_p100 and add clk_pclk_msys clock
The clk_p100 clock, which is the PCLK clock for MSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the PCLK MSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_p100' clock.
2. Adds 'clk_pclk_msys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_p100 with clk_pclk_msys clock.
4. Adds clk_pclk_msys into list of clocks to be registered.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:36 +09:00
Thomas Abraham
acfa245fc7 ARM: S5PV210: Remove usage of clk_h133 and add clk_hclk_psys clock
The clk_h133 clock, which is the HCLK clock for PSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the HCLK PSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_h133' clock.
2. Adds 'clk_hclk_psys' clock which is of type 'struct clksrc_clk'.
3. Replace all usage of clk_h133 with clk_hclk_psys clock.
4. Adds clk_hclk_psys into list of clocks to be registered.
5. Removes the clock rate calculation of hclk133 and replaces
   it with code that derives the HCLK PSYS clock rate from
   the clk_hclk_psys clock.
6. Modify printing of the system clock rates.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:35 +09:00
Thomas Abraham
0fe967a1ca ARM: S5PV210: Remove usage of clk_h166 and add clk_hclk_dsys clock
The clk_h166 clock, which is the HCLK clock for DSYS domain, is of
type 'struct clk' whereas on S5PV210, this clock is suitable to be
of type clksrc_clk clock (since it has a choice of clock source
and a pre-divider). So this patch replaces the 'struct clk' type
clock to 'struct clksrc_clk' type clock for the HCLK DSYS clock.

This patch modifies the following.

1. Remove definitions and usage of 'clk_h166' clock.

2. Adds 'clk_sclk_a2m' clock which is one of possible parent clock
   sources for the DSYS HCLK clock.

3. Adds 'clk_hclk_dsys' clock which is of type 'struct clksrc_clk'.

4. Replace all usage of clk_h166 with clk_hclk_dsys clock.

5. Adds clk_sclk_a2m and clk_hclk_dsys into list of clocks to
   be registered.

6. Removes the clock rate calculation of hclk166 and replaces
   it with code that derives the HCLK DSYS clock rate from
   the clk_hclk_dsys clock.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:35 +09:00
Thomas Abraham
af76a201c6 ARM: S5PV210: Remove usage of clk_h200 clock and add clk_hclk_msys clock
The clk_h200 represents the HCLK for the MSYS domain. This clock
is of type 'struct clk' but on V210, it is more suitable to be of
type 'struct clksrc_clk' (since it is a divided version of the
armclk). The replacement clock is renamed as clk_hclk_msys to
indicate that it represents the HCLK for MSYS domain.

This patch modifies the following.

1. Removes the usage of the clk_h200 clock.
2. Adds the new clock 'clk_hclk_msys'.
3. Adds clk_hclk_msys to the list of sysclks to be registered.
4. Modifies the hclk_msys clock rate calculation procedure to
   be based on the new clk_hclk_msys clock.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:35 +09:00
Thomas Abraham
374e0bf5f9 ARM: S5PV210: Add armclk of clksrc_clk clock type
This patch modifies the following.

1. Adds arm clock 'clk_armclk' of type clksrc_clk clock type.
2. Adds arm clock to the list of system clocks 'sysclks' for
   registering it along with other system clocks.
3. Modifies the armclk clock rate calculation procedure to be
   based on the new clk_armclk clock.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:34 +09:00
Thomas Abraham
c62ec6a9aa ARM: S5PV210: Rearrange assignment of clock for fout apll/mpll/epll clocks
The assignment of clock rates for fout apll/mpll/epll is moved further
up in the s5pv210_setup_clocks function because the subsequent patches
require the clock rate of fout clocks to be setup.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:34 +09:00
Thomas Abraham
eb1ef1ed06 ARM: S5PV210: Register apll/mpll/epll clksrc_clk clocks
This patch modifies the following.

1. Registers the mout_apll clksrc_clk clock.

2. The mout_mpll and mout_epll clocks were registered as 'struct clk'
   types and then their parents were setup using the s3c_set_clksrc
   function. This patch reduces the two steps into one by registering
   the mout_mpll and mout_epll clocks using the s3c_register_clksrc
   function.

3. As per point 2 above, the init_parents array is no longer required.
   So the mout clocks are now put together in a new array named 'sysclks'.
   The sysclks array will list the system level clocks and more
   clocks will be added to it in the subsequent patches.

4. The clks array is left empty because of the movement of mpll and epll
   clocks into the sysclks array. It is not deleted since subsequent
   patches will add clocks into this array.

Signed-off-by: Thomas Abraham <thomas.ab <at> samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim <at> samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:34 +09:00
Thomas Abraham
59cda52088 ARM: S5PV210: Rearrange the system clock definitions
The system clock definitions are currently defined below the
peripheral clock definitions in the V210 clock code. For the V210
clock updates that follow this patch, it is required that the
system clock definitions such as the mout_apll and mout_mpll be
defined prior to the device clock definitions. This patch
re-arranges the system clock defintions for the clock updates that
follow this patch.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-05-17 10:37:33 +09:00
Kukjin Kim
0c1945d336 ARM: S5PV210: Add clock support for S5PV210
This patch adds clock support for S5PV210. This patch adds the clock
register definitions and the various system clocks in S5PV210.
Clocks that are common to other S5P SoC'c are added in the common
S5P clock support.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2010-02-24 22:47:22 +00:00