Commit graph

98013 commits

Author SHA1 Message Date
Greg Kroah-Hartman
c1a567d31b Merge 3.16-rc4 into staging-next
We want the staging tree fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-07-07 17:59:07 -07:00
Linus Torvalds
75bf757edc ARM: SoC fixes for 3.16-rc
This week's arm-soc fixes:
 
 - A set of of OMAP patches that we had missed Tony's pull request of:
   - Reset fix for am43xx
   - Proper OPP table for omap5
   - Fix for SoC detection of one of the DRA7 SoCs
   - hwmod updates to get SATA and OCP to work on omap5 (drivers merged in 3.16)
   - ... plus a handful of smaller fixes
 - sunxi needed to re-add machine specific restart code that was removed in
   anticipation of a watchdog driver being merged for 3.16, and it didn't make
   it in.
 - Marvell fixes for PCIe on SMP and a big-endian fix.
 - A trivial defconfig update to make my capri test board boot with
   bcm_defconfig again.
 
 ... and a couple of MAINTAINERS updates, one to claim new Keystone
 drivers that have been merged, and one to merge MXS and i.MX (both
 Freescale platforms).
 
 The largest diffs come from the hwmod code for omap5 and the re-add of
 the restart code on sunxi. The hwmod stuff is quite late at this point
 but it slipped through cracks repeatedly while coming up the maintainer
 chain and only affects the one SoC so risk is low.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "This week's arm-soc fixes:

   - A set of of OMAP patches that we had missed Tony's pull request of:
     * Reset fix for am43xx
     * Proper OPP table for omap5
     * Fix for SoC detection of one of the DRA7 SoCs
     * hwmod updates to get SATA and OCP to work on omap5 (drivers
       merged in 3.16)
     * ... plus a handful of smaller fixes
   - sunxi needed to re-add machine specific restart code that was
     removed in anticipation of a watchdog driver being merged for 3.16,
     and it didn't make it in.
   - Marvell fixes for PCIe on SMP and a big-endian fix.
   - A trivial defconfig update to make my capri test board boot with
     bcm_defconfig again.

  ... and a couple of MAINTAINERS updates, one to claim new Keystone
  drivers that have been merged, and one to merge MXS and i.MX (both
  Freescale platforms).

  The largest diffs come from the hwmod code for omap5 and the re-add of
  the restart code on sunxi.  The hwmod stuff is quite late at this
  point but it slipped through cracks repeatedly while coming up the
  maintainer chain and only affects the one SoC so risk is low"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  MAINTAINERS: Add few more Keystone drivers
  MAINTAINERS: merge MXS entry into IMX one
  ARM: sunxi: Reintroduce the restart code for A10/A20 SoCs
  ARM: mvebu: fix cpuidle implementation to work on big-endian systems
  ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup
  ARM: mvebu: move Armada 375 external abort logic as a quirk
  ARM: bcm: Fix bcm and multi_v7 defconfigs
  ARM: dts: dra7-evm: remove interrupt binding
  ARM: OMAP2+: Fix parser-bug in platform muxing code
  ARM: DTS: dra7/dra7xx-clocks: ATL related changes
  ARM: OMAP2+: drop unused function
  ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm
  ARM: dts: omap5: Update CPU OPP table as per final production Manual
  ARM: DRA722: add detection of SoC information
  ARM: dts: Enable twl4030 off-idle configuration for selected omaps
  ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
  ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
2014-07-05 16:57:12 -07:00
Linus Torvalds
e1a08b855f ARM64 fixes:
- Exception level check at boot time (for completeness, not triggering
   any bug before)
 - I/D-cache synchronisation logic for huge pages
 - Config symbol typo
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull ARM64 fixes from Catalin Marinas:
 - Exception level check at boot time (for completeness, not triggering
   any bug before)
 - I/D-cache synchronisation logic for huge pages
 - Config symbol typo

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: fix el2_setup check of CurrentEL
  arm64: mm: Make icache synchronisation logic huge page aware
  arm64: mm: Fix horrendous config typo
2014-07-05 10:12:52 -07:00
Olof Johansson
25d11631f9 mvebu fixes for v3.16 (round #2)
- mvebu
     - Fix PCIe deadlock now that SMP is enabled
     - Fix cpuidle for big-endian systems
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Merge tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu into fixes

mvebu fixes for v3.16 (round #2)

 - mvebu
    - Fix PCIe deadlock now that SMP is enabled
    - Fix cpuidle for big-endian systems

* tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: fix cpuidle implementation to work on big-endian systems
  ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup
  ARM: mvebu: move Armada 375 external abort logic as a quirk

Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-04 21:51:19 -07:00
Maxime Ripard
d767af5e66 ARM: sunxi: Reintroduce the restart code for A10/A20 SoCs
This partly reverts commits 553600502b (ARM: sunxi: Remove reset code from
the platform) and 5e669ec583 (ARM: sunxi: Remove init_machine callback) for
the sun4i, sun5i and sun7i families.

This is needed because the watchdog counterpart of these commits was dropped,
and didn't make it into 3.16. In order to still be able to reboot the board, we
need to reintroduce that code. Of course, the long term view is still to get
rid of that code in mach-sunxi.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-07-04 21:50:10 -07:00
Olof Johansson
5acd78c59a Fixes for omaps for issues discovered during the merge window and
enabling of a few features that had to wait for the driver
 dependencies to clear.
 
 The fixes included are:
 
 - Fix am43xx hard reset flags
 
 - Fix SoC detection for DRA722
 
 - Fix CPU OPP table for omap5
 
 - Fix legacy mux parser bug if requested muxname is a prefix of
   multiple mux entries
 
 - Fix qspi interrupt binding that relies on the irq crossbar
   that has not yet been enabled
 
 - Add missing phy_sel for am43x-epos-evm
 
 - Drop unused gic_init_irq() that is no longer needed
 
 And the enabling of features that had driver dependencies are:
 
 - Change dra7 to use Audio Tracking Logic clock instead of a fixed
   clock now that the clock driver for it has been merged
 
 - Enable off idle configuration for selected omaps as all the kernel
   dependencies for device tree based booting are finally merged as
   this is needed to get the automated PM tests working finally with
   device tree based booting
 
 - Add hwmod entry for ocp2scp3 for omap5 to get sata working as
   all the driver dependencies are now in the kernel and this patch
   fell through the cracks during the merge window
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Merge tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Merge OMAP fixes from Tony Lindgren:

Fixes for omaps for issues discovered during the merge window and
enabling of a few features that had to wait for the driver
dependencies to clear.

The fixes included are:

- Fix am43xx hard reset flags
- Fix SoC detection for DRA722
- Fix CPU OPP table for omap5
- Fix legacy mux parser bug if requested muxname is a prefix of
  multiple mux entries
- Fix qspi interrupt binding that relies on the irq crossbar
  that has not yet been enabled
- Add missing phy_sel for am43x-epos-evm
- Drop unused gic_init_irq() that is no longer needed

And the enabling of features that had driver dependencies are:

- Change dra7 to use Audio Tracking Logic clock instead of a fixed
  clock now that the clock driver for it has been merged

- Enable off idle configuration for selected omaps as all the kernel
  dependencies for device tree based booting are finally merged as
  this is needed to get the automated PM tests working finally with
  device tree based booting

- Add hwmod entry for ocp2scp3 for omap5 to get sata working as
  all the driver dependencies are now in the kernel and this patch
  fell through the cracks during the merge window

* tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: dra7-evm: remove interrupt binding
  ARM: OMAP2+: Fix parser-bug in platform muxing code
  ARM: DTS: dra7/dra7xx-clocks: ATL related changes
  ARM: OMAP2+: drop unused function
  ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm
  ARM: dts: omap5: Update CPU OPP table as per final production Manual
  ARM: DRA722: add detection of SoC information
  ARM: dts: Enable twl4030 off-idle configuration for selected omaps
  ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
  ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
2014-07-04 21:45:38 -07:00
Marc Zyngier
974c8e450b arm64: fix el2_setup check of CurrentEL
The CurrentEL system register reports the Current Exception Level
of the CPU. It doesn't say anything about the stack handling, and
yet we compare it to PSR_MODE_EL2t and PSR_MODE_EL2h.

It works by chance because PSR_MODE_EL2t happens to match the right
bits, but that's otherwise a very bad idea. Just check for the EL
value instead.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
[catalin.marinas@arm.com: fixed arch/arm64/kernel/efi-entry.S]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-07-04 16:16:52 +01:00
Steve Capper
923b8f5044 arm64: mm: Make icache synchronisation logic huge page aware
The __sync_icache_dcache routine will only flush the dcache for the
first page of a compound page, potentially leading to stale icache
data residing further on in a hugetlb page.

This patch addresses this issue by taking into consideration the
order of the page when flushing the dcache.

Reported-by: Mark Brown <broonie@linaro.org>
Tested-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: <stable@vger.kernel.org> # v3.11+
2014-07-04 14:26:01 +01:00
Steve Capper
f3b766a26d arm64: mm: Fix horrendous config typo
The define ARM64_64K_PAGES is tested for rather than
CONFIG_ARM64_64K_PAGES. Correct that typo here.

Signed-off-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-07-04 14:22:30 +01:00
Tejun Heo
b9cd18de4d ptrace,x86: force IRET path after a ptrace_stop()
The 'sysret' fastpath does not correctly restore even all regular
registers, much less any segment registers or reflags values.  That is
very much part of why it's faster than 'iret'.

Normally that isn't a problem, because the normal ptrace() interface
catches the process using the signal handler infrastructure, which
always returns with an iret.

However, some paths can get caught using ptrace_event() instead of the
signal path, and for those we need to make sure that we aren't going to
return to user space using 'sysret'.  Otherwise the modifications that
may have been done to the register set by the tracer wouldn't
necessarily take effect.

Fix it by forcing IRET path by setting TIF_NOTIFY_RESUME from
arch_ptrace_stop_needed() which is invoked from ptrace_stop().

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Andy Lutomirski <luto@amacapital.net>
Acked-by: Oleg Nesterov <oleg@redhat.com>
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2014-07-03 17:27:23 -07:00
Linus Torvalds
4f23174981 A bunch of one-liners (except the s390 one).
The two more serious bugs ("KVM: SVM: Fix CPL export via SS.DPL" and
 "KVM: s390: add sie.h uapi header file to Kbuild and remove header
 dependency") were introduced in the 3.16 merge window.
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "A bunch of one-liners (except the s390 one).

  The two more serious bugs ("KVM: SVM: Fix CPL export via SS.DPL" and
  "KVM: s390: add sie.h uapi header file to Kbuild and remove header
  dependency") were introduced in the 3.16 merge window"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: SVM: Fix CPL export via SS.DPL
  KVM: s390: add sie.h uapi header file to Kbuild and remove header dependency
  MIPS: KVM: Fix memory leak on VCPU
  KVM: x86: preserve the high 32-bits of the PAT register
  kvm: fix wrong address when writing Hyper-V tsc page
  KVM: x86: Increase the number of fixed MTRR regs to 10
2014-07-01 09:27:34 -07:00
Thomas Petazzoni
6509dc74c9 ARM: mvebu: fix cpuidle implementation to work on big-endian systems
On Marvell Armada XP, when a CPU comes back from deep idle state of
cpuidle, it restarts its execution at armada_370_xp_cpu_resume(),
which puts back the CPU into the coherency, and then calls the generic
cpu_resume() function.

While this works on little-endian configurations, it doesn't work on
big-endian configurations because the CPU restarts in little-endian,
and therefore must be switched back to big-endian to operate
properly. To achieve this, a 'setend be' instruction must be executed
in big-endian configurations. However, the ARM_BE8() macro that is
used to implement nice compile-time conditional for ARM LE vs. ARM BE8
is not easily usable in inline assembly.

Therefore, this patch moves the armada_370_xp_cpu_resume() C function,
which was anyway just a block of inline assembly, into a proper
pmsu_ll.S file, and adds the appropriate ARM_BE8(setend be)
instruction.

Without this patch, an Armada XP big endian configuration with cpuidle
enabled fails to boot, as it hangs as soon as one of the CPU hits the
deep idle state.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1404130165-3593-1-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30 18:15:11 +00:00
Thomas Petazzoni
011788907b ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup
Commit 497a92308a ("ARM: mvebu:
implement L2/PCIe deadlock workaround") introduced some logic in
coherency.c to adjust the PL310 cache controller Device Tree node of
Armada 375 and Armada 38x platform to include the 'arm,io-coherent'
property if the system is running with hardware I/O coherency enabled.

However, with the L2CC driver cleanup done by Russell King, the
initialization of the L2CC driver has been moved earlier, and is now
part of the init_IRQ() ARM function in
arch/arm/kernel/irq.c. Therefore, calling coherency_init() in
->init_time() is now too late, as the Device Tree property gets added
too late (after the L2CC driver has been initialized).

In order to fix this, this commit removes the ->init_time() callback
use in board-v7.c and replaces it with an ->init_irq() callback. We
therefore no longer use the default ->init_irq() callback, but we now
use the default ->init_time() callback.

In this newly introduced ->init_irq() callback, we call irqchip_init()
which is the default behavior when ->init_irq() isn't defined, and
then do the initialization related to the coherency: SCU, coherency
fabric, and mvebu-mbus (which is needed to start secondary CPUs).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1402585772-10405-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30 17:38:43 +00:00
Thomas Petazzoni
752ef800a6 ARM: mvebu: move Armada 375 external abort logic as a quirk
In preparation to a small re-organization of the initialization
sequence in board-v7.c, this commit moves the registration of the
custom external abort handler on Armada 375 later in the boot
sequence, and makes it more similar to the other quirks that we
already have. There is indeed no need to register this abort handler
particularly early, it simply needs to be registered before switching
to userspace.

In addition to this, this commit makes the registration of the custom
abort handler conditional on Armada 375 Z1, because Armada 375 A0 and
later iterations are not affected by the issue.

This commit was tested on both Armada 375 Z1 and Armada 375 A0
platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1402585772-10405-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-30 17:38:21 +00:00
Paolo Bonzini
9a630d15f1 Merge commit '33b458d276bb' into kvm-master 2014-06-30 16:45:40 +02:00
Jan Kiszka
33b458d276 KVM: SVM: Fix CPL export via SS.DPL
We import the CPL via SS.DPL since ae9fedc793. However, we fail to
export it this way so far. This caused spurious guest crashes, e.g. of
Linux when accessing the vmport from guest user space which triggered
register saving/restoring to/from host user space.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-30 16:45:28 +02:00
Linus Torvalds
ef2e0391e5 Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
 "Another round of ARM fixes.  The largest change here is the L2 changes
  to work around problems for the Armada 37x/380 devices, where most of
  the size comes down to comments rather than code.

  The other significant fix here is for the ptrace code, to ensure that
  rewritten syscalls work as intended.  This was pointed out by Kees
  Cook, but Will Deacon reworked the patch to be more elegant.

  The remainder are fairly trivial changes"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8087/1: ptrace: reload syscall number after secure_computing() check
  ARM: 8086/1: Set memblock limit for nommu
  ARM: 8085/1: sa1100: collie: add top boot mtd partition
  ARM: 8084/1: sa1100: collie: revert back to cfi_probe
  ARM: 8080/1: mcpm.h: remove unused variable declaration
  ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
2014-06-29 13:40:08 -07:00
Will Deacon
42309ab450 ARM: 8087/1: ptrace: reload syscall number after secure_computing() check
On the syscall tracing path, we call out to secure_computing() to allow
seccomp to check the syscall number being attempted. As part of this, a
SIGTRAP may be sent to the tracer and the syscall could be re-written by
a subsequent SET_SYSCALL ptrace request. Unfortunately, this new syscall
is ignored by the current code unless TIF_SYSCALL_TRACE is also set on
the current thread.

This patch slightly reworks the enter path of the syscall tracing code
so that we always reload the syscall number from
current_thread_info()->syscall after the potential ptrace traps.

Acked-by: Kees Cook <keescook@chromium.org>
Tested-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:35 +01:00
Laura Abbott
6980c3e251 ARM: 8086/1: Set memblock limit for nommu
Commit 1c2f87c (ARM: 8025/1: Get rid of meminfo) changed find_limits
to use memblock_get_current_limit for calculating the max_low pfn.
nommu targets never actually set a limit on memblock though which
means memblock_get_current_limit will just return the default
value. Set the memblock_limit to be the end of DDR to make sure
bounds are calculated correctly.

Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:34 +01:00
Andrea Adami
3abe742339 ARM: 8085/1: sa1100: collie: add top boot mtd partition
The CFI mapping is now perfect so we can expose the top block, read only.
There isn't much to read, though, just the sharpsl_params values.

Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:34 +01:00
Andrea Adami
92183103d8 ARM: 8084/1: sa1100: collie: revert back to cfi_probe
Reverts commit d26b17edaf
ARM: sa1100: collie.c: fall back to jedec_probe flash detection

Unfortunately the detection was challenged on the defective unit used for tests:
one of the NOR chips did not respond to the CFI query.
Moreover that bad device needed extra delays on erase-suspend/resume cycles.

Tested personally on 3 different units and with feedback of two other users.

Signed-off-by: Andrea Adami <andrea.adami@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:33 +01:00
Nicolas Pitre
d0ba7cc02c ARM: 8080/1: mcpm.h: remove unused variable declaration
The sync_phys variable has been replaced by link time computation in
mcpm_head.S before the code was submitted upstream.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:29:32 +01:00
Thomas Petazzoni
98ea2dba65 ARM: 8076/1: mm: add support for HW coherent systems in PL310 cache
When a PL310 cache is used on a system that provides hardware
coherency, the outer cache sync operation is useless, and can be
skipped. Moreover, on some systems, it is harmful as it causes
deadlocks between the Marvell coherency mechanism, the Marvell PCIe
controller and the Cortex-A9.

To avoid this, this commit introduces a new Device Tree property
'arm,io-coherent' for the L2 cache controller node, valid only for the
PL310 cache. It identifies the usage of the PL310 cache in an I/O
coherent configuration. Internally, it makes the driver disable the
outer cache sync operation.

Note that technically speaking, a fully coherent system wouldn't
require any of the other .outer_cache operations. However, in
practice, when booting secondary CPUs, these are not yet coherent, and
therefore a set of cache maintenance operations are necessary at this
point. This explains why we keep the other .outer_cache operations and
only ->sync is disabled.

While in theory any write to a PL310 register could cause the
deadlock, in practice, disabling ->sync is sufficient to workaround
the deadlock, since the other cache maintenance operations are only
used in very specific situations.

Contrary to previous versions of this patch, this new version does not
simply NULL-ify the ->sync member, because the l2c_init_data
structures are now 'const' and therefore cannot be modified, which is
a good thing. Therefore, this patch introduces a separate
l2c_init_data instance, called of_l2c310_coherent_data.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-29 10:26:37 +01:00
Linus Torvalds
d1fc98ba96 Merge branch 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Peter Anvin:
 "A pile of fixes related to the VDSO, EFI and 32-bit badsys handling.

  It turns out that removing the section headers from the VDSO breaks
  gdb, so this puts back most of them.  A very simple typo broke
  rt_sigreturn on some versions of glibc, with obviously disastrous
  results.  The rest is pretty much fixes for the corresponding fallout.

  The EFI fixes fixes an arithmetic overflow on 32-bit systems and
  quiets some build warnings.

  Finally, when invoking an invalid system call number on x86-32, we
  bypass a bunch of handling, which can make the audit code oops"

* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  efi-pstore: Fix an overflow on 32-bit builds
  x86/vdso: Error out in vdso2c if DT_RELA is present
  x86/vdso: Move DISABLE_BRANCH_PROFILING into the vdso makefile
  x86_32, signal: Fix vdso rt_sigreturn
  x86_32, entry: Do syscall exit work on badsys (CVE-2014-4508)
  x86/vdso: Create .build-id links for unstripped vdso files
  x86/vdso: Remove some redundant in-memory section headers
  x86/vdso: Improve the fake section headers
  x86/vdso2c: Use better macros for ELF bitness
  x86/vdso: Discard the __bug_table section
  efi: Fix compiler warnings (unused, const, type)
2014-06-27 18:43:03 -07:00
Linus Torvalds
c9a606660e Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
 "This is dominated by a large number of changes necessary for the MIPS
  BPF code.  code.  Aside of that there are

   - a fix for the MSC system controller support code.
   - a Turbochannel fix.
   - a recordmcount fix that's MIPS-specific.
   - barrier fixes to smp-cps / pm-cps after unrelated changes elsewhere
     in the kernel.
   - revert support for MSA registers in the signal frames.  The
     reverted patch did modify the signal stack frame which of course is
     inacceptable.
   - fix math-emu build breakage with older compilers.
   - some related cleanup.
   - fix Lasat build error if CONFIG_CRC32 isn't set to y by the user"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (27 commits)
  MIPS: Lasat: Fix build error if CRC32 is not enabled.
  TC: Handle device_register() errors.
  MIPS: MSC: Prevent out-of-bounds writes to MIPS SC ioremap'd region
  MIPS: bpf: Fix stack space allocation for BPF memwords on MIPS64
  MIPS: BPF: Use 32 or 64-bit load instruction to load an address to register
  MIPS: bpf: Fix PKT_TYPE case for big-endian cores
  MIPS: BPF: Prevent kernel fall over for >=32bit shifts
  MIPS: bpf: Drop update_on_xread and always initialize the X register
  MIPS: bpf: Fix is_range() semantics
  MIPS: bpf: Use pr_debug instead of pr_warn for unhandled opcodes
  MIPS: bpf: Fix return values for VLAN_TAG_PRESENT case
  MIPS: bpf: Use correct mask for VLAN_TAG case
  MIPS: bpf: Fix branch conditional for BPF_J{GT/GE} cases
  MIPS: bpf: Add SEEN_SKB to flags when looking for the PKT_TYPE
  MIPS: bpf: Use 'andi' instead of 'and' for the VLAN cases
  MIPS: bpf: Return error code if the offset is a negative number
  MIPS: bpf: Use the LO register to get division's quotient
  MIPS: mm: uasm: Fix lh micro-assembler instruction
  MIPS: uasm: Add SLT uasm instruction
  MIPS: uasm: Add s3s1s2 instruction builder
  ...
2014-06-27 18:37:56 -07:00
Linus Torvalds
1857a5b65c ARC fixes for 3.16
Some SMP changes, a ptrace request for NPTL debugging,
 bunch of build breakages/warnings
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Merge tag 'arc-fixes-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull ARC fixes from Vineet Gupta:
 "Some SMP changes, a ptrace request for NPTL debugging, bunch of build
  breakages/warnings"

* tag 'arc-fixes-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARC: [SMP] Enable icache coherency
  ARC: [SMP] Fix IPI IRQ registration
  ARC: Implement ptrace(PTRACE_GET_THREAD_AREA)
  ARC: optimize kernel bss clearing in early boot code
  ARC: Fix build breakage for !CONFIG_ARC_DW2_UNWIND
  ARC: fix build warning in devtree
  ARC: remove checks for CONFIG_ARC_MMU_V4
2014-06-27 18:36:50 -07:00
Paolo Bonzini
0c2363ffec Fix sie.h header related problems introduced during the 3.16 development
cycle.
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Merge tag 'kvms390-20140626' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kvm-master

Fix sie.h header related problems introduced during the 3.16 development
cycle.
2014-06-27 16:19:39 +02:00
Olof Johansson
bfda90cbb8 ARM: bcm: Fix bcm and multi_v7 defconfigs
BCM (Kona/capri platform) has regressed in two ways on this release. First,
bcm_defconfig no longer selected the appropriate MMC driver options due to
changes in dependencies. Secondly, the new MFD and regulator drivers were not
enabled on multi_v7_defconfig, so that caused the system to fail probing MMC
there.

Fix by enabling the new options as needed.

Cc: Matt Porter <matt.porter@linaro.org>
Cc: Christian Daudt <bcm@fixthebug.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2014-06-26 23:26:41 -07:00
Ralf Baechle
16f0bbbc1f MIPS: Lasat: Fix build error if CRC32 is not enabled.
Kconfig doesn't select CRC32 so it's possible to build a Lasat kernel
without CONFIG_CRC32 resulting in a build error:

  LD      vmlinux
arch/mips/built-in.o: In function `lasat_init_board_info':
(.text+0x22c): undefined reference to `crc32_le'
arch/mips/built-in.o: In function `lasat_write_eeprom_info':
(.text+0x7fc): undefined reference to `crc32_le'
make: *** [vmlinux] Error 1

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 14:43:01 +01:00
Markos Chandras
ab6c15bc66 MIPS: MSC: Prevent out-of-bounds writes to MIPS SC ioremap'd region
Previously, the lower limit for the MIPS SC initialization loop was
set incorrectly allowing one extra loop leading to writes
beyond the MSC ioremap'd space. More precisely, the value of the 'imp'
in the last loop increased beyond the msc_irqmap_t boundaries and
as a result of which, the 'n' variable was loaded with an incorrect
value. This value was used later on to calculate the offset in the
MSC01_IC_SUP which led to random crashes like the following one:

CPU 0 Unable to handle kernel paging request at virtual address e75c0200,
epc == 8058dba4, ra == 8058db90
[...]
Call Trace:
[<8058dba4>] init_msc_irqs+0x104/0x154
[<8058b5bc>] arch_init_irq+0xd8/0x154
[<805897b0>] start_kernel+0x220/0x36c

Kernel panic - not syncing: Attempted to kill the idle task!

This patch fixes the problem

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7118/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:23 +01:00
Markos Chandras
d8214ef14a MIPS: bpf: Fix stack space allocation for BPF memwords on MIPS64
When allocating stack space for BPF memwords we need to use the
appropriate 32 or 64-bit instruction to avoid losing the top 32 bits
of the stack pointer.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7135/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:23 +01:00
Markos Chandras
b6a14a9845 MIPS: BPF: Use 32 or 64-bit load instruction to load an address to register
When loading a pointer to register we need to use the appropriate
32 or 64bit instruction to preserve the pointers' top 32bits.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7180/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:22 +01:00
Markos Chandras
b4fe0ec86d MIPS: bpf: Fix PKT_TYPE case for big-endian cores
The skb->pkt_type field is defined as follows:

u8 pkt_type:3,
   fclone:2,
   ipvs_property:1,
   peeked:1,
   nf_trace:1

resulting to the following layout in big-endian systems

[pkt_type][fclone][ipvs_propery][peeked][nf_trace]
^                                                ^
|                                                |
LSB                                             MSB

As a result, the existing code did not work because it was trying to
match pkt_type == 7 whereas in reality it is 7<<5 on big-endian
systems.

This has been fixed in the interpreter in
0dcceabb0c
"net: filter: fix SKF_AD_PKTTYPE extension on big-endian"

The fix is to look for 7<<5 on big-endian systems for the pkt_type
field, and shift by 5 so the packet type will be at the lower 3 bits
of the A register.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7132/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:22 +01:00
Markos Chandras
95782bf434 MIPS: BPF: Prevent kernel fall over for >=32bit shifts
Remove BUG_ON() if the shift immediate is >=32 to avoid kernel crashes
due to malicious user input. If the shift immediate is >= 32,
we simply load the destination register with 0 since only
32-bit instructions are used by JIT so this will do the
correct thing even on MIPS64.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7179/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:22 +01:00
Markos Chandras
e5bb48b055 MIPS: bpf: Drop update_on_xread and always initialize the X register
Previously, update_on_xread() only set the reset flag if SEEN_X hasn't
been set already. However, SEEN_X is used to indicate that X is used
as destination or source register so there are some cases where X
is only used as source register and we really need to make sure that it
has been initialized in time. As a result of which, drop this function and
always set X to zero if it's used in any of the opcodes.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7133/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:22 +01:00
Markos Chandras
10c4d614d2 MIPS: bpf: Fix is_range() semantics
is_range() was meant to check whether the number is within
the s16 range or not. However the return values and consumers expected
the exact opposite. We fix that by inverting the logic in the function
to return 'true' for < s16 and 'false' for > s16.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Reported-by: Alexei Starovoitov <ast@plumgrid.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7131/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:21 +01:00
Markos Chandras
78b95b662c MIPS: bpf: Use pr_debug instead of pr_warn for unhandled opcodes
We should prevent spamming the logs during normal execution of bpf-jit.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Suggested-by: Alexei Starovoitov <ast@plumgrid.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7129/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:21 +01:00
Markos Chandras
91a41d7f97 MIPS: bpf: Fix return values for VLAN_TAG_PRESENT case
If VLAN_TAG_PRESENT is not zero, then return 1 as expected by
classic BPF. Otherwise return 0.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7128/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:21 +01:00
Markos Chandras
6e86c59d4d MIPS: bpf: Use correct mask for VLAN_TAG case
Using VLAN_VID_MASK is not correct to get the vlan tag. Use
~VLAN_PRESENT_MASK instead and make sure it's u16 so the top 16-bits
will be removed. This will ensure that the emit_andi() code will not
treat this as a big 32-bit unsigned value.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7127/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:21 +01:00
Markos Chandras
1ab24a4e3d MIPS: bpf: Fix branch conditional for BPF_J{GT/GE} cases
The sltiu and sltu instructions will set the scratch register
to 1 if A <= X|K so fix the emitted branch conditional to check
for scratch != zero rather than scratch >= zero which would complicate
the resuling branch logic given that MIPS does not have a BGT or BGET
instructions to compare general purpose registers directly.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7126/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:21 +01:00
Markos Chandras
9eebfe478d MIPS: bpf: Add SEEN_SKB to flags when looking for the PKT_TYPE
The SKF_AD_PKTTYPE uses the skb pointer so make sure it's in the
flags so it will be initialized in time.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7125/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:20 +01:00
Markos Chandras
9ee1606e8a MIPS: bpf: Use 'andi' instead of 'and' for the VLAN cases
The VLAN_VID_MASK and VLAN_TAG_PRESENT are immediates, so using
'and' which expects 3 registers will produce wrong results. Fix
this by using the 'andi' instruction.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7124/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:20 +01:00
Markos Chandras
55393ee535 MIPS: bpf: Return error code if the offset is a negative number
Previously, the negative offset was not checked leading to failures
due to trying to load data beyond the skb struct boundaries. Until we
have proper asm helpers in place, it's best if we return ENOSUPP if K
is negative when trying to JIT the filter or 0 during runtime if we
do an indirect load where the value of X is unknown during build time.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7123/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:20 +01:00
Markos Chandras
35a8e16abe MIPS: bpf: Use the LO register to get division's quotient
Reading from the HI register to get the division result is wrong.
The quotient is placed in the LO register.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Daniel Borkmann <dborkman@redhat.com>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: netdev@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7122/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:20 +01:00
Markos Chandras
84c68cbc66 MIPS: mm: uasm: Fix lh micro-assembler instruction
Commit d6b3314b49 "MIPS: uasm: Add lh uam
instruction" added the 'lh' micro-assembler instruction but it used the
'lw' opcode for it. Fix it by using the correct 'lh' opcode.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7121/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:19 +01:00
Markos Chandras
7682f9e818 MIPS: uasm: Add SLT uasm instruction
It will be used later on by bpf-jit

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/7120/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:19 +01:00
Markos Chandras
9d9873697e MIPS: uasm: Add s3s1s2 instruction builder
It will be used later on by the SLT instruction.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7119/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:19 +01:00
Daniel Borkmann
a83d081ed1 MIPS: BPF JIT: Fix build error.
mips: allmodconfig fails in 3.16-rc1 with lots of undefined symbols.

  arch/mips/net/bpf_jit.c: In function 'is_load_to_a':
  arch/mips/net/bpf_jit.c:559:7: error: 'BPF_S_LD_W_LEN' undeclared (first use in this function)
  arch/mips/net/bpf_jit.c:559:7: note: each undeclared identifier is reported only once for each function it appears in
  arch/mips/net/bpf_jit.c:560:7: error: 'BPF_S_LD_W_ABS' undeclared (first use in this function)
  [...]

The reason behind this is that 3480593131 ("net: filter: get rid of
BPF_S_* enum") was routed via net-next tree, that takes all BPF-related
changes, at a time where MIPS BPF JIT was not part of net-next, while
c6610de353 ("MIPS: net: Add BPF JIT") was routed via mips arch tree
and went into mainline within the same merge window. Thus, fix it up by
converting BPF_S_* in a similar fashion as in 3480593131 for MIPS.

Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Alexei Starovoitov <ast@plumgrid.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>
Cc: Linux MIPS Mailing List <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7099/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:18 +01:00
Paul Burton
16f77de82f Revert "MIPS: Save/restore MSA context around signals"
This reverts commit eec43a224c "MIPS: Save/restore MSA context around
signals" and the MSA parts of ca750649e0 "MIPS: kernel: signal:
Prevent save/restore FPU context in user memory" (the restore path of
which appears incorrect anyway...).

The reverted patch took care not to break compatibility with userland
users of struct sigcontext, but inadvertantly changed the offset of the
uc_sigmask field of struct ucontext. Thus Linux v3.15 breaks the
userland ABI. The MSA context will need to be saved via some other
opt-in mechanism, but for now revert the change to reduce the fallout.

This will have minimal impact upon use of MSA since the only supported
CPU which includes it (the P5600) is 32-bit and therefore requires that
the experimental CONFIG_MIPS_O32_FP64_SUPPORT Kconfig option be selected
before the kernel will set FR=1 for a task, a requirement for MSA use.
Thus the users of MSA are limited to known small groups of people & this
patch won't be breaking any previously working MSA-using userland
outside of experimental settings.

[ralf@linux-mips.org: Fixed rejects.]

Cc: stable@vger.kernel.org
Reported-by: Joseph S. Myers <joseph@codesourcery.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7107/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:18 +01:00
Ralf Baechle
fb738f8544 MIPS: math-emu: Reduce code duplication.
The fix in the preceeding commit did do exactly the same thing in two
places showing some code cleanup was due.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:47:55 +01:00