Commit graph

30 commits

Author SHA1 Message Date
Caesar Wang
2fe5c1b045 thermal: rockchip: use the usleep_range instead of udelay
Documentation/timers/timers-howto.txt recommends to use
usleep_range on delays > 10usec.
The usleep_range indeed reduces CPU load, since the udelay will busy wait
for enough loop cycles to achieve the desired delay.

Fixes commit b06c52db39fd ("thermal: rockchip:
handle the power sequence for tsadc controller").

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Suggested-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:33 -07:00
Caesar Wang
678065d5b7 thermal: rockchip: add the notes for better reading
To update the notes for keeping in mind that quickly in case
someone re-read this driver in the future.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:33 -07:00
Elaine Zhang
1cd6026937 thermal: rockchip: Support RK3366 SoCs in the thermal driver
The RK3366 SoCs have two Temperature Sensors, channel 0 is for CPU
channel 1 is for GPU.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:32 -07:00
Caesar Wang
b948476327 thermal: rockchip: handle the power sequence for tsadc controller
This adds the grf property to handle the tsadc power sequence on
rockchip some SoCs.

Verified on rk3399 can work with this patch on now.

while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp
sleep .5; done
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41666
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555
/sys/class/thermal/thermal_zone1/temp:41111
/sys/class/thermal/thermal_zone0/temp:40555

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:32 -07:00
Caesar Wang
f762a35d89 thermal: rockchip: update the tsadc table for rk3399
This patch fixes the incorrect conversion table.
The Code to Temperature mapping is updated based on sillcon results.

Fixes commit b0d70338bc
("thermal: rockchip: Support the RK3399 SoCs in thermal driver").

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:32 -07:00
Caesar Wang
a87dd79761 thermal: rockchip: fixes the code_to_temp for tsadc driver
We should judge the table.id[mid].code insearch algorithm on matter the
adc value increment or decrement.

Or otherwise, the temperature return the incorrect value in some cases.
[    1.438589] adc_val=402,temp=-40000
[    1.438903] adc_val=403,temp=-39375
[    1.439217] adc_val=404,temp=-38750
...
[    1.441102] adc_val=410,temp=-40000
[    1.441416] adc_val=411,temp=-34445
[    1.441737] adc_val=412,temp=-33889
...

Let's fix it right now.

Fixes commit 020ba95dbb ("thermal: rockchip:
Add the sort mode for adc value increment or decrement").

Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:32 -07:00
Shawn Lin
ab5b52f160 thermal: rockchip: disable thermal->clk in err case
Disable thermal->clk when enabling pclk fails in
resume routine.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:32 -07:00
Eduardo Valentin
2633ad1913 thermal: convert rockchip_thermal to use devm_thermal_zone_of_sensor_register
This changes the driver to use the devm_ version
of thermal_zone_of_sensor_register and cleans
up the  local points and unregister calls.

Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Tested-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-05-17 07:28:27 -07:00
Caesar Wang
7ea38c6c36 thermal: rockchip: fix the tsadc sequence output on rk3228/rk3399
As the TRM says, add the tsadc_q_sel to control the temperature-code
sequence since the rk3228/rk3399 need set this bit (1024 - tsadc_q)
as output.

Fixes: commit
b0d7033 "thermal: rockchip: Support the RK3399 SoCs in thermal driver"
7b02a5e "thermal: rockchip: Support the RK3228 SoCs in thermal driver"

Reported-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-02-29 21:06:39 -08:00
Caesar Wang
952418a34f thermal: rockchip: the rename compatibles for rockchip SoCs
This patch renames to be more adapter compatibles since more and more
SoCs are supported in thermal driver.

Reported-by: Huang,Tao <huangtao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-02-29 21:05:39 -08:00
Elaine Zhang
1d37a037dd thermal: rockchip: fix calculation error for code_to_temp
the calculation use a global table, not their own table.
so adapt the table to the correct one.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-02-29 21:04:35 -08:00
Caesar Wang
43b4eb9fe7 thermal: rockchip: fix a impossible condition caused by the warning
As the Dan report the smatch check the thermal driver warning:
drivers/thermal/rockchip_thermal.c:551 rockchip_configure_from_dt()
warn: impossible condition '(thermal->tshut_temp > ((~0 >> 1))) =>
(s32min-s32max > s32max)'

Although The shut_temp read from DT is u32,the temperature is currently
represented as int not long in the thermal driver.
Let's change to make shut_temp instead of the thermal->tshut_temp for
the condition.

Fixes: commit 437df2172e
("thermal: rockchip: consistently use int for temperatures")

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-02-29 21:00:52 -08:00
Caesar Wang
b0d70338bc thermal: rockchip: Support the RK3399 SoCs in thermal driver
The RK3399 SoCs have two Temperature Sensors, channel 0 is for CPU.
channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-01-06 18:06:38 -08:00
Caesar Wang
7b02a5e782 thermal: rockchip: Support the RK3228 SoCs in thermal driver
The RK3228 SoCs has one Temperature Sensor, channel 0 is for CPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-01-06 18:06:38 -08:00
Caesar Wang
13c1cfda1a thermal: rockchip: fix a trivial typo
This patchset trys to dictate unified format for driver.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2016-01-06 18:06:37 -08:00
Caesar Wang
20f0af759d thermal: rockchip: Support the RK3368 SoCs in thermal driver
The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.

The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-12 10:21:30 -08:00
Caesar Wang
437df2172e thermal: rockchip: consistently use int for temperatures
As Temperature is currently represented as int not long in the thermal
framework since use int intead of unsigned long/long to represent
temperature to avoid bogus overheat detection when negative temperature
reported.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-12 10:20:16 -08:00
Caesar Wang
020ba95dbb thermal: rockchip: Add the sort mode for adc value increment or decrement
The conversion table has the adc value and temperature.
In fact, the adc value only has the increment or decrement mode in
conversion table.

Moment, we can add the sort mode to be better support the *code_to_temp*
for differenr SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-12 10:19:09 -08:00
Caesar Wang
ce74110d5e thermal: rockchip: improve the conversion function
We should make the conversion table in as a parameter since the different
SoCs have the different conversionion table.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-12 10:17:35 -08:00
Caesar Wang
144c5565c2 thermal: rockchip: trivial: fix typo in commit
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-12 10:00:11 -08:00
Caesar Wang
1d98b618cc thermal: rockchip: better to compatible the driver for different SoCs
The current driver is default to register the two thermal sensors
in probe since some SoCs maybe only have one sensor for thermal.

In some cases, the channel 0 is not always the cpu or gpu sensor.
So add the channel can be configured for sensors.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-12 10:00:10 -08:00
Caesar Wang
c970872e59 thermal: rockchip: fix compile error
Missing a include file caused compile error.

  drivers/thermal/rockchip_thermal.c: In function 'rockchip_thermal_suspend':
  drivers/thermal/rockchip_thermal.c:720:2: error: implicit declaration of function 'pinctrl_pm_select_sleep_state' [-Werror=implicit-function-declaration]
  ...

Fixes: 7e38a5b1da ("thermal: rockchip: support the sleep pinctrl state
to avoid glitches")

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2015-11-11 19:52:39 -08:00
Caesar Wang
7e38a5b1da thermal: rockchip: support the sleep pinctrl state to avoid glitches in s2r
When we come out of system suspend state (S3) the tsadc will have been
reset and back at its default state.  While reprogramming the tsadc
it's possible that we'll glitch the output and unintentionally cause
the "over temperature" GPIO to be asserted.  Since the over
temperature GPIO is often hooked up to something that will cause a
reboot or shutdown in hardware, this glitch can be catastrophic on
some boards.

We'll add support for selecting the "sleep" pinctrl state at suspend
time.  Boards can use this to effectively disable the tsadc at suspend
time and avoid glitches when the system is resumed.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-11-03 09:57:42 -08:00
Dmitry Torokhov
452e01b3db thermal: rockhip: fix setting thermal shutdown polarity
When requested thermal shutdown signal polarity is low we need to make
sure that the bit representing high level of signal is reset, and not
set all other bits in that register.

Also rename TSADCV2_INT_PD_CLEAR to TSADCV2_INT_PD_CLEAR_MASK to better
reflect its nature.

Acked-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-10-30 11:12:07 -07:00
Dmitry Torokhov
d9a241cbbd thermal: rockchip: fix handling of invalid readings
We attempted to signal invalid code by returning -EAGAIN from
rk_tsadcv2_code_to_temp(), unfortunately the return value was stuffed
directly into the temperature pointer, potentially confusing upper
layers with temperature of -EINVAL.

Let's split temperature from error/success indicator to avoid such
confusion.

Also change the way we scan the temperature table to start with the 2nd
element so that we do not need to worry that we may reference out of
bounds element while doing binary search and keep checking that we end
up with 'mid' equal to 0 (since we are looking for the temperature that
would fall into interval between the 'mid' and 'mid - 1') .

Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-10-30 11:07:32 -07:00
Sascha Hauer
17e8351a77 thermal: consistently use int for temperatures
The thermal code uses int, long and unsigned long for temperatures
in different places.

Using an unsigned type limits the thermal framework to positive
temperatures without need. Also several drivers currently will report
temperatures near UINT_MAX for temperatures below 0°C. This will probably
immediately shut the machine down due to overtemperature if started below
0°C.

'long' is 64bit on several architectures. This is not needed since INT_MAX °mC
is above the melting point of all known materials.

Consistently use a plain 'int' for temperatures throughout the thermal code and
the drivers. This only changes the places in the drivers where the temperature
is passed around as pointer, when drivers internally use another type this is
not changed.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Peter Feuerer <peter@piie.net>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Jean Delvare <jdelvare@suse.de>
Cc: Peter Feuerer <peter@piie.net>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-acpi@vger.kernel.org
Cc: platform-driver-x86@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Darren Hart <dvhart@infradead.org>
Cc: lm-sensors@lm-sensors.org
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2015-08-03 23:15:50 +08:00
Dan Carpenter
0d0a2bf6ed thermal: rockchip: fix an error code
There is a copy and paste bug, "->clk" vs "->pclk", so we return the
wrong error code here.

Fixes: cbac8f6394 ('thermal: rockchip: add driver for thermal')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2015-05-09 13:36:57 +08:00
Caesar Wang
1e9a1aea7a thermal: rockchip: make temperature reporting much more accurate
In general, the kernel should report temperature readings exactly as
reported by the hardware. The cpu / gpu thermal driver works in 5 degree
increments,but we ought to do more accurate. The temperature will do
linear interpolation between the entries in the table.

Test= $md5sum /dev/zero &
$while true; do grep "" /sys/class/thermal/thermal_zone[1-2]/temp;
sleep .5; done

e.g. We can get the result as follows:
    /sys/class/thermal/thermal_zone1/temp:39994
    /sys/class/thermal/thermal_zone2/temp:39086
    /sys/class/thermal/thermal_zone1/temp:39994
    /sys/class/thermal/thermal_zone2/temp:39540
    /sys/class/thermal/thermal_zone1/temp:39540
    /sys/class/thermal/thermal_zone2/temp:39540
    /sys/class/thermal/thermal_zone1/temp:39540
    /sys/class/thermal/thermal_zone2/temp:39994

Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2015-01-24 23:38:36 -04:00
Wolfram Sang
0733d1387e thermal: drop owner assignment from platform_drivers
This platform_driver does not need to set an owner, it will be populated by the
driver core.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-12-22 11:05:59 +08:00
Caesar Wang
cbac8f6394 thermal: rockchip: add driver for thermal
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.

User-defined mode refers,TSADC all the control signals entirely by
software writing to register for direct control.

Automaic mode refers to the module automatically poll TSADC output,
and the results were checked.If you find that the temperature High
in a period of time,an interrupt is generated to the processor
down-measures taken;If the temperature over a period of time High,
the resulting TSHUT gave CRU module,let it reset the entire chip,
or via GPIO give PMIC.

Signed-off-by: zhaoyifeng <zyf@rock-chips.com>
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
2014-11-24 14:35:07 -04:00