Commit Graph

5268 Commits

Author SHA1 Message Date
Vinod Koul 1aefa98b01 clk: qcom: gcc: Fix board clock node name
Device tree node name are not supposed to have "_" in them so fix the
node name use of xo_board to xo-board

Fixes: 652f1813c1 ("clk: qcom: gcc: Add global clock controller driver for QCS404")
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-09 14:13:55 -08:00
Jerome Brunet d6ee1e7e90 clk: meson: axg: mark fdiv2 and fdiv3 as critical
Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor
uses the fdiv2 and fdiv3 to, among other things, provide the cpu
clock.

Until clock hand-off mechanism makes its way to CCF and the generic
SCPI claims platform specific clocks, these clocks must be marked as
critical to make sure they are never disabled when needed by the
co-processor.

Fixes: 05f814402d ("clk: meson: add fdiv clock gates")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-08 10:21:21 -08:00
Christian Hewitt e2576c8bdf clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL
On the Khadas VIM2 (GXM) and LePotato (GXL) board there are problems
with reboot; e.g. a ~60 second delay between issuing reboot and the
board power cycling (and in some OS configurations reboot will fail
and require manual power cycling).

Similar to 'commit c987ac6f1f ("clk:
meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL")' the SCPI Cortex-M4
Co-Processor seems to depend on FCLK_DIV3 being operational.

Until commit 05f814402d ("clk:
meson: add fdiv clock gates"), this clock was modeled and left on by
the bootloader.

We don't have precise documentation about the SCPI Co-Processor and
its clock requirement so we are learning things the hard way.

Marking this clock as critical solves the problem but it should not
be viewed as final solution. Ideally, the SCPI driver should claim
these clocks. We also depends on some clock hand-off mechanism
making its way to CCF, to make sure the clock stays on between its
registration and the SCPI driver probe.

Fixes: 05f814402d ("clk: meson: add fdiv clock gates")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-08 10:12:46 -08:00
Ricardo Ribalda Delgado f98e8a572b clk: fixed-factor: fix of_node_get-put imbalance
When the fixed factor clock is created by devicetree,
of_clk_add_provider is called.  Add a call to
of_clk_del_provider in the remove function to balance
it out.

Reported-by: Alan Tull <atull@kernel.org>
Fixes: 971451b3b1 ("clk: fixed-factor: Convert into a module platform driver")
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-06 08:27:52 -08:00
Linus Torvalds 519f64bf15 This time it looks like a quieter release cycle in the clk tree. I guess that's
because of summer time holidays/vacations. The biggest change in the diffstat
 is in the Qualcomm clk driver, where they got support for CPUs and handful of
 SoCs. After that, the at91 driver got a major rewrite for newer DT bindings
 that should make things easier going forward and the TI code moved to a
 clockdomain based design. The long tail is mostly small driver updates for
 newer clks and some simpler SoC clock drivers such as the Hisilicon and imx
 support.
 
 In the core framework, we only have two small changes this time. One is a new
 clk API to get all clks for a device with the bulk clk APIs. This allows
 drivers that don't care about doing anything besides turning on all the clks to
 just clk_get() them all and turn them on. The other change is the beginning of
 a way to support save and restore of clk settings in the clk framework. TI is
 the only user right now, but we will want to expand upon this design in the
 future to support more save and restore of clk registers.  At least this gets
 us started and works well enough for one SoC, but there's more work in the
 future.
 
 Core:
  - clk_bulk_get_all() API and friends to get all the clks for a device
  - Basic clk state save/restore hooks
 
 New Drivers:
  - Renesas RZ/A2 (R7S9210) SoC, including early clocks
  - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
  - Rensas RZ/G2M (r8a774a1) SoC
  - Qualcomm Krait CPU clk support
  - Qualcomm QCS404 GCC support
  - Qualcomm SDM660 GCC support
  - Qualcomm SDM845 camera clock controller
  - Ingenic jz4725b CGU
  - Hisilicon 3670 SoC support
  - TI SCI clks on K3 SoCs
  - iMX6 MMDC clks
  - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
 
 Updates:
  - Rework at91 PMC clock driver for new DT bindings
  - Nvidia Tegra clk driver MBIST workaround fix
  - S2RAM support for Marvell mvebu periph clks
  - Use updated printk format for OF node names
  - Fix TI code to only search DT subnodes
  - Various static analysis finds
  - Tag various drivers with SPDX license tags
  - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
  - Only use s2mps11 dt-binding defines instead of redefining them in the driver
  - Add some more missing clks to qcom MSM8996 GCC
  - Quad SPI clks on qcom SDM845
  - Add support for CMT timer clocks on R-Car V3H
  - Add support for SHDI and various timer clocks on R-Car V3M
  - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
  - Amlogic clk-pll driver improvements and updates
  - Amlogic axg audio controller system clocks
  - Register Amlogic meson8b clock controller early
  - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
  - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
  - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
  - Remove obsoleted Exynos4212 ISP clock definitions
  - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
  - TI RTC+DDR sleep mode support for clock save/restore
  - Allwinner A64 display engine support and fixes
  - Allwinner A83t display engine support and fixes
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This time it looks like a quieter release cycle in the clk tree. I
  guess that's because of summer time holidays/vacations. The biggest
  change in the diffstat is in the Qualcomm clk driver, where they got
  support for CPUs and handful of SoCs. After that, the at91 driver got
  a major rewrite for newer DT bindings that should make things easier
  going forward and the TI code moved to a clockdomain based design.

  The long tail is mostly small driver updates for newer clks and some
  simpler SoC clock drivers such as the Hisilicon and imx support.

  In the core framework, we only have two small changes this time.

  One is a new clk API to get all clks for a device with the bulk clk
  APIs. This allows drivers that don't care about doing anything besides
  turning on all the clks to just clk_get() them all and turn them on.

  The other change is the beginning of a way to support save and restore
  of clk settings in the clk framework. TI is the only user right now,
  but we will want to expand upon this design in the future to support
  more save and restore of clk registers. At least this gets us started
  and works well enough for one SoC, but there's more work in the
  future.

  Core:
   - clk_bulk_get_all() API and friends to get all the clks for a device
   - Basic clk state save/restore hooks

  New Drivers:
   - Renesas RZ/A2 (R7S9210) SoC, including early clocks
   - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
   - Rensas RZ/G2M (r8a774a1) SoC
   - Qualcomm Krait CPU clk support
   - Qualcomm QCS404 GCC support
   - Qualcomm SDM660 GCC support
   - Qualcomm SDM845 camera clock controller
   - Ingenic jz4725b CGU
   - Hisilicon 3670 SoC support
   - TI SCI clks on K3 SoCs
   - iMX6 MMDC clks
   - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs

  Updates:
   - Rework at91 PMC clock driver for new DT bindings
   - Nvidia Tegra clk driver MBIST workaround fix
   - S2RAM support for Marvell mvebu periph clks
   - Use updated printk format for OF node names
   - Fix TI code to only search DT subnodes
   - Various static analysis finds
   - Tag various drivers with SPDX license tags
   - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
   - Only use s2mps11 dt-binding defines instead of redefining them in the driver
   - Add some more missing clks to qcom MSM8996 GCC
   - Quad SPI clks on qcom SDM845
   - Add support for CMT timer clocks on R-Car V3H
   - Add support for SHDI and various timer clocks on R-Car V3M
   - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
   - Amlogic clk-pll driver improvements and updates
   - Amlogic axg audio controller system clocks
   - Register Amlogic meson8b clock controller early
   - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
   - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
   - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
   - Remove obsoleted Exynos4212 ISP clock definitions
   - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
   - TI RTC+DDR sleep mode support for clock save/restore
   - Allwinner A64 display engine support and fixes
   - Allwinner A83t display engine support and fixes"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits)
  clk: qcom: Remove unused arrays in SDM845 GCC
  clk: fixed-rate: fix of_node_get-put imbalance
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: qcom: gcc-sdm660: Add MODULE_LICENSE
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  ...
2018-10-31 11:08:30 -07:00
Mike Rapoport 7e1c4e2792 memblock: stop using implicit alignment to SMP_CACHE_BYTES
When a memblock allocation APIs are called with align = 0, the alignment
is implicitly set to SMP_CACHE_BYTES.

Implicit alignment is done deep in the memblock allocator and it can
come as a surprise.  Not that such an alignment would be wrong even
when used incorrectly but it is better to be explicit for the sake of
clarity and the prinicple of the least surprise.

Replace all such uses of memblock APIs with the 'align' parameter
explicitly set to SMP_CACHE_BYTES and stop implicit alignment assignment
in the memblock internal allocation functions.

For the case when memblock APIs are used via helper functions, e.g.  like
iommu_arena_new_node() in Alpha, the helper functions were detected with
Coccinelle's help and then manually examined and updated where
appropriate.

The direct memblock APIs users were updated using the semantic patch below:

@@
expression size, min_addr, max_addr, nid;
@@
(
|
- memblock_alloc_try_nid_raw(size, 0, min_addr, max_addr, nid)
+ memblock_alloc_try_nid_raw(size, SMP_CACHE_BYTES, min_addr, max_addr,
nid)
|
- memblock_alloc_try_nid_nopanic(size, 0, min_addr, max_addr, nid)
+ memblock_alloc_try_nid_nopanic(size, SMP_CACHE_BYTES, min_addr, max_addr,
nid)
|
- memblock_alloc_try_nid(size, 0, min_addr, max_addr, nid)
+ memblock_alloc_try_nid(size, SMP_CACHE_BYTES, min_addr, max_addr, nid)
|
- memblock_alloc(size, 0)
+ memblock_alloc(size, SMP_CACHE_BYTES)
|
- memblock_alloc_raw(size, 0)
+ memblock_alloc_raw(size, SMP_CACHE_BYTES)
|
- memblock_alloc_from(size, 0, min_addr)
+ memblock_alloc_from(size, SMP_CACHE_BYTES, min_addr)
|
- memblock_alloc_nopanic(size, 0)
+ memblock_alloc_nopanic(size, SMP_CACHE_BYTES)
|
- memblock_alloc_low(size, 0)
+ memblock_alloc_low(size, SMP_CACHE_BYTES)
|
- memblock_alloc_low_nopanic(size, 0)
+ memblock_alloc_low_nopanic(size, SMP_CACHE_BYTES)
|
- memblock_alloc_from_nopanic(size, 0, min_addr)
+ memblock_alloc_from_nopanic(size, SMP_CACHE_BYTES, min_addr)
|
- memblock_alloc_node(size, 0, nid)
+ memblock_alloc_node(size, SMP_CACHE_BYTES, nid)
)

[mhocko@suse.com: changelog update]
[akpm@linux-foundation.org: coding-style fixes]
[rppt@linux.ibm.com: fix missed uses of implicit alignment]
  Link: http://lkml.kernel.org/r/20181016133656.GA10925@rapoport-lnx
Link: http://lkml.kernel.org/r/1538687224-17535-1-git-send-email-rppt@linux.vnet.ibm.com
Signed-off-by: Mike Rapoport <rppt@linux.vnet.ibm.com>
Suggested-by: Michal Hocko <mhocko@suse.com>
Acked-by: Paul Burton <paul.burton@mips.com>	[MIPS]
Acked-by: Michael Ellerman <mpe@ellerman.id.au>	[powerpc]
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-10-31 08:54:16 -07:00
Mike Rapoport 57c8a661d9 mm: remove include/linux/bootmem.h
Move remaining definitions and declarations from include/linux/bootmem.h
into include/linux/memblock.h and remove the redundant header.

The includes were replaced with the semantic patch below and then
semi-automated removal of duplicated '#include <linux/memblock.h>

@@
@@
- #include <linux/bootmem.h>
+ #include <linux/memblock.h>

[sfr@canb.auug.org.au: dma-direct: fix up for the removal of linux/bootmem.h]
  Link: http://lkml.kernel.org/r/20181002185342.133d1680@canb.auug.org.au
[sfr@canb.auug.org.au: powerpc: fix up for removal of linux/bootmem.h]
  Link: http://lkml.kernel.org/r/20181005161406.73ef8727@canb.auug.org.au
[sfr@canb.auug.org.au: x86/kaslr, ACPI/NUMA: fix for linux/bootmem.h removal]
  Link: http://lkml.kernel.org/r/20181008190341.5e396491@canb.auug.org.au
Link: http://lkml.kernel.org/r/1536927045-23536-30-git-send-email-rppt@linux.vnet.ibm.com
Signed-off-by: Mike Rapoport <rppt@linux.vnet.ibm.com>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Rich Felker <dalias@libc.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Serge Semin <fancer.lancer@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-10-31 08:54:16 -07:00
Mike Rapoport eb31d559f1 memblock: remove _virt from APIs returning virtual address
The conversion is done using

sed -i 's@memblock_virt_alloc@memblock_alloc@g' \
	$(git grep -l memblock_virt_alloc)

Link: http://lkml.kernel.org/r/1536927045-23536-8-git-send-email-rppt@linux.vnet.ibm.com
Signed-off-by: Mike Rapoport <rppt@linux.vnet.ibm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Greentime Hu <green.hu@gmail.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: Jonas Bonn <jonas@southpole.se>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Ley Foon Tan <lftan@altera.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Richard Kuo <rkuo@codeaurora.org>
Cc: Richard Weinberger <richard@nod.at>
Cc: Rich Felker <dalias@libc.org>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Serge Semin <fancer.lancer@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-10-31 08:54:15 -07:00
Linus Torvalds b22b6beae6 ARM: SoC driver updates for 4.17
The most noteworthy SoC driver changes this time include:
 
 - The TEE subsystem gains an in-kernel interface to access the TEE
   from device drivers.
 
 - The reset controller subsystem gains a driver for the Qualcomm
   Snapdragon 845 Power Domain Controller.
 
 - The Xilinx Zynq platform now has a firmware interface for its
   platform management unit. This contains a firmware "ioctl" interface
   that was a little controversial at first, but the version we merged
   solved that by not exposing arbitrary firmware calls to user space.
 
 - The Amlogic Meson platform gains a "canvas" driver that is used
   for video processing and shared between different high-level drivers.
 
 The rest is more of the usual, mostly related to SoC specific power
 management support and core drivers in drivers/soc:
 
 - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
   features related to power and reset control.
 
 - The Mediatek mt8183 and mt6765 SoC platforms gain support for
   their respective power management chips.
 
 - A new driver for NXP i.MX8, which need a firmware interface for
   power management.
 
 - The SCPI firmware interface now contains support estimating power
   usage of performance states
 
 - The NVIDIA Tegra "pmc" driver gains a few new features, in particular
   a pinctrl interface for configuring the pads.
 
 - Lots of small changes for Qualcomm, in particular the "smem"
   device driver.
 
 - Some cleanups for the TI OMAP series related to their sysc
   controller.
 
 Additional cleanups and bugfixes in SoC specific drivers include the
 Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "The most noteworthy SoC driver changes this time include:

   - The TEE subsystem gains an in-kernel interface to access the TEE
     from device drivers.

   - The reset controller subsystem gains a driver for the Qualcomm
     Snapdragon 845 Power Domain Controller.

   - The Xilinx Zynq platform now has a firmware interface for its
     platform management unit. This contains a firmware "ioctl"
     interface that was a little controversial at first, but the version
     we merged solved that by not exposing arbitrary firmware calls to
     user space.

   - The Amlogic Meson platform gains a "canvas" driver that is used for
     video processing and shared between different high-level drivers.

  The rest is more of the usual, mostly related to SoC specific power
  management support and core drivers in drivers/soc:

   - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
     features related to power and reset control.

   - The Mediatek mt8183 and mt6765 SoC platforms gain support for their
     respective power management chips.

   - A new driver for NXP i.MX8, which need a firmware interface for
     power management.

   - The SCPI firmware interface now contains support estimating power
     usage of performance states

   - The NVIDIA Tegra "pmc" driver gains a few new features, in
     particular a pinctrl interface for configuring the pads.

   - Lots of small changes for Qualcomm, in particular the "smem" device
     driver.

   - Some cleanups for the TI OMAP series related to their sysc
     controller.

  Additional cleanups and bugfixes in SoC specific drivers include the
  Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
  firmware: tegra: bpmp: Implement suspend/resume support
  drivers: clk: Add ZynqMP clock driver
  dt-bindings: clock: Add bindings for ZynqMP clock driver
  firmware: xilinx: Add zynqmp IOCTL API for device control
  Documentation: xilinx: Add documentation for eemi APIs
  MAINTAINERS: imx: include drivers/firmware/imx path
  firmware: imx: add misc svc support
  firmware: imx: add SCU firmware driver support
  reset: Fix potential use-after-free in __of_reset_control_get()
  dt-bindings: arm: fsl: add scu binding doc
  soc: fsl: qbman: add interrupt coalesce changing APIs
  soc: fsl: bman_portals: defer probe after bman's probe
  soc: fsl: qbman: Use last response to determine valid bit
  soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
  soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
  soc: fsl: qbman: Check if CPU is offline when initializing portals
  reset: qcom: PDC Global (Power Domain Controller) reset controller
  dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
  reset: Grammar s/more then once/more than once/
  bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
  ...
2018-10-29 15:16:01 -07:00
Linus Torvalds b27186abb3 Devicetree updates for 4.20:
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
 
 - Work to get rid of direct accesses to struct device_node name and
   type pointers in preparation for removing them. New helpers for
   parsing DT cpu nodes and conversions to use the helpers. printk
   conversions to %pOFn for printing DT node names. Most went thru
   subystem trees, so this is the remainder.
 
 - Fixes to DT child node lookups to actually be restricted to child
   nodes instead of treewide.
 
 - Refactoring of dtb targets out of arch code. This makes the support
   more uniform and enables building all dtbs on c6x, microblaze, and
   powerpc.
 
 - Various DT binding updates for Renesas r8a7744 SoC
 
 - Vendor prefixes for Facebook, OLPC
 
 - Restructuring of some ARM binding docs moving some peripheral bindings
   out of board/SoC binding files
 
 - New "secure-chosen" binding for secure world settings on ARM
 
 - Dual licensing of 2 DT IRQ binding headers
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Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull Devicetree updates from Rob Herring:
 "A bit bigger than normal as I've been busy this cycle.

  There's a few things with dependencies and a few things subsystem
  maintainers didn't pick up, so I'm taking them thru my tree.

  The fixes from Johan didn't get into linux-next, but they've been
  waiting for some time now and they are what's left of what subsystem
  maintainers didn't pick up.

  Summary:

   - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4

   - Work to get rid of direct accesses to struct device_node name and
     type pointers in preparation for removing them. New helpers for
     parsing DT cpu nodes and conversions to use the helpers. printk
     conversions to %pOFn for printing DT node names. Most went thru
     subystem trees, so this is the remainder.

   - Fixes to DT child node lookups to actually be restricted to child
     nodes instead of treewide.

   - Refactoring of dtb targets out of arch code. This makes the support
     more uniform and enables building all dtbs on c6x, microblaze, and
     powerpc.

   - Various DT binding updates for Renesas r8a7744 SoC

   - Vendor prefixes for Facebook, OLPC

   - Restructuring of some ARM binding docs moving some peripheral
     bindings out of board/SoC binding files

   - New "secure-chosen" binding for secure world settings on ARM

   - Dual licensing of 2 DT IRQ binding headers"

* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
  ARM: dt: relicense two DT binding IRQ headers
  power: supply: twl4030-charger: fix OF sibling-node lookup
  NFC: nfcmrvl_uart: fix OF child-node lookup
  net: stmmac: dwmac-sun8i: fix OF child-node lookup
  net: bcmgenet: fix OF child-node lookup
  drm/msm: fix OF child-node lookup
  drm/mediatek: fix OF sibling-node lookup
  of: Add missing exports of node name compare functions
  dt-bindings: Add OLPC vendor prefix
  dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
  dt-bindings: thermal: samsung: Add SPDX license identifier
  dt-bindings: clock: samsung: Add SPDX license identifiers
  dt-bindings: timer: ostm: Add R7S9210 support
  dt-bindings: phy: rcar-gen2: Add r8a7744 support
  dt-bindings: can: rcar_can: Add r8a7744 support
  dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
  dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
  dt-bindings: thermal: rcar: Add device tree support for r8a7744
  Documentation: dt: Add binding for /secure-chosen/stdout-path
  dt-bindings: arm: zte: Move sysctrl bindings to their own doc
  ...
2018-10-26 12:09:58 -07:00
Stephen Boyd 9a1d6b232b Merge branches 'clk-fixed-rate-remove' and 'clk-qcom-cleanup' into clk-next
* clk-fixed-rate-remove:
  clk: fixed-rate: fix of_node_get-put imbalance

* clk-qcom-cleanup:
  clk: qcom: Remove unused arrays in SDM845 GCC
2018-10-18 15:44:13 -07:00
Stephen Boyd 1578968f77 Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next
- iMX6 MMDC clks
  - Qualcomm Krait CPU clk support

* clk-imx6-mmdc:
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  clk: imx6ul: add mmdc1 ipg clock

* clk-qcom-krait:
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions

* clk-rockchip:
  clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call
  clk: rockchip: use the newly added clock-id for hdmi on RK3066
  clk: rockchip: add clock-id for HCLK_HDMI on rk3066
  clk: rockchip: fix wrong mmc sample phase shift for rk3328
  clk: rockchip: improve rk3288 pll rates for better hdmi output

* clk-smp2s11-match:
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: s2mps11: Fix matching when built as module and DT node contains compatible
2018-10-18 15:44:01 -07:00
Stephen Boyd 1fe7c040b6 Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' and 'clk-at91-pmc-rework' into clk-next
- Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
 - Rework at91 PMC clock driver for new DT bindings

* clk-actions-reset:
  clk: actions: Add Actions Semi S900 SoC Reset Management Unit support
  clk: actions: Add Actions Semi S700 SoC Reset Management Unit support
  clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support
  dt-bindings: reset: Add binding constants for Actions Semi S900 RMU
  dt-bindings: reset: Add binding constants for Actions Semi S700 RMU
  dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs
  clk: actions: Cache regmap info in private clock descriptor

* clk-imx7-init-critical:
  clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clk
  clk: imx: cpu clock should be always critical
  clk: imx: imx7d: remove clks_init_on array
  clk: imx: imx7d: remove unnecessary clocks from clks_init_on array

* clk-mmp2-ids:
  clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk

* clk-at91-pmc-rework:
  clk: at91: move DT compatibility code to its own file
  clk: at91: add at91sam9rl PMC driver
  clk: at91: add at91sam9x5 PMCs driver
  clk: at91: add at91sam9260 PMC driver
  clk: at91: add sama5d2 PMC driver
  clk: at91: add sama5d4 pmc driver
  clk: at91: add new DT lookup function
  dt-bindings: clk: at91: Document new PMC binding
  clk: at91: add pmc_data struct and helpers
  clk: at91: allow clock registration from C code
  clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()
  clk: at91: audio-pll: separate registration from DT parsing
  clk: at91: h32mx: separate registration from DT parsing
  clk: at91: generated: SSCs don't have a gclk
  clk: at91: audio-pll: fix audio pmc type
2018-10-18 15:43:48 -07:00
Stephen Boyd c1f74dbe59 Merge branches 'clk-tegra' and 'clk-bulk-get-all' into clk-next
- Nvidia Tegra clk driver MBIST workaround fix
  - clk_bulk_get_all() API and friends to get all the clks for a device

* clk-tegra:
  clk: tegra210: Include size.h for compilation ease
  clk: tegra: Fixes for MBIST work around
  clk: tegra: probe deferral error reporting

* clk-bulk-get-all:
  clk: add managed version of clk_bulk_get_all
  clk: add new APIs to operate on all available clocks
  clk: bulk: add of_clk_bulk_get()
2018-10-18 15:43:38 -07:00
Stephen Boyd 19ef24654f Merge branch 'clk-ingenic-jz4725b' into clk-next
- Ingenic jz4725b CGU

* clk-ingenic-jz4725b:
  clk: Add Ingenic jz4725b CGU driver
  dt-bindings: clock: Add jz4725b-cgu.h header
  dt-bindings: clock: ingenic: Explicitly list compatible strings
  clk: ingenic: Add proper Kconfig entries
2018-10-18 15:43:24 -07:00
Stephen Boyd fa4c0e4903 Merge branch 'clk-qcom-qcs404' into clk-next
- Qualcomm QCS404 GCC support

* clk-qcom-qcs404:
  clk: qcom: gcc: Add global clock controller driver for QCS404
  clk: qcom: Export clk_alpha_pll_configure()
2018-10-18 15:42:42 -07:00
Stephen Boyd 37163726e1 Merge branch 'clk-qcom-sdm660' into clk-next
- Qualcomm SDM660 GCC support

* clk-qcom-sdm660:
  clk: qcom: gcc-sdm660: Add MODULE_LICENSE
  clk: qcom: Add Global Clock controller (GCC) driver for SDM660
2018-10-18 15:41:51 -07:00
Stephen Boyd ffd3b1c880 Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-next
- Hisilicon 3670 SoC support

* clk-samsung:
  dt-bindings: clock: samsung: Add SPDX license identifiers
  clk: samsung: Use clk_hw API for calling clk framework from clk notifiers
  clk: samsung: exynos5420: Enable PERIS clocks for suspend
  clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
  clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend
  clk: samsung: Remove obsolete code for Exynos4412 ISP clocks
  clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs
  clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume
  clk: samsung: exynos5420: Use generic helper for handling suspend/resume
  clk: samsung: exynos4: Use generic helper for handling suspend/resume
  clk: samsung: Add support for setting registers state before suspend
  clk: samsung: exynos5250: Use generic helper for handling suspend/resume
  clk: samsung: s5pv210: Use generic helper for handling suspend/resume
  clk: samsung: s3c64xx: Use generic helper for handling suspend/resume
  clk: samsung: s3c2443: Use generic helper for handling suspend/resume
  clk: samsung: s3c2412: Use generic helper for handling suspend/resume
  clk: samsung: s3c2410: Use generic helper for handling suspend/resume
  clk: samsung: Remove excessive include

* clk-hisi3670:
  clk: hisilicon: Add clock driver for Hi3670 SoC
  dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk

* clk-at91-div-0:
  clk: at91: Fix division by zero in PLL recalc_rate()
2018-10-18 15:41:36 -07:00
Stephen Boyd 8a69f1d470 Merge branch 'clk-ti' into clk-next
* clk-ti:
  clk: ti: Prepare for remove of OF node name
  clk: Clean up suspend/resume coding style
  clk: ti: Add functions to save/restore clk context
  clk: clk: Add clk_gate_restore_context function
  clk: Add functions to save/restore clock context en-masse
  clk: ti: dra7: add new clkctrl data
  clk: ti: dra7xx: rename existing clkctrl data as compat data
  clk: ti: am43xx: add new clkctrl data for am43xx
  clk: ti: am43xx: rename existing clkctrl data as compat data
  clk: ti: am33xx: add new clkctrl data for am33xx
  clk: ti: am33xx: rename existing clkctrl data as compat data
  clk: ti: clkctrl: replace dashes from clkdm name with underscore
  clk: ti: clkctrl: support multiple clkctrl nodes under a cm node
  dt-bindings: clock: dra7xx: add clkctrl indices for new data layout
  dt-bindings: clock: am43xx: add clkctrl indices for new data layout
  dt-bindings: clock: am33xx: add clkctrl indices for new data layout
2018-10-18 15:41:21 -07:00
Stephen Boyd cc2adbe370 Merge branch 'clk-k3-tisci' into clk-next
- TI SCI clks on K3 SoCs

* clk-k3-tisci:
  clk: keystone: add missing MODULE_LICENSE
  clk: keystone: Enable TISCI clocks if K3_ARCH
2018-10-18 15:40:10 -07:00
Stephen Boyd cd8ca30052 Merge branches 'clk-mvebu-periph-pm', 'clk-meson', 'clk-allwinner', 'clk-mvebu-dup' and 'clk-davinci' into clk-next
- S2RAM support for Marvell mvebu periph clks

* clk-mvebu-periph-pm:
  clk: mvebu: armada-37xx-periph: add suspend/resume support
  clk: mvebu: armada-37xx-periph: save the IP base address in the driver data

* clk-meson:
  clk: meson: meson8b: use the regmap in the internal reset controller
  clk: meson: meson8b: register the clock controller early
  clk: meson-axg: pcie: drop the mpll3 clock parent
  clk: meson: axg: round audio system master clocks down
  clk: meson: clk-pll: drop hard-coded rates from pll tables
  clk: meson: clk-pll: remove od parameters
  clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary
  clk: meson: clk-pll: add enable bit

* clk-allwinner:
  dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro
  clk: sunxi-ng: a64: Add max. rate constraint to video PLLs
  clk: sunxi-ng: a64: Add minimal rate for video PLLs
  clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks
  clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs
  clk: sunxi-ng: nkmp: Add constraint for maximum rate
  clk: sunxi-ng: r40: Add max. rate constraint to video PLLs
  clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video
  clk: sunxi-ng: Add maximum rate constraint to NM PLLs
  clk: sunxi-ng: h6: fix PWM gate/reset offset
  clk: sunxi-ng: h6: fix bus clocks' divider position

* clk-mvebu-dup:
  clk: mvebu: ap806: Remove superfluous of_clk_add_provider

* clk-davinci:
  clk: davinci: kill davinci_clk_reset_assert/deassert()
2018-10-18 15:39:08 -07:00
Stephen Boyd 5d3a48fe2c Merge branches 'clk-qcom-sdm845-camcc' and 'clk-mtk-unused' into clk-next
- Qualcomm SDM845 camera clock controller

* clk-qcom-sdm845-camcc:
  clk: qcom: Add camera clock controller driver for SDM845
  dt-bindings: clock: Introduce QCOM Camera clock bindings

* clk-mtk-unused:
  clk: mediatek: remove unused array audio_parents
2018-10-18 15:39:01 -07:00
Stephen Boyd faff3d8e85 Merge branch 'clk-renesas' into clk-next
* clk-renesas: (36 commits)
  clk: renesas: r7s9210: Add SPI clocks
  clk: renesas: r7s9210: Move table update to separate function
  clk: renesas: r7s9210: Convert some clocks to early
  clk: renesas: cpg-mssr: Add early clock support
  clk: renesas: r8a77970: Add TPU clock
  clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment
  dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0
  clk: renesas: cpg-mssr: Add r8a774c0 support
  clk: renesas: Add r8a774c0 CPG Core Clock Definitions
  clk: renesas: r8a7743: Add r8a7744 support
  clk: renesas: Add r8a7744 CPG Core Clock Definitions
  dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding
  dt-bindings: clock: renesas: Convert to SPDX identifiers
  clk: renesas: cpg-mssr: Add R7S9210 support
  clk: renesas: r8a77970: Add TMU clocks
  clk: renesas: r8a77970: Add CMT clocks
  clk: renesas: r9a06g032: Fix UART34567 clock rate
  clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI
  clk: renesas: r8a77980: Add CMT clocks
  clk: renesas: r8a77990: Add missing I2C7 clock
  ...
2018-10-18 15:38:51 -07:00
Stephen Boyd 9710ee14be Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next
- Use updated printk format for OF node names
  - Fix TI code to only search DT subnodes
  - Various static analysis finds

* clk-dt-name:
  clk: Convert to using %pOFn instead of device_node.name

* clk-ti-of-node:
  clk: ti: fix OF child-node lookup

* clk-sa:
  clk: mvebu: armada-37xx-tbg: Switch to clk_get and balance it in probe
  reset: hisilicon: fix potential NULL pointer dereference
  clk: cdce925: release child device nodes
  clk: qcom: clk-branch: Use true and false for boolean values
2018-10-18 15:33:52 -07:00
Stephen Boyd 1affdc35e0 Merge branches 'clk-spdx', 'clk-qcom-dfs', 'clk-smp2s11-include', 'clk-qcom-8996-missing' and 'clk-qcom-qspi' into clk-next
- Tag various drivers with SPDX license tags
  - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
  - Only use s2mps11 dt-binding defines instead of redefining them in the driver
  - Add some more missing clks to qcom MSM8996 GCC
  - Quad SPI clks on qcom SDM845

* clk-spdx:
  clk: mvebu: use SPDX-License-Identifier
  clk: renesas: Convert to SPDX identifiers
  clk: renesas: use SPDX identifier for Renesas drivers
  clk: s2mps11,s3c64xx: Add SPDX license identifiers
  clk: max77686: Add SPDX license identifiers

* clk-qcom-dfs:
  clk: qcom: Allocate space for NULL terimation in DFS table
  clk: qcom: gcc: Register QUPv3 RCGs for DFS on SDM845
  clk: qcom: Add support for RCG to register for DFS

* clk-smp2s11-include:
  clk: s2mps11: Use existing defines from bindings for clock IDs

* clk-qcom-8996-missing:
  clk: qcom: Add some missing gcc clks for msm8996

* clk-qcom-qspi:
  clk: qcom: Add qspi (Quad SPI) clocks for sdm845
  clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header
2018-10-18 15:33:28 -07:00
Evan Green 82a4de6f11 clk: qcom: Remove unused arrays in SDM845 GCC
This change removes a parent map and parent name array that
appear to be completely unreferenced.

Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-18 15:29:51 -07:00
Alan Tull 52091c256b clk: fixed-rate: fix of_node_get-put imbalance
When the fixed rate clock is created by devicetree,
of_clk_add_provider is called.  Add a call to
of_clk_del_provider in the remove function to balance
it out.

Signed-off-by: Alan Tull <atull@kernel.org>
Fixes: 435779fe13 ("clk: fixed-rate: Convert into a module platform driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-18 13:40:15 -07:00
Nathan Chancellor 9c940bbe2b clk: s2mps11: Add used attribute to s2mps11_dt_match
Clang warns after commit 8985167ecf ("clk: s2mps11: Fix matching when
built as module and DT node contains compatible"):

drivers/clk/clk-s2mps11.c:242:34: warning: variable 's2mps11_dt_match'
is not needed and will not be emitted [-Wunneeded-internal-declaration]
static const struct of_device_id s2mps11_dt_match[] = {
                                 ^
1 warning generated.

This warning happens when a variable is used in some construct that
doesn't require a reference to that variable to be emitted in the symbol
table; in this case, it's MODULE_DEVICE_TABLE, which only needs to hold
the data of the variable, not the variable itself.

$ nm -S drivers/clk/clk-s2mps11.o | rg s2mps11_dt_match
00000078 000003d4 R __mod_of__s2mps11_dt_match_device_table

Normally, with device ID table variables, it means that the variable
just needs to be tied to the device declaration at the bottom of the
file, like s2mps11_clk_id:

$ nm -S drivers/clk/clk-s2mps11.o | rg s2mps11_clk_id
00000000 00000078 R __mod_platform__s2mps11_clk_id_device_table
00000000 00000078 r s2mps11_clk_id

However, because the comment above this deliberately doesn't want this
variable added to .of_match_table, we need to mark s2mps11_dt_match as
__used to silence this warning. This makes it clear to Clang that the
variable is used for something, even if a reference to it isn't being
emitted.

Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Fixes: 8985167ecf ("clk: s2mps11: Fix matching when built as module and DT node contains compatible")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-18 13:37:52 -07:00
Stephen Boyd 2725991eca clk: qcom: gcc-sdm660: Add MODULE_LICENSE
Add a module license to match the license at the top of this file and
silence a build warning.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-18 11:21:30 -07:00
Sricharan R 77612720a2 clk: qcom: Add safe switch hook for krait mux clocks
When the Hfplls are reprogrammed during the rate change,
the primary muxes which are sourced from the same hfpll
for higher frequencies, needs to be switched to the 'safe
secondary mux' as the parent for that small window. This
is done by registering a clk notifier for the muxes and
switching to the safe parent in the PRE_RATE_CHANGE notifier
and back to the original parent in the POST_RATE_CHANGE notifier.

Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:15:05 -07:00
Stephen Boyd bb5c4a8505 clk: qcom: Add Krait clock controller driver
The Krait CPU clocks are made up of a primary mux and secondary
mux for each CPU and the L2, controlled via cp15 accessors. For
Kraits within KPSSv1 each secondary mux accepts a different aux
source, but on KPSSv2 each secondary mux accepts the same aux
source.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:59 -07:00
Stephen Boyd 3ddc3564d3 clk: qcom: Add KPSS ACC/GCC driver
The ACC and GCC regions present in KPSSv1 contain registers to
control clocks and power to each Krait CPU and L2. For CPUfreq
purposes probe these devices and expose a mux clock that chooses
between PXO and PLL8.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:54 -07:00
Stephen Boyd 4d7dc77bab clk: qcom: Add support for Krait clocks
The Krait clocks are made up of a series of muxes and a divider
that choose between a fixed rate clock and dedicated HFPLLs for
each CPU. Instead of using mmio accesses to remux parents, the
Krait implementation exposes the remux control via cp15
registers. Support these clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
[sboyd@kernel.org: Move hidden config to top outside of the visible qcom
config zone so that menuconfig looks nice]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:49 -07:00
Stephen Boyd 1f79131bfd clk: qcom: Add IPQ806X's HFPLLs
Describe the HFPLLs present on IPQ806X devices.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:47 -07:00
Stephen Boyd 72ad720795 clk: qcom: Add MSM8960/APQ8064's HFPLLs
Describe the HFPLLs present on MSM8960 and APQ8064 devices.

Acked-by: Rob Herring <robh@kernel.org> (bindings)
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:45 -07:00
Stephen Boyd cb546b797a clk: qcom: Add HFPLL driver
On some devices (MSM8974 for example), the HFPLLs are
instantiated within the Krait processor subsystem as separate
register regions. Add a driver for these PLLs so that we can
provide HFPLL clocks for use by the system.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:40 -07:00
Stephen Boyd b3f2f10693 clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
HFPLLs are the main frequency source for Krait CPU clocks. Add
support for changing the rate of these PLLs.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Craig Tatlor <ctatlor97@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 13:14:37 -07:00
Anson Huang 341ce3563e clk: imx6q: add mmdc0 ipg clock
i.MX6Q has MMDC0 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:16:02 -07:00
Anson Huang 09d47620d0 clk: imx6sl: add mmdc ipg clocks
i.MX6SL has MMDC0 and MMDC1 ipg clock in CCM CCGR, add them into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:51 -07:00
Anson Huang aac7ff2048 clk: imx6sll: add mmdc1 ipg clock
i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:44 -07:00
Anson Huang 891f30bf60 clk: imx6sx: add mmdc1 ipg clock
i.MX6SX has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:32 -07:00
Anson Huang acc4f98d44 clk: imx6ul: add mmdc1 ipg clock
i.MX6UL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 11:15:20 -07:00
Alexandre Belloni 62061d357c clk: at91: move DT compatibility code to its own file
Move all the DT backward compatibility code to its own file so it can be
deleted later.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:45:39 -07:00
Alexandre Belloni ecd0bf3377 clk: at91: add at91sam9rl PMC driver
Add a driver for the PMC clocks of the at91sam9rl SoC.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Make i signed to fix signedness bug]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:45:19 -07:00
Alexandre Belloni 1eabdc2f9d clk: at91: add at91sam9x5 PMCs driver
Add a driver for the PMC clocks of the at91sam9x5 SoCs

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Make i signed to fix signedness bug]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:45:16 -07:00
Alexandre Belloni c8923236a2 clk: at91: add at91sam9260 PMC driver
Add a driver for the PMC clocks of the at91sam9260, at91sam9261,
at91am9263 and at91sam9g20 SoCs.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Make i signed to fix signedness bug]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:45:12 -07:00
Alexandre Belloni a2038077de clk: at91: add sama5d2 PMC driver
Add a driver for the PMC clocks of the sama5d2

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Make i signed to fix signedness bug]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:53 -07:00
Alexandre Belloni 084b696bb5 clk: at91: add sama5d4 pmc driver
Add a driver for the PMC clocks of the sama5d4

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[sboyd@kernel.org: Make i signed to fix signedness bug]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:33 -07:00
Alexandre Belloni d387ff5427 clk: at91: add new DT lookup function
Add a new DT lookup function to lookup for PMC clocks.

Note that the #ifndef AT91_PMC_MOSCS section will be removed once all the
platforms are converted.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:33 -07:00
Alexandre Belloni b00cd8e419 clk: at91: add pmc_data struct and helpers
Add a new strut to handle references to all the PMC clocks and implement
allocation/free helpers.

Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-10-17 10:44:33 -07:00