Commit graph

7 commits

Author SHA1 Message Date
Martin Hundebøll
f4ab169e88 mfd: intel-m10-bmc: Add N5010 variant
The m10-bmc is used on the Silicom N5010 PAC too, so add it to list of
m10bmc types.

Signed-off-by: Martin Hundebøll <mhu@silicom.dk>
Acked-by: Moritz Fischer <mdf@kernel.org>
Reviewed-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 08:55:32 +01:00
Linus Torvalds
71a5cc28e8 - Core Frameworks
- Add support for Software Nodes to MFD Core
    - Remove support for Device Properties from MFD Core
    - Use standard APIs in MFD Core
 
  - New Drivers
    - Add support for ROHM BD9576MUF and BD9573MUF PMICs
    - Add support for Netronix Embedded Controller, PWM and RTC
    - Add support for Actions Semi ATC260x PMICs and OnKey
 
  - New Device Support
    - Add support for DG1 PCIe Graphics Card to Intel PMT
    - Add support for ROHM BD71815 PMIC to ROHM BD71828
    - Add support for Tolino Shine 2 HD to Netronix Embedded Controller
    - Add support for AX10 BMC Secure Updates to Intel M10 BMC
 
  - Removed Device Support
    - Remove Arizona Extcon support from MFD
    - Remove ST-E AB8500 Power Supply code from MFD
    - Remove AB3100 altogether
 
  - New Functionality
    - Add support for SMBus and I2C modes to Dialog DA9063
    - Switch to using Software Nodes in Intel (various)
 
  - New/converted Device Tree bindings; rohm,bd71815-pmic, rohm,bd9576-pmic,
                                        netronix,ntxec, actions,atc260x,
 				       ricoh,rn5t618, qcom-pm8xxx
 
 - Fix-ups
    - Fix error handling/path; intel_pmt
    - Simplify code; rohm-bd718x7, ab8500-core, intel-m10-bmc
    - Trivial clean-ups (reordering, spelling); rohm-generic, rn5t618, max8997
    - Use correct data-type; db8500-prcmu
    - Remove superfluous code; lp87565, intel_quark_i2c_gpi, lpc_sch, twl
    - Use generic APIs/defines; lm3533-core, intel_quark_i2c_gpio
    - Regmap related fix-ups; intel-m10-bmc, sec-core
    - Reorder resource freeing during remove; intel_quark_i2c_gpio
    - Make table indexing more robust; intel_quark_i2c_gpio
    - Fix reference imbalances; arizona-irq
    - Staticify and (un)constify things; arizona-spi, stmpe, ene-kb3930,
                                         intel-lpss-acpi, intel-lpss-pci,
                                         atc260x-i2c, intel_quark_i2c_gpio
 
  - Bug Fixes
    - Fix incorrect (register) values; intel-m10-bmc
    - Kconfig related fixes; ABX500_CORE
    - Do not clear the Auto Reload Register; stm32-timers
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Merge tag 'mfd-next-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "Core Framework:
   - Add support for Software Nodes to MFD Core
   - Remove support for Device Properties from MFD Core
   - Use standard APIs in MFD Core

  New Drivers:
   - Add support for ROHM BD9576MUF and BD9573MUF PMICs
   - Add support for Netronix Embedded Controller, PWM and RTC
   - Add support for Actions Semi ATC260x PMICs and OnKey

  New Device Support:
   - Add support for DG1 PCIe Graphics Card to Intel PMT
   - Add support for ROHM BD71815 PMIC to ROHM BD71828
   - Add support for Tolino Shine 2 HD to Netronix Embedded Controller
   - Add support for AX10 BMC Secure Updates to Intel M10 BMC

  Removed Device Support:
   - Remove Arizona Extcon support from MFD
   - Remove ST-E AB8500 Power Supply code from MFD
   - Remove AB3100 altogether

  New Functionality:
   - Add support for SMBus and I2C modes to Dialog DA9063
   - Switch to using Software Nodes in Intel (various)

  New/converted Device Tree bindings:
   - rohm bd71815-pmic, rohm bd9576-pmic, netronix ntxec, actions
     atc260x, ricoh rn5t618, qcom pm8xxx

- Fix-ups:
   - Fix error handling/path; intel_pmt
   - Simplify code; rohm-bd718x7, ab8500-core, intel-m10-bmc
   - Trivial clean-ups (reordering, spelling); rohm-generic, rn5t618,
     max8997
   - Use correct data-type; db8500-prcmu
   - Remove superfluous code; lp87565, intel_quark_i2c_gpi, lpc_sch, twl
   - Use generic APIs/defines; lm3533-core, intel_quark_i2c_gpio
   - Regmap related fix-ups; intel-m10-bmc, sec-core
   - Reorder resource freeing during remove; intel_quark_i2c_gpio
   - Make table indexing more robust; intel_quark_i2c_gpio
   - Fix reference imbalances; arizona-irq
   - Staticify and (un)constify things; arizona-spi, stmpe, ene-kb3930,
     intel-lpss-acpi, intel-lpss-pci, atc260x-i2c, intel_quark_i2c_gpio

  Bug Fixes:
   - Fix incorrect (register) values; intel-m10-bmc
   - Kconfig related fixes; ABX500_CORE
   - Do not clear the Auto Reload Register; stm32-timers"

* tag 'mfd-next-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (84 commits)
  mfd: intel-m10-bmc: Add support for MAX10 BMC Secure Updates
  Revert "mfd: max8997: Add of_compatible to Extcon and Charger mfd_cell"
  mfd: twl: Remove unused inline function twl4030charger_usb_en()
  dt-bindings: mfd: Convert pm8xxx bindings to yaml
  dt-bindings: mfd: Add compatible for pmk8350 rtc
  i2c: designware: Get rid of legacy platform data
  mfd: intel_quark_i2c_gpio: Convert I²C to use software nodes
  mfd: lpc_sch: Partially revert "Add support for Intel Quark X1000"
  mfd: arizona: Fix rumtime PM imbalance on error
  mfd: max8997: Replace 8998 with 8997
  mfd: core: Use acpi_find_child_device() for child devices lookup
  mfd: intel_quark_i2c_gpio: Don't play dirty trick with const
  mfd: intel_quark_i2c_gpio: Enable MSI interrupt
  mfd: intel_quark_i2c_gpio: Reuse BAR definitions for MFD cell indexing
  mfd: ntxec: Support for EC in Tolino Shine 2 HD
  mfd: stm32-timers: Avoid clearing auto reload register
  mfd: intel_quark_i2c_gpio: Replace I²C speeds with descriptive definitions
  mfd: intel_quark_i2c_gpio: Remove unused struct device member
  mfd: intel_quark_i2c_gpio: Unregister resources in reversed order
  mfd: Kconfig: ABX500_CORE should depend on ARCH_U8500
  ...
2021-04-28 15:59:13 -07:00
Matthew Gerlach
25b000a80b hwmon: (intel-m10-bmc-hwmon) add sensor support of Intel D5005 card
Like the Intel N3000 card, the Intel D5005 has a MAX10 based
BMC.  This commit adds support for the D5005 sensors that are
monitored by the MAX10 BMC.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Russ Weight <russell.h.weight@linux.intel.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20210413225835.459662-3-matthew.gerlach@linux.intel.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2021-04-20 06:50:14 -07:00
Matthew Gerlach
8169f74ca6 mfd: intel-m10-bmc: Add access table configuration to the regmap
This patch adds access tables to the MAX 10 BMC regmap. This prevents
the host from accessing the unwanted I/O space. It also filters out the
invalid outputs when reading the regmap debugfs interface.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-04-14 16:03:41 +01:00
Xu Yilun
5893f4d1f4 mfd: intel-m10-bmc: Simplify the legacy version reg definition
The version register is the only one in the legacy I/O space to be
accessed, so it is not necessary to define the legacy base & version
register offset. A direct definition of the legacy version register
address would be fine.

Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-04-14 16:03:39 +01:00
Russ Weight
296f5568c6 mfd: intel-m10-bmc: Expose MAC address and count
Create two sysfs entries for exposing the MAC address and count
from the MAX10 BMC register space. The MAC address is the first
in a sequential block of MAC addresses reserved for the FPGA card.
The MAC count is the number of MAC addresses in the reserved block.

Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-02-08 13:54:25 +00:00
Xu Yilun
876611c493 mfd: intel-m10-bmc: Add Intel MAX 10 BMC chip support for Intel FPGA PAC
This patch implements the basic functions of the BMC chip for some Intel
FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the
Intel MAX 10 CPLD.

This BMC chip is connected to the FPGA by a SPI bus. To provide direct
register access from the FPGA, the "SPI slave to Avalon Master Bridge"
(spi-avmm) IP is integrated in the chip. It converts encoded streams of
bytes from the host to the internal register read/write on the Avalon
bus. So This driver uses the regmap-spi-avmm for register accessing.

Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-09-30 17:46:21 +01:00