Commit graph

982047 commits

Author SHA1 Message Date
Tiezhu Yang
919af8b96c MIPS: Make definitions of MIPSInst_FMA_{FUNC,FMTM} consistent with MIPS64 manual
The kernel definitions of MIPSInst_FMA_FUNC and MIPSInst_FMA_FFMT are not
consistent with MADD.fmt, NMADD.fmt and NMSUB.fmt in the MIPS64 manual [1],
the field func is bit 5..3 and fmt is bit 2..0, fix them. Otherwise there
exists error when add new instruction simulation.

[1] https://www.mips.com/?do-download=the-mips64-instruction-set-v6-06

Reported-by: Ming Wang <wangming01@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-22 11:45:52 +01:00
Lauri Kasanen
baec970aa5 mips: Add N64 machine type
Add support for the Nintendo 64.

Signed-off-by: Lauri Kasanen <cand@gmx.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-22 11:40:00 +01:00
Lauri Kasanen
65ce6197ed Revert "MIPS: Remove unused R4300 CPU support"
This reverts commit f9065b54d4.

We're adding Nintendo 64 support, so the VR4300 is no longer unused.

Signed-off-by: Lauri Kasanen <cand@gmx.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-22 11:39:45 +01:00
Yanteng Si
a2fa4cede9 MIPS: mm: Add prototype for function __update_cache
This commit adds a prototype to fix error at W=1:

arch/mips/mm/cache.c:129:6: error: no previous prototype
for '__update_cache' [-Werror=missing-prototypes]

Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-22 11:34:52 +01:00
Thomas Bogendoerfer
fceb90bb43 MIPS: mm: abort uaccess retries upon fatal signal
When there's a fatal signal pending, MIPS's do_page_fault()
implementation returns. The intent is that we'll return to the
faulting userspace instruction, delivering the signal on the way.

However, if we take a fatal signal during fixing up a uaccess, this
results in a return to the faulting kernel instruction, which will be
instantly retried, resulting in the same fault being taken forever. As
the task never reaches userspace, the signal is not delivered, and the
task is left unkillable. While the task is stuck in this state, it can
inhibit the forward progress of the system.

To avoid this, we must ensure that when a fatal signal is pending, we
apply any necessary fixup for a faulting kernel instruction. Thus we
will return to an error path, and it is up to that code to make forward
progress towards delivering the fatal signal.

[ Description taken from commit 746a272e44 ("ARM: 8692/1: mm: abort
   uaccess retries upon fatal signal") ]

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
2021-01-22 11:34:19 +01:00
Yanteng Si
01179ca040 MIPS: IRQ: Add prototype for function init_IRQ
This commit adds a prototype to fix error at W=1:

arch/mips/kernel/irq.c:52:13: error: no previous prototype for
'init_IRQ' [-Werror=missing-prototypes]

Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-19 23:04:32 +01:00
Kevin Hao
fe82de91af Revert "MIPS: Octeon: Remove special handling of CONFIG_MIPS_ELF_APPENDED_DTB=y"
This reverts commit d9df9fb901.

For the OCTEON boards, it need to patch the built-in DTB before using
it. Previously it judges if it is a built-in DTB by checking
fw_passed_dtb. But after commit 37e5c69ffd ("MIPS: head.S: Init
fw_passed_dtb to builtin DTB", the fw_passed_dtb is initialized even
when using built-in DTB. This causes the OCTEON boards boot broken due
to an unpatched built-in DTB is used. Revert the commit d9df9fb901 to
restore the codes before the fw_passed_dtb is used and then fix this
issue.

Fixed: 37e5c69ffd ("MIPS: head.S: Init fw_passed_dtb to builtin DTB")
Cc: stable@vger.kernel.org
Suggested-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-19 23:03:18 +01:00
Alexander Lobakin
d9e84fb1a3 MIPS: relocatable: optimize the relocation process
For now, vmlinux relocation functions for relocatable kernel are
implemented as an array of handlers of a particular type.

Convert that array into a single switch-case function to:
 - remove unused arguments;
 - change the return type of simple handlers to void;
 - remove the array and don't use any data at all;
 - avoid using indirect calls;
 - allow the compiler to inline and greatly optimize
   the relocation function[s];

and also mark do_relocations() and show_kernel_relocation() static
as they aren't used anywhere else.

The result on MIPS32 R2 with GCC 10.2 -O2 is:

scripts/bloat-o-meter -c arch/mips/kernel/__relocate.o arch/mips/kernel/relocate.o
add/remove: 0/6 grow/shrink: 1/0 up/down: 356/-640 (-284)
Function                                     old     new   delta
relocate_kernel                              852    1208    +356
apply_r_mips_32_rel                           20       -     -20
apply_r_mips_hi16_rel                         40       -     -40
apply_r_mips_64_rel                           44       -     -44
apply_r_mips_26_rel                          144       -    -144
show_kernel_relocation                       164       -    -164
do_relocations                               228       -    -228
Total: Before=1780, After=1496, chg -15.96%
add/remove: 0/1 grow/shrink: 0/0 up/down: 0/-76 (-76)
Data                                         old     new   delta
reloc_handlers_rel                            76       -     -76
Total: Before=92, After=16, chg -82.61%
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
RO Data                                      old     new   delta
Total: Before=0, After=0, chg +0.00%

All functions were collapsed into the main one, relocate_kernel().

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-18 15:55:29 +01:00
Alexander Lobakin
049a68efbf MIPS: module: optimize module relocations processing
For now, module relocation functions are implemented as an array
of handlers of type reloc_handler_t.

Convert that array into a single switch-case function to:
 - remove unused arguments;
 - change the return type of simple handlers to void;
 - remove the array and don't use any data at all;
 - avoid using indirect calls;
 - allow the compiler to inline and greatly optimize
   the relocation function[s].

The result on MIPS32 R2 with GCC 10.2 -O2 is:

scripts/bloat-o-meter -c arch/mips/kernel/__module.o arch/mips/kernel/module.o
add/remove: 1/11 grow/shrink: 1/0 up/down: 876/-1436 (-560)
Function                                     old     new   delta
apply_relocate                               456    1148    +692
apply_r_mips_pc                                -     184    +184
apply_r_mips_none                              8       -      -8
apply_r_mips_32                               16       -     -16
apply_r_mips_64                               76       -     -76
apply_r_mips_highest                          88       -     -88
apply_r_mips_higher                          108       -    -108
apply_r_mips_26                              132       -    -132
apply_r_mips_pc26                            160       -    -160
apply_r_mips_pc21                            160       -    -160
apply_r_mips_pc16                            160       -    -160
apply_r_mips_hi16                            172       -    -172
apply_r_mips_lo16                            356       -    -356
Total: Before=2608, After=2048, chg -21.47%
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
Data                                         old     new   delta
Total: Before=12, After=12, chg +0.00%
add/remove: 0/1 grow/shrink: 0/0 up/down: 0/-248 (-248)
RO Data                                      old     new   delta
reloc_handlers                               248       -    -248
Total: Before=248, After=0, chg -100.00%

All functions were collapsed into a single one that is called
directly by $(srctree)/kernel/module.c.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-18 15:55:16 +01:00
Nathan Chancellor
76d7fff22b MIPS: VDSO: Use CLANG_FLAGS instead of filtering out '--target='
Commit ee67855ecd ("MIPS: vdso: Allow clang's --target flag in VDSO
cflags") allowed the '--target=' flag from the main Makefile to filter
through to the vDSO. However, it did not bring any of the other clang
specific flags for controlling the integrated assembler and the GNU
tools locations (--prefix=, --gcc-toolchain=, and -no-integrated-as).
Without these, we will get a warning (visible with tinyconfig):

arch/mips/vdso/elf.S:14:1: warning: DWARF2 only supports one section per
compilation unit
.pushsection .note.Linux, "a",@note ; .balign 4 ; .long 2f - 1f ; .long
4484f - 3f ; .long 0 ; 1:.asciz "Linux" ; 2:.balign 4 ; 3:
^
arch/mips/vdso/elf.S:34:2: warning: DWARF2 only supports one section per
compilation unit
 .section .mips_abiflags, "a"
 ^

All of these flags are bundled up under CLANG_FLAGS in the main Makefile
and exported so that they can be added to Makefiles that set their own
CFLAGS. Use this value instead of filtering out '--target=' so there is
no warning and all of the tools are properly used.

Cc: stable@vger.kernel.org
Fixes: ee67855ecd ("MIPS: vdso: Allow clang's --target flag in VDSO cflags")
Link: https://github.com/ClangBuiltLinux/linux/issues/1256
Reported-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-18 15:40:14 +01:00
Paul Cercueil
a5360958a3 MIPS: Ingenic: Disable HPTLB for D0 XBurst CPUs too
The JZ4760 has the HPTLB as well, but has a XBurst CPU with a D0 CPUID.

Disable the HPTLB for all XBurst CPUs with a D0 CPUID. In the case where
there is no HPTLB (e.g. for older SoCs), this won't have any side
effect.

Fixes: b02efeb056 ("MIPS: Ingenic: Disable abandoned HPTLB function.")
Cc: <stable@vger.kernel.org> # 5.4
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-18 15:24:02 +01:00
Aurelien Jarno
5373ae67c3 MIPS: Support binutils configured with --enable-mips-fix-loongson3-llsc=yes
From version 2.35, binutils can be configured with
--enable-mips-fix-loongson3-llsc=yes, which means it defaults to
-mfix-loongson3-llsc. This breaks labels which might then point at the
wrong instruction.

The workaround to explicitly pass -mno-fix-loongson3-llsc has been
added in Linux version 5.1, but is only enabled when building a Loongson
64 kernel. As vendors might use a common toolchain for building Loongson
and non-Loongson kernels, just move that workaround to
arch/mips/Makefile. At the same time update the comments to reflect the
current status.

Cc: stable@vger.kernel.org # 5.1+
Cc: YunQiang Su <syq@debian.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:34:20 +01:00
Nathan Chancellor
8790ccf8da MIPS: Compare __SYNC_loongson3_war against 0
When building with clang when CONFIG_CPU_LOONGSON3_WORKAROUNDS is
enabled:

 In file included from lib/errseq.c:4:
 In file included from ./include/linux/atomic.h:7:
 ./arch/mips/include/asm/atomic.h:52:1: warning: converting the result of
 '<<' to a boolean always evaluates to true
 [-Wtautological-constant-compare]
 ATOMIC_OPS(atomic64, s64)
 ^
 ./arch/mips/include/asm/atomic.h:40:9: note: expanded from macro
 'ATOMIC_OPS'
         return cmpxchg(&v->counter, o, n);
                ^
 ./arch/mips/include/asm/cmpxchg.h:194:7: note: expanded from macro
 'cmpxchg'
         if (!__SYNC_loongson3_war)
              ^
 ./arch/mips/include/asm/sync.h:147:34: note: expanded from macro
 '__SYNC_loongson3_war'
 # define __SYNC_loongson3_war   (1 << 31)
                                    ^

While it is not wrong that the result of this shift is always true in a
boolean context, it is not a problem here. Regardless, the warning is
really noisy so rather than making the shift a boolean implicitly, use
it in an equality comparison so the shift is used as an integer value.

Fixes: 4d1dbfe6cb ("MIPS: atomic: Emit Loongson3 sync workarounds within asm")
Fixes: a91f2a1dba ("MIPS: cmpxchg: Omit redundant barriers for Loongson3")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:32:47 +01:00
Alexander Lobakin
cabcff9be9 MIPS: pgtable: fix -Wshadow in asm/pgtable.h
Solves the following repetitive warning when building with -Wshadow:

In file included from ./include/linux/pgtable.h:6,
                 from ./include/linux/mm.h:33,
                 from ./include/linux/dax.h:6,
                 from ./include/linux/mempolicy.h:11,
                 from kernel/fork.c:34:
./arch/mips/include/asm/mmu_context.h: In function ‘switch_mm’:
./arch/mips/include/asm/pgtable.h:97:16: warning: declaration of ‘flags’ shadows a previous local [-Wshadow]
   97 |  unsigned long flags;      \
      |                ^~~~~
./arch/mips/include/asm/mmu_context.h:162:2: note: in expansion of macro ‘htw_stop’
  162 |  htw_stop();
      |  ^~~~~~~~
In file included from kernel/fork.c:102:
./arch/mips/include/asm/mmu_context.h:159:16: note: shadowed declaration is here
  159 |  unsigned long flags;
      |                ^~~~~

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:29:15 +01:00
Alexander Lobakin
97c97c6ab1 MIPS: bitops: fix -Wshadow in asm/bitops.h
Solves the following repetitive warning when building with -Wshadow:

In file included from ./include/linux/bitops.h:32,
                 from ./include/linux/kernel.h:11,
                 from ./include/linux/skbuff.h:13,
                 from ./include/linux/if_ether.h:19,
                 from ./include/linux/etherdevice.h:20:
./arch/mips/include/asm/bitops.h: In function ‘test_and_set_bit_lock’:
./arch/mips/include/asm/bitops.h:46:16: warning: declaration of ‘orig’ shadows a previous local [-Wshadow]
   46 |  unsigned long orig, temp;    \
      |                ^~~~
./arch/mips/include/asm/bitops.h:190:10: note: in expansion of macro ‘__test_bit_op’
  190 |   orig = __test_bit_op(*m, "%0",
      |          ^~~~~~~~~~~~~
./arch/mips/include/asm/bitops.h:185:21: note: shadowed declaration is here
  185 |  unsigned long res, orig;
      |                     ^~~~
./arch/mips/include/asm/bitops.h: In function ‘test_and_clear_bit’:
./arch/mips/include/asm/bitops.h:46:16: warning: declaration of ‘orig’ shadows a previous local [-Wshadow]
   46 |  unsigned long orig, temp;    \
      |                ^~~~
./arch/mips/include/asm/bitops.h:236:9: note: in expansion of macro ‘__test_bit_op’
  236 |   res = __test_bit_op(*m, "%1",
      |         ^~~~~~~~~~~~~
./arch/mips/include/asm/bitops.h:229:21: note: shadowed declaration is here
  229 |  unsigned long res, orig;
      |                     ^~~~
./arch/mips/include/asm/bitops.h:46:16: warning: declaration of ‘orig’ shadows a previous local [-Wshadow]
   46 |  unsigned long orig, temp;    \
      |                ^~~~
./arch/mips/include/asm/bitops.h:241:10: note: in expansion of macro ‘__test_bit_op’
  241 |   orig = __test_bit_op(*m, "%0",
      |          ^~~~~~~~~~~~~
./arch/mips/include/asm/bitops.h:229:21: note: shadowed declaration is here
  229 |  unsigned long res, orig;
      |                     ^~~~
./arch/mips/include/asm/bitops.h: In function ‘test_and_change_bit’:
./arch/mips/include/asm/bitops.h:46:16: warning: declaration of ‘orig’ shadows a previous local [-Wshadow]
   46 |  unsigned long orig, temp;    \
      |                ^~~~
./arch/mips/include/asm/bitops.h:273:10: note: in expansion of macro ‘__test_bit_op’
  273 |   orig = __test_bit_op(*m, "%0",
      |          ^~~~~~~~~~~~~
./arch/mips/include/asm/bitops.h:266:21: note: shadowed declaration is here
  266 |  unsigned long res, orig;
      |                     ^~~~

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:28:56 +01:00
Alexander Lobakin
d3a4e0f1b4 MIPS: select ARCH_WANT_LD_ORPHAN_WARN
Now, after that all the sections are explicitly described and
declared in vmlinux.lds.S, we can enable ld orphan warnings to
prevent from missing any new sections in future.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
f41b233de0 vmlinux.lds.h: catch UBSAN's "unnamed data" into data
When building kernel with both LD_DEAD_CODE_DATA_ELIMINATION and
UBSAN, LLVM stack generates lots of "unnamed data" sections:

ld.lld: warning: net/built-in.a(netfilter/utils.o): (.data.$__unnamed_2)
is being placed in '.data.$__unnamed_2'
ld.lld: warning: net/built-in.a(netfilter/utils.o): (.data.$__unnamed_3)
is being placed in '.data.$__unnamed_3'
ld.lld: warning: net/built-in.a(netfilter/utils.o): (.data.$__unnamed_4)
is being placed in '.data.$__unnamed_4'
ld.lld: warning: net/built-in.a(netfilter/utils.o): (.data.$__unnamed_5)
is being placed in '.data.$__unnamed_5'

[...]

Also handle this by adding the related sections to generic definitions.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
9a427556fb vmlinux.lds.h: catch compound literals into data and BSS
When building kernel with LD_DEAD_CODE_DATA_ELIMINATION, LLVM stack
generates separate sections for compound literals, just like in case
with enabled LTO [0]:

ld.lld: warning: drivers/built-in.a(mtd/nand/spi/gigadevice.o):
(.data..compoundliteral.14) is being placed in
'.data..compoundliteral.14'
ld.lld: warning: drivers/built-in.a(mtd/nand/spi/gigadevice.o):
(.data..compoundliteral.15) is being placed in
'.data..compoundliteral.15'
ld.lld: warning: drivers/built-in.a(mtd/nand/spi/gigadevice.o):
(.data..compoundliteral.16) is being placed in
'.data..compoundliteral.16'
ld.lld: warning: drivers/built-in.a(mtd/nand/spi/gigadevice.o):
(.data..compoundliteral.17) is being placed in
'.data..compoundliteral.17'

[...]

Handle this by adding the related sections to generic definitions
as suggested by Sami [0].

[0] https://lore.kernel.org/lkml/20201211184633.3213045-3-samitolvanen@google.com

Suggested-by: Sami Tolvanen <samitolvanen@google.com>
Suggested-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
795b3a363b MIPS: vmlinux.lds.S: explicitly declare .got table
LLVM stack generates GOT table when building the kernel:

ld.lld: warning: <internal>:(.got) is being placed in '.got'

According to the debug assertions, it's not zero-sized and thus can't
be handled the way it's done for x86.
Also use the ARM64 path here and place it at the end of .text section.

Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
008c3cbd5e MIPS: vmlinux.lds.S: explicitly catch .rel.dyn symbols
According to linker warnings, both GCC and LLVM generate '.rel.dyn'
symbols:

mips-alpine-linux-musl-ld: warning: orphan section `.rel.dyn'
from `init/main.o' being placed in section `.rel.dyn'

Link-time assertion shows that this section is sometimes empty,
sometimes not, depending on machine bitness and the compiler [0]:

  LD      .tmp_vmlinux.kallsyms1
mips64-linux-gnu-ld: Unexpected run-time relocations (.rel) detected!

Just use the ARM64 approach and declare it in vmlinux.lds.S closer
to __init_end.

[0] https://lore.kernel.org/linux-mips/20210109111259.GA4213@alpha.franken.de

Reported-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
894ef53001 MIPS: properly stop .eh_frame generation
Commit 866b6a89c6 ("MIPS: Add DWARF unwinding to assembly") added
-fno-asynchronous-unwind-tables to KBUILD_CFLAGS to prevent compiler
from emitting .eh_frame symbols.
However, as MIPS heavily uses CFI, that's not enough. Use the
approach taken for x86 (as it also uses CFI) and explicitly put CFI
symbols into the .debug_frame section (except for VDSO).
This allows us to drop .eh_frame from DISCARDS as it's no longer
being generated.

Fixes: 866b6a89c6 ("MIPS: Add DWARF unwinding to assembly")
Suggested-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
5629d41838 MIPS: vmlinux.lds.S: add ".gnu.attributes" to DISCARDS
Discard GNU attributes (MIPS FP type, GNU Hash etc.) at link time
as kernel doesn't use it at all.
Solves a dozen of the following ld warnings (one per every file):

mips-alpine-linux-musl-ld: warning: orphan section `.gnu.attributes'
from `arch/mips/kernel/head.o' being placed in section
`.gnu.attributes'
mips-alpine-linux-musl-ld: warning: orphan section `.gnu.attributes'
from `init/main.o' being placed in section `.gnu.attributes'

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
ee90fef189 MIPS: CPS: don't create redundant .text.cps-vec section
A number of symbols from arch/mips/kernel/cps-vec.S is explicitly
placed into '.text.cps-vec' section.
There are no direct references to this section, so there's no need
to form it. '.balign 0x1000' directive will work anyway.

Moreover, this section was being placed in vmlinux differently
depending on CONFIG_LD_DEAD_CODE_DATA_ELIMINATION:
 - with this option enabled, '.text.cps-vec' was being caught
   by '.text.[0-9a-zA-Z_]*' from include/asm-generic/vmlinux.lds.h;
 - without this option, '.text.cps-vec' was being caught
   by discouraging '.text.*' from arch/mips/kernel/vmlinux.lds.S.

'.text.*' should not be used in vmlinux linker scripts at all as it
silently catches any orphan text sections.
So, remove both '.section .text.cps-vec' and '.text.*' from cps-vec.S
and vmlinux.lds.S respectively. As said, this does not affect related
functions alignment:

80116000 T mips_cps_core_entry
80116028 t not_nmi
80116200 T excep_tlbfill
80116280 T excep_xtlbfill
80116300 T excep_cache
80116380 T excep_genex
80116400 T excep_intex
80116480 T excep_ejtag
80116490 T mips_cps_core_init

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:54 +01:00
Alexander Lobakin
8ac7c87acd MIPS: vmlinux.lds.S: add missing PAGE_ALIGNED_DATA() section
MIPS uses its own declaration of rwdata, and thus it should be kept
in sync with the asm-generic one. Currently PAGE_ALIGNED_DATA() is
missing from the linker script, which emits the following ld
warnings:

mips-alpine-linux-musl-ld: warning: orphan section
`.data..page_aligned' from `arch/mips/kernel/vdso.o' being placed
in section `.data..page_aligned'
mips-alpine-linux-musl-ld: warning: orphan section
`.data..page_aligned' from `arch/mips/vdso/vdso-image.o' being placed
in section `.data..page_aligned'

Add the necessary declaration, so the mentioned structures will be
placed in vmlinux as intended:

ffffffff80630580 D __end_once
ffffffff80630580 D __start___dyndbg
ffffffff80630580 D __start_once
ffffffff80630580 D __stop___dyndbg
ffffffff80634000 d mips_vdso_data
ffffffff80638000 d vdso_data
ffffffff80638580 D _gp
ffffffff8063c000 T __init_begin
ffffffff8063c000 D _edata
ffffffff8063c000 T _sinittext

->

ffffffff805a4000 D __end_init_task
ffffffff805a4000 D __nosave_begin
ffffffff805a4000 D __nosave_end
ffffffff805a4000 d mips_vdso_data
ffffffff805a8000 d vdso_data
ffffffff805ac000 D mmlist_lock
ffffffff805ac080 D tasklist_lock

Fixes: ebb5e78cc6 ("MIPS: Initial implementation of a VDSO")
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Reviewed-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Cc: stable@vger.kernel.org # 4.4+
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-15 15:27:53 +01:00
Martin Blumenstingl
e91fd6ddb7 MIPS: lantiq: irq: register the interrupt controllers with irqchip_init
Add support for more interrupt controllers by switching from
of_irq_init() to irqchip_init() in Lantiq's arch_init_irq(). This
requires switching the ICU interrupt controller to use
IRQCHIP_DECLARE(), like a real irqchip driver would do.

This is needed for future changes when new irqchip drivers are
implemented:
- a dedicated driver for the EIU interrupt controller
- a driver for the MSI PIC (Programmable Interrupt Controller) found on
  VRX200 and newer SoCs
- ..or any other driver which uses IRQCHIP_DECLARE

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-13 11:06:12 +01:00
Aleksander Jan Bajkowski
6b5ea5b7a7 dt-bindings: mips: lantiq: Document Lantiq Xway DMA bindings
Document the Lantiq Xway SoC DMA Controller DT bindings.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-13 11:05:19 +01:00
Aleksander Jan Bajkowski
dea44af8d2 dt-bindings: mips: lantiq: Document Lantiq Xway EBU bindings
Document the Lantiq Xway SoC series External Bus Unit (EBU) bindings.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-13 11:05:04 +01:00
Aleksander Jan Bajkowski
b212b45da3 dt-bindings: mips: lantiq: Document Lantiq Xway CGU bindings
Document the Lantiq Xway SoC series Clock Generation Unit (CGU) bindings.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-13 11:04:51 +01:00
Aleksander Jan Bajkowski
6f6b3ed55a dt-bindings: mips: lantiq: Document Lantiq Xway PMU bindings
Document the Lantiq Xway SoC series Power Management Unit (PMU) bindings.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-13 11:04:02 +01:00
Geert Uytterhoeven
99b40ced9e MIPS: bitops: Fix reference to ffz location
Unlike most other architectures, MIPS defines ffz() below ffs().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-09 12:04:03 +01:00
Alexander Lobakin
ccb2177486 MIPS: UAPI: unexport unistd_nr_{n32,n64,o32}.h
unistd_nr_{n32,n64,o32}.h are needed only by include/asm/unistd.h,
which is a kernel-side header file, and their contents is generally
not for userland use.
Move their target destination from include/generated/uapi/asm/ to
include/generated/asm/ to disable exporting them as UAPI headers.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-07 17:14:56 +01:00
Nathan Chancellor
c6f2a9e17b MIPS: lantiq: Explicitly compare LTQ_EBU_PCC_ISTAT against 0
When building xway_defconfig with clang:

arch/mips/lantiq/irq.c:305:48: error: use of logical '&&' with constant
operand [-Werror,-Wconstant-logical-operand]
        if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT)
                                                      ^ ~~~~~~~~~~~~~~~~~
arch/mips/lantiq/irq.c:305:48: note: use '&' for a bitwise operation
        if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT)
                                                      ^~
                                                      &
arch/mips/lantiq/irq.c:305:48: note: remove constant to silence this
warning
        if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT)
                                                     ~^~~~~~~~~~~~~~~~~~~~
1 error generated.

Explicitly compare the constant LTQ_EBU_PCC_ISTAT against 0 to fix the
warning. Additionally, remove the unnecessary parentheses as this is a
simple conditional statement and shorthand '== 0' to '!'.

Fixes: 3645da0276 ("OF: MIPS: lantiq: implement irq_domain support")
Link: https://github.com/ClangBuiltLinux/linux/issues/807
Reported-by: Dmitry Golovin <dima@golovin.in>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-07 17:14:35 +01:00
Yanteng Si
3b31bb6bb5 MIPS: init: move externs to header file
This commit fixes the following checkpatch warnings:

    WARNING: externs should be avoided in .c files

    This is a warning for placing declarations in a ".c" file.
    This fix removes the declaration in ".c" and adds it to
    the common header file.

Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-07 17:12:51 +01:00
Jinyang He
fdd85e04df MIPS: zboot: Avoid endless loop in clear BSS.
Commit 2ee1503e54 ("MIPS: zboot: head.S clean up").

After .noreorder removed, clear BSS fall into endless loop. The bne
instruction will add nop to the delay slot at compile time. So a0
register will not increment by 4. Fix it and clear BSS from _edata
to (_end - 1).

Signed-off-by: Jinyang He <hejinyang@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-07 17:12:14 +01:00
Thomas Bogendoerfer
a6e83acee2 MIPS: Remove empty prom_free_prom_memory functions
Most of the prom_free_prom_memory functions are empty. With
a new weak prom_free_prom_memory() we can remove all of them.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
2021-01-07 17:11:33 +01:00
Nathan Chancellor
c58734eee6 MIPS: c-r4k: Fix section mismatch for loongson2_sc_init
When building with clang, the following section mismatch warning occurs:

WARNING: modpost: vmlinux.o(.text+0x24490): Section mismatch in
reference from the function r4k_cache_init() to the function
.init.text:loongson2_sc_init()

This should have been fixed with commit ad4fddef5f ("mips: fix Section
mismatch in reference") but it was missed. Remove the improper __init
annotation like that commit did.

Fixes: 078a55fc82 ("MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code")
Link: https://github.com/ClangBuiltLinux/linux/issues/787
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-07 17:10:55 +01:00
Nathan Chancellor
d422c6c064 MIPS: Use address-of operator on section symbols
When building xway_defconfig with clang:

arch/mips/lantiq/prom.c:82:23: error: array comparison always evaluates
to true [-Werror,-Wtautological-compare]
        else if (__dtb_start != __dtb_end)
                             ^
1 error generated.

These are not true arrays, they are linker defined symbols, which are
just addresses. Using the address of operator silences the warning
and does not change the resulting assembly with either clang/ld.lld
or gcc/ld (tested with diff + objdump -Dr). Do the same thing across
the entire MIPS subsystem to ensure there are no more warnings around
this type of comparison.

Link: https://github.com/ClangBuiltLinux/linux/issues/1232
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-07 17:10:36 +01:00
siyanteng
ecd3e70974 MIPS: loongson64: smp.c: Fix block comment coding style
This patch fixes:
"WARNING: Block comments use a trailing */ on a separate line"
by checkpatch.pl

Signed-off-by: siyanteng <siyanteng@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:38:42 +01:00
Jiaxun Yang
0ea33321ff MIPS: Kill RM7K & RM9K IRQ Code
RM7000 IRQ driver never got really used by any of the platform,
and rm9k_cpu_irq_init only exist in a header.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:37:27 +01:00
Jia Qingtong
c2b49a3237 MIPS: perf: Add support for OCTEON III perf events.
According to Hardware Reference Manual, OCTEON III
are mostly same as previous OCTEON models. So just
enable them and extend supported event code.
0x3e and 0x3f still reserved.

Signed-off-by: Jia Qingtong <jiaqingtong97@163.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:32:57 +01:00
Jiaxun Yang
68324a68fb MIPS: Loongson64: Set cluster for cores
cluster is required for cacheinfo to set shared_cpu_map correctly.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:24:17 +01:00
Jiaxun Yang
e8bb8f2823 MIPS: cacheinfo: Add missing VCache
Victim Cache is defined by Loongson as per-core unified
private Cache.
Add this into cacheinfo and make cache levels selfincrement
instead of hardcode levels.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:23:52 +01:00
Jiaxun Yang
2ee1503e54 MIPS: zboot: head.S clean up
.cprestore is removed as we don't expect Position Independent
zboot ELF.

.noreorder is also removed and rest instructions are massaged
to improve readability.

t9 register is used for indirect jump as MIPS ABI requirement.

start label is removed as it already defined in LEAF.

Reported-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:16:03 +01:00
Tiezhu Yang
cf8194e46c MIPS: Loongson64: Give chance to build under !CONFIG_NUMA and !CONFIG_SMP
In the current code, we can not build under !CONFIG_NUMA and !CONFIG_SMP
on the Loongson64 platform, it seems bad for the users who just want to
use pure single core (not nosmp) to debug, so do the following things to
give them a chance:

(1) Do not select NUMA and SMP for MACH_LOONGSON64 in Kconfig, make NUMA
depends on SMP, and then just set them in the loongson3_defconfig.
(2) Move szmem() from numa.c to init.c and add prom_init_memory() under
!CONFIG_NUMA.
(3) Clean up szmem() due to the statements of case SYSTEM_RAM_LOW and
SYSTEM_RAM_HIGH are the same.
(4) Remove the useless declaration of prom_init_memory() and add the
declaration of szmem() in loongson.h to avoid build error.

Signed-off-by: Youling Tang <tangyouling@loongson.cn>
Signed-off-by: Jinyang He <hejinyang@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-04 11:15:07 +01:00
Tiezhu Yang
dbafd5105c MIPS: No need to check CPU 0 in cps_cpu_disable()
After commit 9cce844abf ("MIPS: CPU#0 is not hotpluggable"),
c->hotpluggable is 0 for CPU 0 and it will not generate a control
file in sysfs for this CPU:

[root@linux loongson]# cat /sys/devices/system/cpu/cpu0/online
cat: /sys/devices/system/cpu/cpu0/online: No such file or directory
[root@linux loongson]# echo 0 > /sys/devices/system/cpu/cpu0/online
bash: /sys/devices/system/cpu/cpu0/online: Permission denied

So no need to check CPU 0 in cps_cpu_disable(), just remove it.

Reported-by: liwei (GF) <liwei391@huawei.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-12-28 22:34:09 +01:00
Zheng Yongjun
a2d029b16c mips: pci: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-12-28 22:33:43 +01:00
Zheng Yongjun
3a845b30bc mips: kernel: convert comma to semicolon
Replace a comma between expression statements by a semicolon.

Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-12-28 22:32:28 +01:00
Linus Torvalds
5c8fe583cc Linux 5.11-rc1 2020-12-27 15:30:22 -08:00
Linus Torvalds
14e3e989f6 proc mountinfo: make splice available again
Since commit 36e2c7421f ("fs: don't allow splice read/write without
explicit ops") we've required that file operation structures explicitly
enable splice support, rather than falling back to the default handlers.

Most /proc files use the indirect 'struct proc_ops' to describe their
file operations, and were fixed up to support splice earlier in commits
40be821d627c..b24c30c67863, but the mountinfo files interact with the
VFS directly using their own 'struct file_operations' and got missed as
a result.

This adds the necessary support for splice to work for /proc/*/mountinfo
and friends.

Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com>
Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-27 12:00:36 -08:00
Linus Torvalds
52cd5f9c22 Big fix for IDT NTB and Intel NTB LTR management support
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Merge tag 'ntb-5.11' of git://github.com/jonmason/ntb

Pull NTB fixes from Jon Mason:
 "Bug fix for IDT NTB and Intel NTB LTR management support"

* tag 'ntb-5.11' of git://github.com/jonmason/ntb:
  ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
  ntb: idt: fix error check in ntb_hw_idt.c
2020-12-27 09:22:55 -08:00