Commit Graph

20 Commits

Author SHA1 Message Date
Qipan Li ec2b50cad1 ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
this patch adds lost usp1_uart_nostreamctrl pin group for atlas6, which
matches with the change in drivers/pinctrl/sirf/pinctrl-atlas6.c.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-01-09 20:04:12 +08:00
Xianglong Du 423ef7914e ARM: dts: sirf: add lost minigpsrtc device node
This patch adds lost minigpsrtc device node for prima2 and atlas6,
which is behind rtc-iobg and whose offset is 2000.

Signed-off-by: Xianglong Du <Xianglong.Du@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-01-09 19:55:52 +08:00
Rongjun Ying 683659f3e0 ARM: dts: sirf: add clock, frequence-voltage table for CPU0
prima2 and atlas6 uses cpufreq_cpu0, here we put related clock, operation
points in dtsi.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-01-09 19:55:47 +08:00
Bin Shi 7f97c30345 ARM: dts: sirf: add lost bus_width, clock and status for sdhci
some nodes missed bus_width, clocks and status properties, here we fix them
in prima2 and atlas6 dtsi.

Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-01-09 19:55:41 +08:00
Barry Song 794f8b21a3 ARM: dts: sirf: add lost clocks for cphifbg
This patch adds lost clocks property(index 42) for cphifbg node in prima2 and
atlas6 dtsi.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-01-09 19:55:36 +08:00
Linus Torvalds 8a5dc585d5 Main pin control pull request for the v3.13 cycle:
- Blackfin ADI pin control driver, we move yet another
   architecture under this subsystem umbrella.
 
 - Incremental updates to the Renesas Super-H PFC pin control
   driver. New subdriver for the r8a7791 SoC.
 
 - Non-linear GPIO ranges from the gpiolib side of things,
   this enabled simplified device tree bindings by referring
   entire groups of pins on some pin controller to act as
   back-end for a certain GPIO-chip driver.
 
 - Add the Abilis TB10x pin control driver used on the ARC
   architecture. Also the corresponding GPIO driver is merged
   through this tree, so the ARC has full support for pins
   and GPIOs after this.
 
 - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin
   controller instances. The i.MX1 and i.MX27 is an entirely
   new family (silicon) of controllers whereas i.MX50 is
   a variant of the previous supported controller.
 
 - Then the usual slew of fixes, cleanups and incremental
   updates.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.15 (GNU/Linux)
 
 iQIcBAABAgAGBQJSgHrbAAoJEEEQszewGV1zX/gP/R4mAl5rixzu7RDC0nlUHz2S
 F7zf3nhtsAM9GnvJjh9lE43nrisDdCnnBMFeqb7fEr3sp3j+BjQZLp4w/gbkakfY
 6xx6dQ+1+fGojd/gqZI9Le6afpBasAz2E8trariOXW5TmET9ai1y9JCmE2l9K3xA
 jX3h138iUZ4SihBW7c/Ib46TWfe7vaeAF0WKpfNie/uMHYyc+nXQXNNvtzxtk+N3
 +MMuxr9io+d3OyORHD5PlbwWs+jhEPKXfy/isudlkeGbPrA+CMxTCmRc5iu8AvTv
 L0wE6FnBhrdbTUHp9fGmdo1sxmIsijYbbc16yVQOn5kAr/hZvmltjV8efBytEep/
 268ruds2l3TWypaPotuj8Z3Fxm0Jr/+tcQ9Ck8CTMdrGG3J5D78U8fLwVKTcfzJ5
 QjaG0c39MYBbDPO29wfr93MJF7BoNm0D4AyypOCQiH17jL0Q7sXMpeW2WYqlgFf7
 uIWnN3Vsh5V4DcYSCrXoHtts1Wn7i8QEkjyj5gQYvXBU47vGToX5xO6Llvr34lVV
 VGMhivC3f5Z1UmTImwhi+FkfdDVwBYEuiAo3J9ezGvls4Ywq4AjZV/QZB563CztE
 riZ/Xpw3djrxMLKMjGvebTRGpFHcVoh9XV3FetIk+2SCyK7DK1jyYRE1+tvKudAF
 TEIV8476kb7xIVbKt8Oy
 =z9SM
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "Main pin control pull request for the v3.13 cycle.

  The changes hitting arch/blackfin are ACKed by the Blackfin
  maintainer, and the device tree bindings are ACKed to the extent
  possible by someone from the device tree maintainers group.

   - Blackfin ADI pin control driver, we move yet another architecture
     under this subsystem umbrella.

   - Incremental updates to the Renesas Super-H PFC pin control driver.
     New subdriver for the r8a7791 SoC.

   - Non-linear GPIO ranges from the gpiolib side of things, this
     enabled simplified device tree bindings by referring entire groups
     of pins on some pin controller to act as back-end for a certain
     GPIO-chip driver.

   - Add the Abilis TB10x pin control driver used on the ARC
     architecture.  Also the corresponding GPIO driver is merged through
     this tree, so the ARC has full support for pins and GPIOs after
     this.

   - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller
     instances.  The i.MX1 and i.MX27 is an entirely new family
     (silicon) of controllers whereas i.MX50 is a variant of the
     previous supported controller.

   - Then the usual slew of fixes, cleanups and incremental updates"

The ARC DT changes are apparently still pending, that hopefully gets
sorted out in a timely manner.

* tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
  pinctrl: imx50: add pinctrl support code for the IMX50 SoC
  pinctrl: at91: copy define to driver
  pinctrl: remove minor dead code
  pinctrl: imx: fix using pin->input_val wrongly
  pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe()
  gpio: tb10x: fix return value check in tb10x_gpio_probe()
  gpio: tb10x: use module_platform_driver to simplify the code
  pinctrl: imx27: imx27 pincontrol driver
  pinctrl: imx1 core driver
  pinctrl: sh-pfc: r8a7791 PFC support
  sh-pfc: r8a7778: Add CAN pin groups
  gpio: add TB10x GPIO driver
  pinctrl: at91: correct a few typos
  pinctrl: mvebu: remove redundant of_match_ptr
  pinctrl: tb10x: use module_platform_driver to simplify the code
  pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe()
  pinctrl: add documentation for pinctrl_get_group_pins()
  pinctrl: rockchip: emulate both edge triggered interrupts
  pinctrl: rockchip: add rk3188 specifics
  pinctrl: rockchip: remove redundant check
  ...
2013-11-12 15:40:03 +09:00
Barry Song 6f4251158a ARM: dts: sirf: add missed cell, cs and dma channel for SPI nodes
here we need to add missed cell, cs and dma channels prop in SPI nodes
to match with drivers.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-29 12:40:58 -07:00
Jiansong Chen 304ec42fe9 ARM: dts: sirf: add missed graphics2d iobg in atlas6 dts
there is a bus bridge for graphics 2D module lost in current dts, this patch takes it
back.

Signed-off-by: Jiansong Chen <jiansong.chen@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-29 12:40:57 -07:00
Barry Song 0671840cce ARM: dts: sirf: add missed chhifbg node in prima2 and atlas6 dts
CPHIF(Cell phone interface) is behind sys bridge, this patch adds the
missed node.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-29 12:40:57 -07:00
Ye He 5fadea2286 ARM: dts: sirf: add missed memcontrol-monitor node in prima2 and atlas6 dts
memcontrol-monitor provides the ability of monitoring the memory bandwidth.

Signed-off-by: Ye He <ye.he@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-29 12:40:56 -07:00
Linus Walleij bfabb59433 Linux 3.12-rc4
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQEcBAABAgAGBQJSUc9zAAoJEHm+PkMAQRiG9DMH/AtpuAF6LlMRPjrCeuJQ1pyh
 T0IUO+CsLKO6qtM5IyweP8V6zaasNjIuW1+B6IwVIl8aOrM+M7CwRiKvpey26ldM
 I8G2ron7hqSOSQqSQs20jN2yGAqQGpYIbTmpdGLAjQ350NNNvEKthbP5SZR5PAmE
 UuIx5OGEkaOyZXvCZJXU9AZkCxbihlMSt2zFVxybq2pwnGezRUYgCigE81aeyE0I
 QLwzzMVdkCxtZEpkdJMpLILAz22jN4RoVDbXRa2XC7dA9I2PEEXI9CcLzqCsx2Ii
 8eYS+no2K5N2rrpER7JFUB2B/2X8FaVDE+aJBCkfbtwaYTV9UYLq3a/sKVpo1Cs=
 =xSFJ
 -----END PGP SIGNATURE-----

Merge tag 'v3.12-rc4' into devel

Linux 3.12-rc4
2013-10-08 13:27:11 +02:00
Rong Wang 6a08a92ec4 pinctrl: sirf: add USB1/UART1 pinmux usb/uart share
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1).
here we add this pinmux capability.
USB1/UART1 mode selection has dedicated control register in RSC module, here we attach
the register offset of private data of related pin groups.

Signed-off-by: Rong Wang <Rong.Wang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-08 10:19:26 +02:00
Renwei Wu 262bcc1d6f ARM: dts: sirf: fix interrupt and dma prop of VIP for prima2 and atlas6
the current dts is lacking interrupt and dma prop for video input
processor of prima2 and atlas6, this patch fixes it.

Signed-off-by: Renwei Wu <Renwei.Wu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-09-30 09:17:49 -07:00
Qipan Li a136997841 ARM: dts: sirf: fix fifosize, clks, dma channels for UART
sirf uart and usp-based uart driver with full dma support has
hit 3.12, here we fix the fifosize, dma channels for some HW
prop.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-09-30 09:17:48 -07:00
Linus Walleij 6ad30ce046 Linux 3.11-rc7
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iQEcBAABAgAGBQJSGqS5AAoJEHm+PkMAQRiGFxEH/3VrqF6WAkcviNiW/0DCdO8k
 v6Wi7Sp5LxVkwzmOCHCV1tTHwLRlH3cB9YmJlGQ0kHCREaAuEQAB0xJXIW7dnyYj
 Qq7KoRZEMe3wizmjEsj8qsrhfMLzHjBw67hBz2znwW/4P7YdgzwD7KRiEat+yRC9
 ON3nNL2zIqpfk92RXvVrSVl4KMEM+WNbOfiffgBiEP24Ja1MJMFH1d4i6hNOaB0x
 9Pb3Lw8let92x+8Ao5jnjKdKMgVsoZWbN/TgQR8zZOHM38AGGiDgk18vMz+L+hpS
 jqfjckxj1m30jGq0qZ9ZbMZx3IGif4KccVr30MqNHJpwi6Q24qXvT3YfA3HkstM=
 =nAab
 -----END PGP SIGNATURE-----

Merge tag 'v3.11-rc7' into devel

Merged in this to avoid conflicts with the big locking fixes
from upstream.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Conflicts:
	drivers/pinctrl/pinctrl-sunxi.c
2013-08-29 09:46:30 +02:00
Qipan Li 031b8ce01b pinctrl: sirf: add lost atlas6 uart0-no-stream-control pingroup
the old codes defined uart0_nostreamctrl_pins, but missed pingroup
and padmux definition for it. this patch fixes it.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23 08:56:27 +02:00
Barry Song c8078de853 arm/dts: sirf: fix the pingroup name mismatch between drivers and dts
in drivers/pinctrl/sirf, pingroup name is cko0 and cko1, but in dts, they
are cko0 and cko1_rst. this patch fixes the error in dts.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22 00:53:32 +02:00
Qipan Li d58e9a02e1 pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl
this patch adds the lost pin group which supports to let USP0 to simulate
a UART without hardware flow control.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-22 00:52:19 +02:00
Xianglong Du e88b815e01 drivers/rtc/rtc-sirfsoc.c: add rtc drivers for CSR SiRFprimaII and SiRFatlasVI
On CSR SiRFprimaII/atlasVI, there is a programmable 16-bit divider
(RTC_DIV) that divides the input 32.768KHz clock to the frequency that
users need (E.g.  1 Hz).  The divided real-time clock will be used to
drive a 32-bit counter (RTC_COUNTER) that provides users with the actual
time.

In each cycle of the divided real-time clock, there is a Hertz interrupt
generated to the RISC.  Users can also configure an alarm (RTC_ALARM).
When RTC_COUNTER matches the alarm, there will be an alarm interrupt
generated to the RISC.

The system RTC can generate an alarm wake-up signal to notify the power
controller to wake up from power saving mode.

Signed-off-by: Xianglong Du <Xianglong.Du@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03 16:08:01 -07:00
Barry Song 5fa2f9af76 ARM/dts: prima2: add .dtsi for atlas6 and .dts for atla6-evb board
atlas6.dtsi is basically a copy of prima2.dtsi as most components are
compatible with prima2 except that:
1. node of l2 cache is deleted
2. node multimedia engine is deleted
3. node of sata is deleted
4. node of sdmmc4 is deleted
5. powervr is moved to "powervr,sgx510"
6. pinctrl is moved to atlas6 as pinmux layout has big changes in
   atlas6
7. clock is moved to atlas6 as clock layout has changes in atlas6

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Jiansong Chen <Jiansong.Chen@csr.com>
2013-03-18 17:15:33 +01:00