Core changes:
- Minor but nice and important documentation clean-ups.
New drivers:
- New subdriver for the Qualcomm SDM670 SoC.
- New subdriver for the Intel Moorefield SoC.
- New trivial support for the NXP Freescale i.MXRT1170 SoC.
Other changes and improvements
- A major clean-up of the Qualcomm pin control device tree bindings
by Krzysztof.
- A major header clean-up by Andy.
- Some immutable irqchip clean-up for the Actions Semiconductor
and Nuvoton drivers.
- GPIO helpers for The Cypress cy8c95x0 driver.
- Bias handling in the Mediatek MT7986 driver.
- Remove the unused pins-are-numbered concept that never flew.
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Merge tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"The two large chunks is the header clean-up from Andy and the Qualcomm
DT bindings clean-up from Krzysztof. Each which could give rise to
conflicts, but I haven't seen any.
The YAML conversions happening around the device tree is the biggest
item in the series and is the result of Rob Herrings ambition to
autovalidate these trees against strict schemas and it is paying off
in lots of bugs found and ever prettier device trees. Sooner or later
the transition will be complete, Krzysztof is fixing up all of the
Qualcomm stuff, which is pretty voluminous.
Core changes:
- minor but nice and important documentation clean-ups
New drivers:
- subdriver for the Qualcomm SDM670 SoC
- subdriver for the Intel Moorefield SoC
- trivial support for the NXP Freescale i.MXRT1170 SoC
Other changes and improvements
- major clean-up of the Qualcomm pin control device tree bindings by
Krzysztof
- major header clean-up by Andy
- some immutable irqchip clean-up for the Actions Semiconductor and
Nuvoton drivers
- GPIO helpers for The Cypress cy8c95x0 driver
- bias handling in the Mediatek MT7986 driver
- remove the unused pins-are-numbered concept that never flew"
* tag 'pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (231 commits)
pinctrl: thunderbay: fix possible memory leak in thunderbay_build_functions()
dt-bindings: pinctrl: st,stm32: Deprecate pins-are-numbered
dt-bindings: pinctrl: mediatek,mt65xx: Deprecate pins-are-numbered
pinctrl: stm32: Remove check for pins-are-numbered
pinctrl: mediatek: common: Remove check for pins-are-numbered
pinctrl: qcom: remove duplicate included header files
pinctrl: sunxi: d1: Add CAN bus pinmuxes
pinctrl: loongson2: Fix some const correctness
pinctrl: pinconf-generic: add missing of_node_put()
pinctrl: intel: Enumerate PWM device when community has a capability
pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe()
pwm: lpss: Allow other drivers to enable PWM LPSS
pwm: lpss: Include headers we are the direct user of
pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS
pwm: Add a stub for devm_pwmchip_add()
pinctrl: k210: call of_node_put()
pinctrl: starfive: Use existing variable gpio
dt-bindings: pinctrl: semtech,sx150xq: fix match patterns for 16 GPIOs matching
pinconf-generic: fix style issues in pin_config_param doc
pinctrl: pinctrl-loongson2: fix Kconfig dependency
...
Remove the check for the unnecessary pins-are-numbered Devicetree property.
Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20221129023401.278780-2-bero@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The kernel test robot complains that in certain combinations
when building the Mediatek drivers as modules we lack some
debounce table symbols, so export them.
Reported-by: kernel test robot <lkp@intel.com>
Fixes: e1ff91f9d2 ("pinctrl: mediatek: Fix EINT pins input debounce time configuration")
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The External Interrupt Controller (EINTC) on all of the supported
MediaTek SoCs does support input debouncing, but not all of them
index the debounce time values (DBNC_SETTING registers) the same way.
Before this change, in some cases, as an example, requesting a debounce
time of 16 milliseconds would mistakenly set the relative DBNC_SETTING
register to 0x2, resulting in a way shorter debounce time of 500uS.
To fix the aforementioned issue, define three different debounce_time
arrays, reflecting the correct register index for each value and for
each register index variant, and make sure that each SoC pinctrl
driver uses the right one.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221111094106.18486-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
add SoC specify 'pull_type' attribute for bias configuration.
This patch add pull_type attribute to pinctrl-mt7986.c, and make
bias_set_combo and bias_get_combo available to mediatek MT7986 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-7-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo
and mtk_pinconf_bias_get_combo, and make the functions able to support
almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c.
This patch enables pinctrl_moore to support these functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-6-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Correct the bias-pull-up, bias-pull-down and bias-disable register
offset of mt7986 pin-42 to pin-49, in the original driver, the
relative offset value was erroneously decremented by 1.
Fixes: 360de67280 ("pinctrl: mediatek: add support for MT7986 SoC")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-5-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In pinctrl-paris we're calling the .bias_set_combo() callback when we
are asked to set the pin bias to either pull up/down or pull disable.
On newer platforms, this callback is mtk_pinconf_bias_set_combo(),
located in pinctrl-mtk-common-v2.c: this will check the "pull type"
assigned to the requested pin and in case said pin's pull type is
MTK_PULL_PU_PD_RSEL_TYPE, this function will set RSEL first, PUPD
last, which is fine.
The issue comes when we're requesting PIN_CONFIG_BIAS_DISABLE, as
this does *not* require setting RSEL but only PU_PD: in this case,
the arg is MTK_DISABLE (zero), which is not a supported RSEL, due
to which function mtk_pinconf_bias_set_rsel() returns a failure;
because of that, mtk_pinconf_bias_set_pu_pd() is never called,
hence the pin bias is never set to DISABLE.
To fix this issue, add a check to mtk_pinconf_bias_set_rsel(): if
we are entering that function with no pullup requested and at the
same time the arg is MTK_DISABLE, this means that we're trying to
disable pin bias, hence it's safe to return cleanly without ever
setting any RSEL register.
This makes mtk_pinconf_bias_set_combo() happy, going on with setting
the PU_PD registers, which is the only action to actually take to
disable bias on a pin/pingroup.
Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221104105605.33720-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On MT8365, the SET/CLR of the mode is broken and some pin modes won't
be set correctly.
Use the mt8365_set_clr_mode() callback to fix the issue.
Co-developed-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Link: https://lore.kernel.org/r/20221021084708.1109986-3-bchihi@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
On MT8365, the SET/CLR of the mode is broken and some pin modes won't
be set correctly.
Add mt8365_set_clr_mode() callback for such SoCs, so that instead of
using the SET/CLR register, use the main R/W register to
read/update/write the modes.
Co-developed-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Link: https://lore.kernel.org/r/20221021084708.1109986-2-bchihi@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Add missing and remove unused headers in the pin control and GPIO drivers
* Revise the pin control and GPIO headers
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Merge tag 'intel-pinctrl-v6.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.1-2
* Add missing and remove unused headers in the pin control and GPIO drivers
* Revise the pin control and GPIO headers
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Some mt7986 boards use uart rts/cts pins as gpio,
This patch allows to change rts/cts to gpio mode, but keep
rx/tx as UART function.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Link: https://lore.kernel.org/r/20221008164807.113590-1-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add pinctrl driver support for MediaTek SoC mt8188.
Signed-off-by: Hui.Liu <hui.liu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220818075012.20880-3-hui.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
After applying patches I get these warnings:
drivers/pinctrl/mediatek/pinctrl-mt8192.c:1302:56:
warning: "/*" within comment [-Wcomment]
drivers/pinctrl/mediatek/pinctrl-mt8192.c:1362:56:
warning: "/*" within comment [-Wcomment]
Something is wrong with the missing end-slashes. Add them.
Cc: Guodong Liu <guodong.liu@mediatek.com>
Cc: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Remove pin definitions that do not support the R0 & R1 pinconfig property.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220624133700.15487-6-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Function bias_combo getter/setters already handle all cases advanced drive
configuration, include drive for I2C related pins.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220624133700.15487-5-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
1. I2C pins's resistance value can be controlled by rsel register.
This patch provides rsel (resistance selection) setting on mt8192.
2. Also add the missing pull type array for mt8192 to document the
pull type of each pin and prevent invalid pull type settings.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220624133700.15487-4-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch provides the advanced drive raw data setting version
for I2C used pins on mt8192.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220624133700.15487-3-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
1. The dt-binding expects that drive-strength arguments be passed
in mA, but the driver was expecting raw values. And that this
commit changes the driver so that it is aligned with the binding.
2. This commit provides generic driving setup, which support
2/4/6/8/10/12/14/16mA driving, original driver just set raw data
setup setting when use drive-strength property.
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220624133700.15487-2-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- New helpers from Andy such as for_each_gpiochip_node() affecting both
GPIO and pin control, improving a bunch of drivers in the process.
- Pulled in Marc Zyngiers work to make IRQ chips immutable, and started
to apply fixups on top.
New drivers:
- New driver for Marvell MVEBU 98DX2530.
- New driver for Mediatek MT8195.
- Support Qualcomm PMX65 and PM6125.
- New driver for Qualcomm SC7280 LPASS pin control.
- New driver for Rockchip RK3588.
- New driver for NXP Freescale i.MXRT1170.
- New driver for Mediatek MT6795 Helio X10.
Improvements:
- Several Aspeed G6 cleanups and non-critical fixes.
- Thorought refactoring of some of the ever improving Renesas drivers.
- Clean up Mediatek MT8192 bindings a bit.
- PWM output and clock monitoring in the Ocelot LAN966x driver.
- Thorough refactoring and cleanup of the Ralink drivers such as
RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper
sub-drivers.
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Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Pretty big this time. Mostly due to (nice) Renesas refactorings.
Core changes:
- New helpers from Andy such as for_each_gpiochip_node() affecting
both GPIO and pin control, improving a bunch of drivers in the
process.
- Pulled in Marc Zyngiers work to make IRQ chips immutable, and
started to apply fixups on top.
New drivers:
- New driver for Marvell MVEBU 98DX2530.
- New driver for Mediatek MT8195.
- Support Qualcomm PMX65 and PM6125.
- New driver for Qualcomm SC7280 LPASS pin control.
- New driver for Rockchip RK3588.
- New driver for NXP Freescale i.MXRT1170.
- New driver for Mediatek MT6795 Helio X10.
Improvements:
- Several Aspeed G6 cleanups and non-critical fixes.
- Thorought refactoring of some of the ever improving Renesas
drivers.
- Clean up Mediatek MT8192 bindings a bit.
- PWM output and clock monitoring in the Ocelot LAN966x driver.
- Thorough refactoring and cleanup of the Ralink drivers such as
RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into
proper sub-drivers"
* tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits)
pinctrl: apple: Use a raw spinlock for the regmap
pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs
pinctrl: intel: Fix kernel doc format, i.e. add return sections
dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent'
pinctrl: starfive: Make the irqchip immutable
pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10
dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings
pinctrl: freescale: Add i.MXRT1170 pinctrl driver support
dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation
dt-bindings: pinctrl: rockchip: increase max amount of device functions
dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges'
dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable'
dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names
dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config
dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU
pinctrl: qcom: spmi-gpio: Add pm6125 compatible
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible
pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl
pinctrl: intel: make irq_chip immutable
pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask()
...
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Merge tag 'v5.18-rc5' into devel
Merge in Linux 5.18-rc5 since new code to the STM32 driver
depend in a non-trivial way on the fixes merged in -rc5.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
IES26 (BIT 16 of IES1_CFG_ADDR) controls the following pads:
- PAD_I2S_DATA_IN (GPIO114)
- PAD_I2S_LRCK (GPIO115)
- PAD_I2S_BCK (GPIO116)
The pinctrl table is wrong since it lists pins 114 to 112.
Update the table with the correct values.
Fixes: e94d8b6fb8 ("pinctrl: mediatek: add support for mt8365 SoC")
Reported-by: Youngmin Han <Youngmin.Han@geappliances.com>
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20220426125714.298907-1-mkorpershoek@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Set the pinctrl driver as built-in by default if
ARM64 and ARCH_MEDIATEK are enabled.
Fixes: 6cf5e9ef36 ("pinctrl: add pinctrl driver on mt8195")
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220327160813.2978637-1-fparent@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
If EINT_MTK is m and PINCTRL_MTK_V2 is y, build fails:
drivers/pinctrl/mediatek/pinctrl-moore.o: In function `mtk_gpio_set_config':
pinctrl-moore.c:(.text+0xa6c): undefined reference to `mtk_eint_set_debounce'
drivers/pinctrl/mediatek/pinctrl-moore.o: In function `mtk_gpio_to_irq':
pinctrl-moore.c:(.text+0xacc): undefined reference to `mtk_eint_find_irq'
Select EINT_MTK for PINCTRL_MTK_V2 to fix this.
Fixes: 8174a8512e ("pinctrl: mediatek: make MediaTek pinctrl v2 driver ready for buidling loadable module")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20220409105958.37412-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The new MT8186 drive came in and the probe calls were
refactored at the same time. Fix it up. Fixes a build issue.
Cc: Guodong Liu <guodong.liu@mediatek.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All of the MediaTek pinctrl drivers registering with pinctrl-mtk-common
that are offering a .spec_ies_smt_set() callback are declaring their
own function which is doing exactly the same on all drivers: calling
mtk_pconf_spec_set_ies_smt_range() with their struct and a simple check.
Commonize this callback by adding the ies and smt structure pointers
to struct mtk_pinctrl_devdata and changing the callback signature to
take it.
Removing the callback and checking for the existance of the spec_smt
and/or spec_ies data would allow us to staticize the function
mtk_pconf_spec_set_ies_smt_range(), but this solution was avoided as
to keep flexibility, as some SoCs may need to perform a very different
operation compared to what this commonized function is doing.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reduce code size and duplication by using a common spec_pupd callback,
which is possible to use on all of the pinctrl drivers that are
using the v1 pinctrl-mtk-common code, with the exception of mt8135,
which has a different handling compared to the others.
Since the callback function signature was changed, this had to be
propagated to pinctrl-mt8135's spec_pull_set().
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-5-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Most of the mediatek pinctrl drivers are calling mtk_pctrl_init() and
passing only a pointer to struct mtk_pinctrl_devdata, as the regmap
handle it passed from device-tree, with the exception of mt6397.
For all of the drivers that don't require passing a struct regmap
pointer from a parent device, simplify the probe mechanism by assigning
the required structure as match data and use mtk_pctrl_common_probe()
as their probe function.
While at it, also collapse the of_device_id entries to a single line,
as they all fit in max 83 columns, which is acceptable.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As a preparation to cleanup the probe mechanism of mediatek pinctrl
drivers that are using the v1 controller, add a common probe function
to this driver.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All of the SoCs using Paris pinctrl are defining a custom probe
function that is simply calling mtk_paris_pinctrl_probe() passing
a pointer to the SoC specific mtk_pin_soc structure and nothing else.
Simplify the probe mechanism across all pinctrl drivers that are
using pinctrl-paris by passing the specific mtk_pin_soc as match
data and using function mtk_paris_pinctrl_probe as a common probe
function for all of them.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220222111144.20796-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use the dev_err_probe() helper to simplify error handling during probe.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220308100956.2750295-12-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use the dev_err_probe() helper to simplify error handling during probe.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220308100956.2750295-11-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Use the dev_err_probe() helper to simplify error handling during probe.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220308100956.2750295-10-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Some of the MediaTek chips that utilize the Paris pinctrl driver library
support a lower drive strength (<= 1mA) than the standard drive strength
settings (2~16 mA) on certain pins. This was previously supported by the
custom MTK_PIN_CONFIG_DRV_ADV parameter along with the
"mediatek,drive-strength-adv" device tree property.
The drive strength values for this hardware are 125, 250, 500, and 1000 mA,
and can be readily described by the existing "drive-strength-microamp"
property, which then gets parsed by the generic pinconf library into the
parameter PIN_CONFIG_DRIVE_STRENGTH_UA.
Add support for PIN_CONFIG_DRIVE_STRENGTH_UA while keeping the old
custom parameter around for backward compatibility.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-9-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The current code deals with optional features by testing for the
function pointers and returning -ENOTSUPP if it is not valid. This is
done for multiple pin config settings and results in the code that
handles the supporting cases to get indented by one level. This is
aggrevated by the fact that some features require another level of
conditionals.
Instead of assigning the same error code in all unsupported optional
feature cases, simply have that error code as the default, and break
out of the switch/case block whenever a feature is unsupported, or an
error is returned. This reduces indentation by one level for the useful
code.
Also replace the goto statements with break statements. The result is
the same, as the gotos simply exit the switch/case block, which can
also be achieved with a break statement. With the latter the intent
is clear and easier to understand.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-8-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Virtual GPIOs do not have any hardware state associated with them. Any
attempt to read back hardware state for these pins result in error
codes.
Skip dumping extra pin config information for these virtual GPIOs.
Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-7-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The caller of mtk_pctrl_show_one_pin() is responsible for printing the
full line. mtk_pctrl_show_one_pin(), called through mtk_pctrl_dbg_show(),
should only produce a string containing the extra information the driver
wants included.
Drop the extra newlines. Also unbreak the line that is only slightly
over 80 characters to make it easier on the eye, and get rid of the
braces now that each block in the conditionals is just one line.
Fixes: 184d8e13f9 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.")
Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-6-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
mtk_pconf_group_get(), used to read back pingroup pin config state,
simply returns a set of configs saved from a previous invocation of
mtk_pconf_group_set(). This is an unfiltered, unvalidated set passed
in from the pinconf core, which does not match the current hardware
state.
Since the driver library is designed to have one pin per group, pass
through mtk_pconf_group_get() to mtk_pinconf_get(), to read back the
current pin config state of the only pin in the group.
Also drop the assignment of pin config state to the group.
Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-5-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
For mtk_pinconf_get(), the "argument" argument is typically returned by
pinconf_to_config_argument(), which holds the value for a given pinconf
parameter. It certainly should not have the type of "enum pin_config_param",
which describes the type of the pinconf parameter itself.
Change the type to u32, which matches the return type of
pinconf_to_config_argument().
Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-4-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When reading back pin bias settings, if the pin is not in the
corresponding bias state, the function should return -EINVAL.
Fix this in the mediatek-paris pinctrl library so that the read back
state is not littered with bogus a "input bias disabled" combined with
"pull up" or "pull down" states.
Fixes: 805250982b ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308100956.2750295-3-wenst@chromium.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The device_node pointer is returned by of_parse_phandle() with refcount
incremented. We should use of_node_put() on it when done.
Fixes: a6df410d42 ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220308071155.21114-1-linmq006@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Core changes:
- New standard enumerator and corresponding device tree bindings
for output impedance pin configuration. (Implemented and used
in the Renesas rzg2l driver.)
- Cleanup of Kconfig and Makefile to be somewhat orderly and
alphabetic.
New drivers:
- Samsung Exynos 7885 pin controller.
- Ocelot LAN966x pin controller.
- Qualcomm SDX65 pin controller.
- Qualcomm SM8450 pin controller.
- Qualcomm PM8019, PM8226 and PM2250 pin controllers.
- NXP/Freescale i.MXRT1050 pin controller.
- Intel Thunder Bay pin controller.
Enhancements:
- Introduction of the string library helper function
"kasprintf_strarray()" and subsequent use in Rockchip, ST and
Armada pin control drivers, as well as the GPIO mockup driver.
- The Ocelot pin controller has been extensively rewritten to
use regmap and other modern kernel infrastructure.
- The Microchip SGPIO driver has been converted to use regmap.
- The SPEAr driver had been converted to use regmap.
- Substantial cleanups and janitorial on the Apple pin control
driver that was merged for v5.16.
- Janitorial to remove of_node assignments in the GPIO portions
that anyway get this handled in the GPIO core.
- Minor cleanups and improvements in several pin controllers.
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Merge tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control bulk updates from Linus Walleij:
"Core changes:
- New standard enumerator and corresponding device tree bindings for
output impedance pin configuration. (Implemented and used in the
Renesas rzg2l driver.)
- Cleanup of Kconfig and Makefile to be somewhat orderly and
alphabetic.
New drivers:
- Samsung Exynos 7885 pin controller.
- Ocelot LAN966x pin controller.
- Qualcomm SDX65 pin controller.
- Qualcomm SM8450 pin controller.
- Qualcomm PM8019, PM8226 and PM2250 pin controllers.
- NXP/Freescale i.MXRT1050 pin controller.
- Intel Thunder Bay pin controller.
Enhancements:
- Introduction of the string library helper function
"kasprintf_strarray()" and subsequent use in Rockchip, ST and
Armada pin control drivers, as well as the GPIO mockup driver.
- The Ocelot pin controller has been extensively rewritten to use
regmap and other modern kernel infrastructure.
- The Microchip SGPIO driver has been converted to use regmap.
- The SPEAr driver had been converted to use regmap.
- Substantial cleanups and janitorial on the Apple pin control driver
that was merged for v5.16.
- Janitorial to remove of_node assignments in the GPIO portions that
anyway get this handled in the GPIO core.
- Minor cleanups and improvements in several pin controllers"
* tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (98 commits)
pinctrl: imx: fix assigning groups names
dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations
pinctrl: bcm: ns: use generic groups & functions helpers
pinctrl: imx: fix allocation result check
pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt
pinctrl: Propagate firmware node from a parent device
dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings
pinctrl: add one more "const" for generic function groups
pinctrl: keembay: rework loops looking for groups names
pinctrl: keembay: comment process of building functions a bit
pinctrl: imx: prepare for making "group_names" in "function_desc" const
ARM: dts: gpio-ranges property is now required
pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEED
pinctrl: Get rid of duplicate of_node assignment in the drivers
pinctrl-sunxi: don't call pinctrl_gpio_direction()
pinctrl-bcm2835: don't call pinctrl_gpio_direction()
pinctrl: bcm2835: Silence uninit warning
pinctrl: Sort Kconfig and Makefile entries alphabetically
pinctrl: Add Intel Thunder Bay pinctrl driver
dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver
...
GPIO library does copy the of_node from the parent device of
the GPIO chip, there is no need to repeat this in the individual
drivers. Remove these assignment all at once.
For the details one may look into the of_gpio_dev_init() implementation.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20211214125855.33207-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All the other mtk_hw_get_value() calls have a check for "if (err)" so
we can add one here as well. This silences a Smatch warning:
drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:819 mtk_pinconf_bias_get_rsel()
error: uninitialized symbol 'pd'.
Fixes: fb34a9ae38 ("pinctrl: mediatek: support rsel feature")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20211127140836.GB24002@kili
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
