Commit Graph

10 Commits

Author SHA1 Message Date
Krzysztof Kozlowski b22794c0f7 dt-bindings: pinctrl: qcom: drop common properties and allow wakeup-parent
Drop common properties already defined in referenced common Qualcomm SoC
TLMM bindings and use "unevaluatedProperties: false".  This makes the
binding smaller and easier to review.  Additionally this allows now
"wakeup-parent" property coming from common TLMM bindings.

In few places move the "required:" block to bottom, to match convention.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231208215534.195854-10-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-20 12:09:57 +01:00
Krzysztof Kozlowski a38e276c27 dt-bindings: pinctrl: qcom,sdx55: simplify with unevaluatedProperties
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230407184546.161168-29-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-12 10:58:49 +02:00
Krzysztof Kozlowski 5c7069712c dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230202104452.299048-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-02-03 08:14:58 +01:00
Krzysztof Kozlowski 12a18bb74f dt-bindings: pinctrl: qcom: allow nine interrupts on SM6350
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
summary interrupt.  SM6350 is different because downstream and upstream
DTS have nine of the interrupts.  Allow such variation.

Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221230135645.56401-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-01-13 11:47:52 +01:00
Krzysztof Kozlowski 09f537065c dt-bindings: pinctrl: qcom: adjust description
Drop "binding" from description, because the field should describe the
hardware.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221017230012.47878-34-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18 12:17:25 -04:00
Krzysztof Kozlowski 4e0434d478 dt-bindings: pinctrl: qcom,sdx55: fix indentation in example
Bindings example should be indented with 4-spaces.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-31-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17 13:07:56 -04:00
Krzysztof Kozlowski fd583a4f6d dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-30-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17 13:07:55 -04:00
Krzysztof Kozlowski 8cd7d9e14f dt-bindings: pinctrl: qcom,sdx55: fix matching pin config
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'.  Otherwise the subnodes
(level one and two) are not properly matched.

  qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'

This method also unifies the bindings with other Qualcomm TLMM and LPASS
pinctrl bindings.

Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-29-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17 13:07:54 -04:00
Rafał Miłecki c09acbc499 dt-bindings: pinctrl: use pinctrl.yaml
Also fix some examples to avoid warnings like:
brcm,ns-pinmux.example.dt.yaml: pin-controller@1800c1c0: $nodename:0: 'pin-controller@1800c1c0' does not match '^pinctrl|pinmux@[0-9a-f]+$'

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211202063216.24439-1-zajec5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-05 01:31:05 +01:00
Vinod Koul c82d4776a1 dt-bindings: pinctrl: qcom: Add SDX55 pinctrl bindings
Add device tree binding Documentation details for Qualcomm SDX55
pinctrl driver.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201109062620.14566-2-vkoul@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-11-10 15:45:24 +01:00