Commit graph

1046 commits

Author SHA1 Message Date
Jan Beulich
45e98cdb6d page table handling cleanup
Kill pte_rdprotect(), pte_exprotect(), pte_mkread(), pte_mkexec(), pte_read(),
pte_exec(), and pte_user() except where arch-specific code is making use of
them.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Christoph Hellwig <hch@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-16 09:05:36 -07:00
Linus Torvalds
e030dbf91a Merge branch 'ioat-md-accel-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop
* 'ioat-md-accel-for-linus' of git://lost.foo-projects.org/~dwillia2/git/iop: (28 commits)
  ioatdma: add the unisys "i/oat" pci vendor/device id
  ARM: Add drivers/dma to arch/arm/Kconfig
  iop3xx: surface the iop3xx DMA and AAU units to the iop-adma driver
  iop13xx: surface the iop13xx adma units to the iop-adma driver
  dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines
  md: remove raid5 compute_block and compute_parity5
  md: handle_stripe5 - request io processing in raid5_run_ops
  md: handle_stripe5 - add request/completion logic for async expand ops
  md: handle_stripe5 - add request/completion logic for async read ops
  md: handle_stripe5 - add request/completion logic for async check ops
  md: handle_stripe5 - add request/completion logic for async compute ops
  md: handle_stripe5 - add request/completion logic for async write ops
  md: common infrastructure for running operations with raid5_run_ops
  md: raid5_run_ops - run stripe operations outside sh->lock
  raid5: replace custom debug PRINTKs with standard pr_debug
  raid5: refactor handle_stripe5 and handle_stripe6 (v3)
  async_tx: add the async_tx api
  xor: make 'xor_blocks' a library routine for use with async_tx
  dmaengine: make clients responsible for managing channels
  dmaengine: refactor dmaengine around dma_async_tx_descriptor
  ...
2007-07-13 10:52:27 -07:00
Dan Williams
2492c84518 iop3xx: surface the iop3xx DMA and AAU units to the iop-adma driver
Adds the platform device definitions and the architecture specific support
routines (i.e. register initialization and descriptor formats) for the
iop-adma driver.

Changelog:
* add support for > 1k zero sum buffer sizes
* added dma/aau platform devices to iq80321 and iq80332 setup
* fixed the calculation in iop_desc_is_aligned
* support xor buffer sizes larger than 16MB
* fix places where software descriptors are assumed to be contiguous, only
  hardware descriptors are contiguous for up to a PAGE_SIZE buffer size
* convert to async_tx
* add interrupt support
* add platform devices for 80219 boards
* do not call platform register macros in driver code
* remove switch() statements for compatible register offsets/layouts
* change over to bitmap based capabilities
* remove unnecessary ARM assembly statement
* checkpatch.pl fixes
* gpl v2 only correction
* phys move to dma_async_tx_descriptor

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2007-07-13 08:06:19 -07:00
Dan Williams
39a8d7d13c iop13xx: surface the iop13xx adma units to the iop-adma driver
Adds the platform device definitions and the architecture specific
support routines (i.e. register initialization and descriptor formats) for the
iop-adma driver.

Changelog:
* added 'descriptor pool size' to the platform data
* add base support for buffer sizes larger than 16MB (hw max)
* build error fix from Kirill A. Shutemov
* rebase for async_tx changes
* add interrupt support
* do not call platform register macros in driver code
* remove unnecessary ARM assembly statement
* checkpatch.pl fixes
* gpl v2 only correction

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2007-07-13 08:06:18 -07:00
Dan Williams
c211092313 dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines
The Intel(R) IOP series of i/o processors integrate an Xscale core with
raid acceleration engines.  The capabilities per platform are:

iop219:
 (2) copy engines
iop321:
 (2) copy engines
 (1) xor and block fill engine
iop33x:
 (2) copy and crc32c engines
 (1) xor, xor zero sum, pq, pq zero sum, and block fill engine
iop34x (iop13xx):
 (2) copy, crc32c, xor, xor zero sum, and block fill engines
 (1) copy, crc32c, xor, xor zero sum, pq, pq zero sum, and block fill engine

The driver supports the features of the async_tx api:
* asynchronous notification of operation completion
* implicit (interupt triggered) handling of inter-channel transaction
  dependencies

The driver adapts to the platform it is running by two methods.
1/ #include <asm/arch/adma.h> which defines the hardware specific
   iop_chan_* and iop_desc_* routines as a series of static inline
   functions
2/ The private platform data attached to the platform_device defines the
   capabilities of the channels

20070626: Callbacks are run in a tasklet.  Given the recent discussion on
LKML about killing tasklets in favor of workqueues I did a quick conversion
of the driver.  Raid5 resync performance dropped from 50MB/s to 30MB/s, so
the tasklet implementation remains until a generic softirq interface is
available.

Changelog:
* fixed a slot allocation bug in do_iop13xx_adma_xor that caused too few
slots to be requested eventually leading to data corruption
* enabled the slot allocation routine to attempt to free slots before
returning -ENOMEM
* switched the cleanup routine to solely use the software chain and the
status register to determine if a descriptor is complete.  This is
necessary to support other IOP engines that do not have status writeback
capability
* make the driver iop generic
* modified the allocation routines to understand allocating a group of
slots for a single operation
* added a null xor initialization operation for the xor only channel on
iop3xx
* support xor operations on buffers larger than the hardware maximum
* split the do_* routines into separate prep, src/dest set, submit stages
* added async_tx support (dependent operations initiation at cleanup time)
* simplified group handling
* added interrupt support (callbacks via tasklets)
* brought the pending depth inline with ioat (i.e. 4 descriptors)
* drop dma mapping methods, suggested by Chris Leech
* don't use inline in C files, Adrian Bunk
* remove static tasklet declarations
* make iop_adma_alloc_slots easier to read and remove chances for a
  corrupted descriptor chain
* fix locking bug in iop_adma_alloc_chan_resources, Benjamin Herrenschmidt
* convert capabilities over to dma_cap_mask_t
* fixup sparse warnings
* add descriptor flush before iop_chan_enable
* checkpatch.pl fixes
* gpl v2 only correction
* move set_src, set_dest, submit to async_tx methods
* move group_list and phys to async_tx

Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2007-07-13 08:06:18 -07:00
Milan Svoboda
9068a4c646 USB: pxa2xx_udc: use generic gpio layer
This patch lets the pxa2xx_udc use the generic gpio layer,
on the relevant PXA and IXP systems.

Signed-off-by: Milan Svoboda <msvoboda@ra.rockwell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-07-12 16:34:42 -07:00
Linus Torvalds
4aabab2181 Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (50 commits)
  [ARM] sa1100: remove boot time RTC initialisation
  [ARM] sa1100: stop doing our own rtc management over suspend
  [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs
  [ARM] 4473/2:  Take the HWCAP definitions out of the elf.h file
  [ARM] pxa: move platform devices to separate header file
  [ARM] pxa: move device registration into CPU-specific file
  [ARM] pxa: remove boot time RTC initialisation
  [ARM] pxa: stop doing our own rtc management over suspend
  [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code
  [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq()
  [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs
  [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler()
  [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio()
  [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low()
  [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS
  [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP
  [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare()
  [ARM] pxa: move pm_ops structure into CPU specific files
  [ARM] pxa: introduce cpu_is_pxaXXX macros
  [ARM] pxa: remove MMC register defines from pxa-regs.h
  ...
2007-07-12 14:17:12 -07:00
Russell King
ca9ced7f67 Merge branches 'at91', 'davinci', 'imx', 'iop', 'ixp', 'ks8695', 'misc', 'pxa' and 's3c' into devel 2007-07-12 21:30:18 +01:00
Catalin Marinas
d1cbbd6b41 [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs
When running Linux in non-secure mode (on ARM1176 for example),
depending on the CP15 secure configuration register, the CPSR.F bit
(6) might only be modified from the secure mode. However, the
valid_user_regs() function checks for this bit being cleared. With
commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user
registers are not considered valid.

The patch also ensures that the CPSR.A bit is cleared and the USR mode
is set if the CPU does not support the 26bit user mode.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 16:20:52 +01:00
Catalin Marinas
f884b1cf57 [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file
The patch moves the HWCAP definitions and the extern elf_hwcap
declaration to the hwcap.h header file.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 16:20:15 +01:00
Eric Miao
f53f066c25 [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code
Since the number of dma channels varies between pxa25x and pxa27x, it
introduces some specific code in dma.c. This patch moves the specific
code to pxa25x.c and pxa27x.c and makes dma.c more generic.

1. add pxa_init_dma() for dma initialization, the number of channels
   are passed in by the argument

2. add a "prio" field to the "struct pxa_dma_channel" for the channel
   priority, and is initialized in pxa_init_dma()

3. use a general priority comparison with the channels "prio" field so
   to remove the processor specific pxa_for_each_dma_prio macro,  this
   is not lightning fast as the original one,  but it is acceptable as
   it happens when requesting dma, which is usually not so performance
   critical

Signed-off-by: eric miao <eric.miao@marvell.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:28:16 +01:00
Eric Miao
8118d12494 [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs
ICIP2 is not examined during IRQ entrance, this patch add the
checking if the processor is PXA27x or later, with CoreG bits
in CPUID (Core Generation) > 1

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:28:14 +01:00
Eric Miao
c08b7b3ef6 [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS
1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs,
   and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants

2. make the code specific to the high IRQ numbers (32..64) to be
   PXA27x specific

3. add a function pxa_init_irq_high() to initialize the internal
   high IRQ chip, the invoke of this function could be moved to
   PXA27x specific initialization code

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:28:10 +01:00
Eric Miao
486c955118 [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP
1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ
   starts from zero. This makes IRQ numbering inconsistent between
   PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX
   definition has the same value on both PXA25x and PXA27x.

2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this
   avoids unintentional use of these macros on PXA25x

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:28:09 +01:00
Russell King
b23170c01f [ARM] pxa: introduce cpu_is_pxaXXX macros
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:28:04 +01:00
Russell King
7a2b94bc39 [ARM] pxa: remove MMC register defines from pxa-regs.h
pxamci.h redefines the MMC registers differently so they can be used
with ioremap.  Remove the incompatible definitions from pxa-regs.h.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:27:56 +01:00
Russell King
f62c3f2c35 [ARM] pxa: remove useless pxa_pm_finish() function
pxa_pm_finish() does nothing but return zero.  The core code
does nothing with this return value, and will not try to call
the finish method in the pm_ops structure if it is NULL.

Therefore, we can remove this useless function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 14:27:53 +01:00
George G. Davis
909d6c6c80 [ARM] 4453/1: Fully Decode ARM instruction set state in show_regs() tombstone
The ARM show_regs() tombstone only partially decodes which ARM ISA was
executing at the time a fault occurred displaying either "(T)" for the
Thumb case or nothing at all for other cases.  This patch therefore
explicitly identifies which state the processor is in at the time of
a fault: ARM, Thumb, Jazelle or JazelleEE.

Signed-off-by: George G. Davis <gdavis@mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:13:35 +01:00
Andrew Victor
8a87a996ea [ARM] 4377/1: KS8695: GPIO driver
Driver to control the GPIO pins on the KS8695 processor.
The driver natively supports the Generic GPIO interface.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:12:34 +01:00
Imre Kaloz
dcdeeb21c0 [ARM] 4426/2: Netgear WG302 v2 and WAG302 v2 support
This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series.

This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected.

Updated to stay below the 80 char limit in uncompress.h

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:12:15 +01:00
Imre Kaloz
46918bd13b [ARM] 4425/2: Gateway 7001 series support
This patch provides support for the Gateway 7001 AccessPoint series.

Updated to stay below the 80 char limit in uncompress.h

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:12:15 +01:00
Vladimir Barinov
4ad48b4bfa [ARM] 4385/2: ixdp425: NAND support
IXDP425 NAND support (arch specific part).

The generic platform driver that is used by ixdp425 platfrom is already
in upstream kernel in 2.6.22-rc1.

Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: Ruslan Sushko <rsushko@ru.mvista.com>
Signed-off-by: Deepak Saxena <dsaxena@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:12:15 +01:00
Pavel Pisa
b3e6a508ed [ARM] 4373/1: i.MX/MX1 GPIO support implementation
Support for generic input output for MX1 family.
The implementation prevents allocation of one pin
by two users, but does not store pointer to the user
description permanently, because this solution
would have bigger memory overhead.

The simple way to integrate code with per BSP
pins setup and allocation is required else all GPIO
registration checking is useless. The function
imx_gpio_setup_multiple_pins() can be used for this
purpose in future.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:11:39 +01:00
Greg Ungerer
feb4722552 [ARM] 4428/1: modify at91 includes to handle non-MMU at91x40 family
Modify the common at91 hardware support to deal with the non-MMU
at91x40 family. The base RAM (which is most likely not DRAM) is
set to the configured value. Virtual IO device mapping is set
to be 1 to 1 with the physical addresses.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:11:25 +01:00
Greg Ungerer
7067222400 [ARM] 4427/1: base Atmel at91x40 architecture defines
Base at91x40 architecture support defines. These parts are somewhat
simpler than the ARM9 Atmel based parts.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:11:21 +01:00
Greg Ungerer
b54942f820 [ARM] 4391/1: make at91 debug unit support optional
The AT91x40 family doesn't have the debug unit like its bigger brothers.
But it does have the ID and extension registers (with the bit meanings
the same). Reorganize at91_dbgu.h to cater for this.

This also affects the load uncompressor, since it outputs to the
debug port.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 11:11:21 +01:00
Vladimir Barinov
83f53220f8 [ARM] 4432/5: davinci: pin mux support
Support pin multiplexing configurations driver for TI DaVinci SoC

Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Acked-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 09:57:09 +01:00
Vladimir Barinov
3d9edf09d4 [ARM] 4457/2: davinci: GPIO support
Support GPIO driver for TI DaVinci SoC

Signed-off-by: Vladimir Barinov <vbarino@ru.mvista.com>
Acked-by: David Brownell <david-b@pacbell.net>
Acked-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 09:57:09 +01:00
Vladimir Barinov
3e062b07ad [ARM] 4430/1: davinci: clock control support
Support clock control driver for TI DaVinci SoC

Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-07-12 09:57:09 +01:00
Jan Beulich
caa5171622 PCI: remove pci_dac_dma_... APIs
Based on replies to a respective query, remove the pci_dac_dma_...() APIs
(except for pci_dac_dma_supported() on Alpha, where this function is used
in non-DAC PCI DMA code).

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Jesse Barnes <jesse.barnes@intel.com>
Cc: Christoph Hellwig <hch@infradead.org>
Acked-by: David Miller <davem@davemloft.net>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-07-11 16:02:11 -07:00
Michael Ellerman
575e3348cb PCI: Use a weak symbol for the empty version of pcibios_add_platform_entries()
I'm not sure if this is going to fly, weak symbols work on the compilers I'm
using, but whether they work for all of the affected architectures I can't say.
I've cc'ed as many arch maintainers/lists as I could find.

But assuming they do, we can use a weak empty definition of
pcibios_add_platform_entries() to avoid having an empty definition on every
arch.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-07-11 16:02:07 -07:00
David Woodhouse
edd5cd4a94 Introduce fixed sys_sync_file_range2() syscall, implement on PowerPC and ARM
Not all the world is an i386.  Many architectures need 64-bit arguments to be
aligned in suitable pairs of registers, and the original
sys_sync_file_range(int, loff_t, loff_t, int) was therefore wasting an
argument register for padding after the first integer.  Since we don't
normally have more than 6 arguments for system calls, that left no room for
the final argument on some architectures.

Fix this by introducing sys_sync_file_range2(int, int, loff_t, loff_t) which
all fits nicely.  In fact, ARM already had that, but called it
sys_arm_sync_file_range.  Move it to fs/sync.c and rename it, then implement
the needed compatibility routine.  And stop the missing syscall check from
bitching about the absence of sys_sync_file_range() if we've implemented
sys_sync_file_range2() instead.

Tested on PPC32 and with 32-bit and 64-bit userspace on PPC64.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-06-28 11:38:30 -07:00
Russell King
154c772ebf [ARM] Update show_regs/oops register format
Add the kernel release and version information to the output of
show_regs/oops.  Add the CPU PSR register.  Avoid using printk
to output partial lines; always output a complete line.

Re-combine the "Control" and "Table + DAC" lines after nommu
separated them; we don't want to waste vertical screen space
needlessly.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-18 15:04:42 +01:00
Ben Dooks
6c1640d52b [ARM] 4445/1: ANUBIS: Fix CPLD registers
Update the ANUBIS register definitions inline with the
specs and ensure they are registered correctly.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-11 09:09:34 +01:00
Ben Dooks
5698bd28c6 [ARM] 4444/2: OSIRIS: CPLD suspend fix
Ensure the CPLD 8bit settings are preserved over a suspend/resume
cycle as the CPU sends a hard-reset at resume time.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-11 09:09:31 +01:00
Ben Dooks
c362aecdb5 [ARM] 4442/1: OSIRIS: Fix CPLD register definitions
Fix the CPLD register definitions to correctly mirror the
documentation

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-11 09:09:15 +01:00
Russell King
5d4cae5fe2 [ARM] VFP: fix section mismatch error
Fix a real section mismatch issue; the test code is thrown away after
initialisation, but if we do not detect the VFP hardware, it is left
hooked into the exception handler.  Any VFP instructions which are
subsequently executed risk calling the discarded exception handler.

Introduce a new "null" handler which returns to the "unrecognised
fault" return address.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-10 12:22:20 +01:00
Andrew Victor
0e5f82dda5 [ARM] 4421/1: AT91: Value of _KEY fields.
Use the actual value (0xA5) for the AT91_SHDW_KEY and AT91_WDT_KEY
register fields instead of a bitmask.

This is consistent with how AT91_RSTC_KEY is defined, and is easier to
use in code.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-03 17:52:35 +01:00
Bill Gatliff
29c349d22c [ARM] 4422/1: Fix default value handling in gpio_direction_output (PXA)
The default value passed through to pxa_gpio_mode() is lost
due to a missing GPIO_DFLT_HIGH mask for nonzero values.  The enclosed
patch fixes this programming error.

Signed-off-by: Bill Gatliff <bgat@billgatliff.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-06-02 21:31:48 +01:00
Catalin Marinas
2ccdd1e77d [ARM] 4394/1: ARMv7: Add the TLB range operations
We are currently using the ARMv6 operations but need to duplicate some
of the code because of the introduction of the new CPU barrier
instructions in ARMv7.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-30 14:32:07 +01:00
Ben Dooks
eca8c24241 [ARM] 4412/1: S3C2412: reset errata fix
The S3C2412 has an reset-errata where the clock
may cause a glitch switching back to EXTCLK. We
force a switch to EXTCLK before writing the
reset register to force use of the CLKCON sync
logic to properly switch.

Fix problem reported by Matthieu Castet.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-30 13:15:23 +01:00
David Rientjes
b91d8a1205 [ARM] use __used attribute
Use the newly introduced __used attribute in place of the deprecated
__attribute_used__.  Functionally the same.

Signed-off-by: David Rientjes <rientjes@google.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-30 13:15:06 +01:00
Alan Cox
3abc12012f [ARM] enable arbitary speed tty ioctls and split input/output speed
Add the ioctls and values needed for this to the ARM26/ARM32 ports.  The
actual code has been in the base kernel for a while and automatically turns
on when a port sets the required defines.

[RMK: also added termbits.h changes to avoid build breakage]

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-28 23:07:34 +01:00
Michael-Luke Jones
cc50a0df51 [ARM] 4406/1: Trivial NSLU2 / NAS-100D header & setup code cleanup
This trivial patch updates the nslu2 and nas-100d headers to
remove pointless GPIO defines, and updates nslu2-setup.c
accordingly. In addition minor style cleanups to some comments
are included.

Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-26 10:09:39 +01:00
Michael-Luke Jones
435c5da00b [ARM] 4405/1: NSLU2, DSM-G600 frequency fixup code
This patch is required as the frequency fixup in nslu2_init does not
run sufficiently early in the boot sequence to take effect. In addition
the dsmg600 setup code behaviour has been improved such that a
'fixup' routine is avoided.

Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-26 10:09:39 +01:00
Ben Dooks
ece97941c3 [ARM] 4402/1: S3C2443: Add physical address of HSMMC controller
Add physical address of HSMMC to include/asm-arm/arch-s3c2410/map.h

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-26 10:09:39 +01:00
Ben Dooks
8e81725b17 [ARM] 4401/1: S3C2443: Add definitions for port GPIOJ
Add definitions for S3C2443 functions in GPIOJ

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-26 10:09:38 +01:00
Linus Torvalds
d07b3c2532 Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits)
  [ARM] spelling fixes
  [ARM] at91_adc parenthesis balance
  [ARM] 4400/1: S3C24XX: Add high-speed MMC device definition
  [ARM] 4399/2: S3C2443: Fix SMDK2443 nand timings
  [ARM] 4398/1: S3C2443: Fix watchdog IRQ number
  [ARM] 4397/1: S3C2443: remove SDI0/1 IRQ ambiguity
  [ARM] 4396/1: S3C2443: Add missing HCLK clocks
  [ARM] 4395/1: S3C24XX: add include of <linux/sysdev.h> to relevant machines
  [ARM] 4388/1: no need for arm/mm mmap range checks for non-mmu
  [ARM] 4387/1: fix /proc/cpuinfo formatting for pre-ARM7 parts
  [ARM] ARMv6: add CPU_HAS_ASID configuration
  [ARM] integrator: fix pci_v3 compile error with DEBUG_LL
  [ARM] gic: Fix gic cascade irq handling
  [ARM] Silence OMAP kernel configuration warning
  [ARM] Update ARM syscalls
  [ARM] 4384/1: S3C2412/13 SPI registers offset correction
  [ARM] 4383/1: iop: fix usage of '__init' and 'inline' in iop files
  [ARM] 4382/1: iop13xx: fix msi support
  [ARM] Remove Integrator/CP SMP platform support
  [ARM] 4378/1: KS8695: Serial driver fix
  ...
2007-05-21 10:00:22 -07:00
Alexey Dobriyan
e8edc6e03a Detach sched.h from mm.h
First thing mm.h does is including sched.h solely for can_do_mlock() inline
function which has "current" dereference inside. By dealing with can_do_mlock()
mm.h can be detached from sched.h which is good. See below, why.

This patch
a) removes unconditional inclusion of sched.h from mm.h
b) makes can_do_mlock() normal function in mm/mlock.c
c) exports can_do_mlock() to not break compilation
d) adds sched.h inclusions back to files that were getting it indirectly.
e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were
   getting them indirectly

Net result is:
a) mm.h users would get less code to open, read, preprocess, parse, ... if
   they don't need sched.h
b) sched.h stops being dependency for significant number of files:
   on x86_64 allmodconfig touching sched.h results in recompile of 4083 files,
   after patch it's only 3744 (-8.3%).

Cross-compile tested on

	all arm defconfigs, all mips defconfigs, all powerpc defconfigs,
	alpha alpha-up
	arm
	i386 i386-up i386-defconfig i386-allnoconfig
	ia64 ia64-up
	m68k
	mips
	parisc parisc-up
	powerpc powerpc-up
	s390 s390-up
	sparc sparc-up
	sparc64 sparc64-up
	um-x86_64
	x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig

as well as my two usual configs.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-21 09:18:19 -07:00
Mariusz Kozlowski
fc432e1952 [ARM] at91_adc parenthesis balance
Trivial unbalanced parenthesis macro fix.

Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2007-05-20 20:08:48 +01:00